Struct stm32_hal2::pac::dac::cr::W

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pub struct W(/* private fields */);

Expand description

Register CR writer

Implementations§

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impl W

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pub fn en1(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 0>

Bit 0 - DAC channel1 enable This bit is set and cleared by software to enable/disable DAC channel1.

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pub fn ten1(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 1>

Bit 1 - DAC channel1 trigger enable

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pub fn tsel1( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 3, 2>

Bits 2:4 - DAC channel1 trigger selection These bits select the external event used to trigger DAC channel1. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

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pub fn wave1( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 2, 6>

Bits 6:7 - DAC channel1 noise/triangle wave generation enable These bits are set and cleared by software. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

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pub fn mamp1( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 4, 8>

Bits 8:11 - DAC channel1 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

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pub fn dmaen1(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 12>

Bit 12 - DAC channel1 DMA enable This bit is set and cleared by software.

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pub fn dmaudrie1(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 13>

Bit 13 - DAC channel1 DMA Underrun Interrupt enable This bit is set and cleared by software.

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pub fn cen1(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 14>

Bit 14 - DAC Channel 1 calibration enable This bit is set and cleared by software to enable/disable DAC channel 1 calibration, it can be written only if bit EN1=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

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pub fn en2(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 16>

Bit 16 - DAC channel2 enable This bit is set and cleared by software to enable/disable DAC channel2.

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pub fn ten2(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 17>

Bit 17 - DAC channel2 trigger enable

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pub fn tsel2( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 3, 18>

Bits 18:20 - DAC channel2 trigger selection These bits select the external event used to trigger DAC channel2 Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled).

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pub fn wave2( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 2, 22>

Bits 22:23 - DAC channel2 noise/triangle wave generation enable These bits are set/reset by software. 1x: Triangle wave generation enabled Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled)

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pub fn mamp2( &mut self ) -> FieldWriterRaw<'_, u32, CR_SPEC, u8, u8, Unsafe, 4, 24>

Bits 24:27 - DAC channel2 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

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pub fn dmaen2(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 28>

Bit 28 - DAC channel2 DMA enable This bit is set and cleared by software.

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pub fn dmaudrie2(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 29>

Bit 29 - DAC channel2 DMA underrun interrupt enable This bit is set and cleared by software.

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pub fn cen2(&mut self) -> BitWriterRaw<'_, u32, CR_SPEC, bool, BitM, 30>

Bit 30 - DAC Channel 2 calibration enable This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

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