Struct stm32_hal2::pac::adc1::difsel::W

pub struct W(/* private fields */);

Register DIFSEL writer

Implementations

impl W

pub fn difsel0( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 0>

Bit 0 - ADC channel differential or single-ended mode for channel

pub fn difsel1( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 1>

Bit 1 - ADC channel differential or single-ended mode for channel

pub fn difsel2( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 2>

Bit 2 - ADC channel differential or single-ended mode for channel

pub fn difsel3( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 3>

Bit 3 - ADC channel differential or single-ended mode for channel

pub fn difsel4( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 4>

Bit 4 - ADC channel differential or single-ended mode for channel

pub fn difsel5( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 5>

Bit 5 - ADC channel differential or single-ended mode for channel

pub fn difsel6( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 6>

Bit 6 - ADC channel differential or single-ended mode for channel

pub fn difsel7( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 7>

Bit 7 - ADC channel differential or single-ended mode for channel

pub fn difsel8( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 8>

Bit 8 - ADC channel differential or single-ended mode for channel

pub fn difsel9( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 9>

Bit 9 - ADC channel differential or single-ended mode for channel

pub fn difsel10( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 10>

Bit 10 - ADC channel differential or single-ended mode for channel

pub fn difsel11( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 11>

Bit 11 - ADC channel differential or single-ended mode for channel

pub fn difsel12( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 12>

Bit 12 - ADC channel differential or single-ended mode for channel

pub fn difsel13( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 13>

Bit 13 - ADC channel differential or single-ended mode for channel

pub fn difsel14( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 14>

Bit 14 - ADC channel differential or single-ended mode for channel

pub fn difsel15( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 15>

Bit 15 - ADC channel differential or single-ended mode for channel

pub fn difsel16( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 16>

Bit 16 - ADC channel differential or single-ended mode for channel

pub fn difsel17( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 17>

Bit 17 - ADC channel differential or single-ended mode for channel

pub fn difsel18( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 18>

Bit 18 - ADC channel differential or single-ended mode for channel

pub fn difsel19( &mut self ) -> BitWriterRaw<'_, u32, DIFSEL_SPEC, DIFSEL0_A, BitM, 19>

Bit 19 - ADC channel differential or single-ended mode for channel

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<DIFSEL_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<DIFSEL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<DIFSEL_SPEC>> for W

fn from(writer: W<DIFSEL_SPEC>) -> W

Converts to this type from the input type.