Module stm32_hal2::spi
source · Expand description
Support for the Serial Peripheral Interface (SPI) bus peripheral. Provides APIs to configure, read, and write from SPI, with blocking, nonblocking, and DMA functionality.
Structs
Enums
Set the factor to divide the APB clock by to set baud rate. Sets
SPI_CR1
register, BR
field.
On H7, sets CFG1 register, MBR
field.Number of bits in at single SPI data frame. Sets
CFGR1
register, DSIZE
field.FIFO reception threshold Sets
SPI_CR2
register, FRXTH
field.Used for managing NSS / CS pin. Sets CR1 register, SSM field.
On H7, sets CFG2 register,
SSOE
field.Select the duplex communication mode between the 2 devices. Sets
CR1
register, BIDIMODE
,
and RXONLY
fields.SPI error
Possible interrupt types. Enable these in SPIx_IER. Check with SR. Clear with IFCR