Struct stm32_hal2::pac::rcc::c1_apb4lpenr::W
source · [−]pub struct W(_);
Expand description
Register C1_APB4LPENR
writer
Implementations
sourceimpl W
impl W
sourcepub fn syscfglpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 1>
pub fn syscfglpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 1>
Bit 1 - SYSCFG peripheral clock enable during CSleep mode
sourcepub fn lpuart1lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 3>
pub fn lpuart1lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 3>
Bit 3 - LPUART1 Peripheral Clocks Enable During CSleep Mode
sourcepub fn spi6lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 5>
pub fn spi6lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 5>
Bit 5 - SPI6 Peripheral Clocks Enable During CSleep Mode
sourcepub fn i2c4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 7>
pub fn i2c4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 7>
Bit 7 - I2C4 Peripheral Clocks Enable During CSleep Mode
sourcepub fn lptim2lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 9>
pub fn lptim2lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 9>
Bit 9 - LPTIM2 Peripheral Clocks Enable During CSleep Mode
sourcepub fn lptim3lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 10>
pub fn lptim3lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 10>
Bit 10 - LPTIM3 Peripheral Clocks Enable During CSleep Mode
sourcepub fn lptim4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 11>
pub fn lptim4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 11>
Bit 11 - LPTIM4 Peripheral Clocks Enable During CSleep Mode
sourcepub fn lptim5lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 12>
pub fn lptim5lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 12>
Bit 12 - LPTIM5 Peripheral Clocks Enable During CSleep Mode
sourcepub fn comp12lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 14>
pub fn comp12lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 14>
Bit 14 - COMP1/2 peripheral clock enable during CSleep mode
sourcepub fn vreflpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 15>
pub fn vreflpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 15>
Bit 15 - VREF peripheral clock enable during CSleep mode
sourcepub fn rtcapblpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 16>
pub fn rtcapblpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 16>
Bit 16 - RTC APB Clock Enable During CSleep Mode
sourcepub fn sai4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 21>
pub fn sai4lpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 21>
Bit 21 - SAI4 Peripheral Clocks Enable During CSleep Mode
sourcepub fn dtslpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 26>
pub fn dtslpen(
&mut self
) -> BitWriterRaw<'_, u32, C1_APB4LPENR_SPEC, SYSCFGLPEN_A, BitM, 26>
Bit 26 - Digital temperature sensor block enable during CSleep Mode
Methods from Deref<Target = W<C1_APB4LPENR_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.