Struct stm32_hal2::pac::rcc::c1_ahb3lpenr::W

pub struct W(_);

Register C1_AHB3LPENR writer

Implementations

impl W

pub fn mdmalpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 0>

Bit 0 - MDMA Clock Enable During CSleep Mode

pub fn dma2dlpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 4>

Bit 4 - DMA2D Clock Enable During CSleep Mode

pub fn flashpren(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, bool, BitM, 8>

Bit 8 - Flash interface clock enable during csleep mode

pub fn fmclpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 12>

Bit 12 - FMC Peripheral Clocks Enable During CSleep Mode

pub fn sdmmc1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 16>

Bit 16 - SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode

pub fn d1dtcm1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 28>

Bit 28 - D1DTCM1 Block Clock Enable During CSleep mode

pub fn dtcm2lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 29>

Bit 29 - D1 DTCM2 Block Clock Enable During CSleep mode

pub fn itcmlpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 30>

Bit 30 - D1ITCM Block Clock Enable During CSleep mode

pub fn axisramlpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 31>

Bit 31 - AXISRAM Block Clock Enable During CSleep mode

pub fn octospi1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 14>

Bit 14 - OCTOSPI1 and OCTOSPI1 delay block enable during CSleep Mode

pub fn octospi2lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 19>

Bit 19 - OCTOSPI2 and OCTOSPI2 delay block enable during CSleep Mode

pub fn iomngrlpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 21>

Bit 21 - OCTOSPI IO manager enable during CSleep Mode

pub fn otfd1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 22>

Bit 22 - OTFDEC1 enable during CSleep Mode

pub fn otfd2lpen(
    &mut self
) -> BitWriterRaw<'_, u32, C1_AHB3LPENR_SPEC, MDMALPEN_A, BitM, 23>

Bit 23 - OTFDEC2 enable during CSleep Mode

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<C1_AHB3LPENR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<C1_AHB3LPENR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<C1_AHB3LPENR_SPEC>> for W

fn from(writer: W<C1_AHB3LPENR_SPEC>) -> W

Converts to this type from the input type.