Struct stm32_hal2::pac::rcc::apb2lpenr::W

pub struct W(_);

Register APB2LPENR writer

Implementations

impl W

pub fn tim1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 0>

Bit 0 - TIM1 peripheral clock enable during CSleep mode

pub fn tim8lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 1>

Bit 1 - TIM8 peripheral clock enable during CSleep mode

pub fn usart1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 4>

Bit 4 - USART1 Peripheral Clocks Enable During CSleep Mode

pub fn usart6lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 5>

Bit 5 - USART6 Peripheral Clocks Enable During CSleep Mode

pub fn spi1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 12>

Bit 12 - SPI1 Peripheral Clocks Enable During CSleep Mode

pub fn spi4lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 13>

Bit 13 - SPI4 Peripheral Clocks Enable During CSleep Mode

pub fn tim15lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 16>

Bit 16 - TIM15 peripheral clock enable during CSleep mode

pub fn tim16lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 17>

Bit 17 - TIM16 peripheral clock enable during CSleep mode

pub fn tim17lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 18>

Bit 18 - TIM17 peripheral clock enable during CSleep mode

pub fn spi5lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 20>

Bit 20 - SPI5 Peripheral Clocks Enable During CSleep Mode

pub fn sai1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 22>

Bit 22 - SAI1 Peripheral Clocks Enable During CSleep Mode

pub fn sai2lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 23>

Bit 23 - SAI2 Peripheral Clocks Enable During CSleep Mode

pub fn sai3lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 24>

Bit 24 - SAI3 Peripheral Clocks Enable During CSleep Mode

pub fn dfsdm1lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 28>

Bit 28 - DFSDM1 Peripheral Clocks Enable During CSleep Mode

pub fn uart9lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 6>

Bit 6 - UART9 peripheral clocks enable during CSleep Mode

pub fn usart10lpen(
    &mut self
) -> BitWriterRaw<'_, u32, APB2LPENR_SPEC, TIM1LPEN_A, BitM, 7>

Bit 7 - USART10 peripheral clocks enable during CSleep Mode

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<APB2LPENR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<APB2LPENR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<APB2LPENR_SPEC>> for W

fn from(writer: W<APB2LPENR_SPEC>) -> W

Converts to this type from the input type.