Enum stm32_hal2::pac::iwdg1::pr::PR_A

#[repr(u8)]
pub enum PR_A {
    DivideBy4,
    DivideBy8,
    DivideBy16,
    DivideBy32,
    DivideBy64,
    DivideBy128,
    DivideBy256,
    DivideBy256bis,
}

Prescaler divider These bits are write access protected see Section23.3.6: Register access protection. They are written by software to select the prescaler divider feeding the counter clock. PVU bit of IWDG_SR must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the IWDG_SR register is reset.

Value on reset: 0

Variants

DivideBy4

0: Divider /4

DivideBy8

1: Divider /8

DivideBy16

2: Divider /16

DivideBy32

3: Divider /32

DivideBy64

4: Divider /64

DivideBy128

5: Divider /128

DivideBy256

6: Divider /256

DivideBy256bis

7: Divider /256

Trait Implementations

impl Clone for PR_A

fn clone(&self) -> PR_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for PR_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq<PR_A> for PR_A

fn eq(&self, other: &PR_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for PR_A

impl StructuralPartialEq for PR_A