pub struct W(_);
Expand description
Register CPUEMR2
writer
Implementations
sourceimpl W
impl W
sourcepub fn mr32(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 0>
pub fn mr32(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 0>
Bit 0 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr33(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 1>
pub fn mr33(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 1>
Bit 1 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr34(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 2>
pub fn mr34(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 2>
Bit 2 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr35(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 3>
pub fn mr35(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 3>
Bit 3 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr36(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 4>
pub fn mr36(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 4>
Bit 4 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr37(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 5>
pub fn mr37(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 5>
Bit 5 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr38(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 6>
pub fn mr38(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 6>
Bit 6 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr39(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 7>
pub fn mr39(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 7>
Bit 7 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr40(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 8>
pub fn mr40(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 8>
Bit 8 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr41(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 9>
pub fn mr41(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 9>
Bit 9 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr42(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 10>
pub fn mr42(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 10>
Bit 10 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr43(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 11>
pub fn mr43(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 11>
Bit 11 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr44(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 12>
pub fn mr44(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 12>
Bit 12 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr46(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 14>
pub fn mr46(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 14>
Bit 14 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr47(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 15>
pub fn mr47(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 15>
Bit 15 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr48(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 16>
pub fn mr48(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 16>
Bit 16 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr49(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 17>
pub fn mr49(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 17>
Bit 17 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr50(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 18>
pub fn mr50(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 18>
Bit 18 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr51(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 19>
pub fn mr51(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 19>
Bit 19 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr52(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 20>
pub fn mr52(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 20>
Bit 20 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr53(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 21>
pub fn mr53(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 21>
Bit 21 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr54(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 22>
pub fn mr54(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 22>
Bit 22 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr55(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 23>
pub fn mr55(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 23>
Bit 23 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr56(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 24>
pub fn mr56(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 24>
Bit 24 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr57(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 25>
pub fn mr57(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 25>
Bit 25 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr58(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 26>
pub fn mr58(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 26>
Bit 26 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr59(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 27>
pub fn mr59(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 27>
Bit 27 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr60(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 28>
pub fn mr60(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 28>
Bit 28 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr61(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 29>
pub fn mr61(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 29>
Bit 29 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr62(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 30>
pub fn mr62(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 30>
Bit 30 - CPU Interrupt Mask on Direct Event input x+32
sourcepub fn mr63(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 31>
pub fn mr63(&mut self) -> BitWriterRaw<'_, u32, CPUEMR2_SPEC, MR32_A, BitM, 31>
Bit 31 - CPU Interrupt Mask on Direct Event input x+32
Methods from Deref<Target = W<CPUEMR2_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.