Struct stm32_hal2::pac::dma1::lisr::R

pub struct R(_);

Register LISR reader

Implementations

impl R

pub fn tcif3(&self) -> BitReaderRaw<TCIF0_A>

Bit 27 - Stream x transfer complete interrupt flag (x = 3..0)

pub fn htif3(&self) -> BitReaderRaw<HTIF0_A>

Bit 26 - Stream x half transfer interrupt flag (x=3..0)

pub fn teif3(&self) -> BitReaderRaw<TEIF0_A>

Bit 25 - Stream x transfer error interrupt flag (x=3..0)

pub fn dmeif3(&self) -> BitReaderRaw<DMEIF0_A>

Bit 24 - Stream x direct mode error interrupt flag (x=3..0)

pub fn feif3(&self) -> BitReaderRaw<FEIF0_A>

Bit 22 - Stream x FIFO error interrupt flag (x=3..0)

pub fn tcif2(&self) -> BitReaderRaw<TCIF0_A>

Bit 21 - Stream x transfer complete interrupt flag (x = 3..0)

pub fn htif2(&self) -> BitReaderRaw<HTIF0_A>

Bit 20 - Stream x half transfer interrupt flag (x=3..0)

pub fn teif2(&self) -> BitReaderRaw<TEIF0_A>

Bit 19 - Stream x transfer error interrupt flag (x=3..0)

pub fn dmeif2(&self) -> BitReaderRaw<DMEIF0_A>

Bit 18 - Stream x direct mode error interrupt flag (x=3..0)

pub fn feif2(&self) -> BitReaderRaw<FEIF0_A>

Bit 16 - Stream x FIFO error interrupt flag (x=3..0)

pub fn tcif1(&self) -> BitReaderRaw<TCIF0_A>

Bit 11 - Stream x transfer complete interrupt flag (x = 3..0)

pub fn htif1(&self) -> BitReaderRaw<HTIF0_A>

Bit 10 - Stream x half transfer interrupt flag (x=3..0)

pub fn teif1(&self) -> BitReaderRaw<TEIF0_A>

Bit 9 - Stream x transfer error interrupt flag (x=3..0)

pub fn dmeif1(&self) -> BitReaderRaw<DMEIF0_A>

Bit 8 - Stream x direct mode error interrupt flag (x=3..0)

pub fn feif1(&self) -> BitReaderRaw<FEIF0_A>

Bit 6 - Stream x FIFO error interrupt flag (x=3..0)

pub fn tcif0(&self) -> BitReaderRaw<TCIF0_A>

Bit 5 - Stream x transfer complete interrupt flag (x = 3..0)

pub fn htif0(&self) -> BitReaderRaw<HTIF0_A>

Bit 4 - Stream x half transfer interrupt flag (x=3..0)

pub fn teif0(&self) -> BitReaderRaw<TEIF0_A>

Bit 3 - Stream x transfer error interrupt flag (x=3..0)

pub fn dmeif0(&self) -> BitReaderRaw<DMEIF0_A>

Bit 2 - Stream x direct mode error interrupt flag (x=3..0)

pub fn feif0(&self) -> BitReaderRaw<FEIF0_A>

Bit 0 - Stream x FIFO error interrupt flag (x=3..0)

Methods from Deref<Target = R<LISR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<LISR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<LISR_SPEC>> for R

fn from(reader: R<LISR_SPEC>) -> R

Converts to this type from the input type.