Module stm32_hal2::pac::gpioa
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GPIO
Modules
GPIO alternate function high register
GPIO alternate function low register
GPIO port bit set/reset register
GPIO port input data register
This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits [15:0] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR[15:0] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset.A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence.Each lock bit freezes a specific configuration register (control and alternate function registers).
GPIO port mode register
GPIO port output data register
GPIO port output speed register
GPIO port output type register
GPIO port pull-up/pull-down register
Structs
Register block
Type Definitions
AFRH register accessor: an alias for Reg<AFRH_SPEC>
AFRL register accessor: an alias for Reg<AFRL_SPEC>
BSRR register accessor: an alias for Reg<BSRR_SPEC>
IDR register accessor: an alias for Reg<IDR_SPEC>
LCKR register accessor: an alias for Reg<LCKR_SPEC>
MODER register accessor: an alias for Reg<MODER_SPEC>
ODR register accessor: an alias for Reg<ODR_SPEC>
OSPEEDR register accessor: an alias for Reg<OSPEEDR_SPEC>
OTYPER register accessor: an alias for Reg<OTYPER_SPEC>
PUPDR register accessor: an alias for Reg<PUPDR_SPEC>