Struct stm32_hal2::pac::tim16::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {}Show fields
pub cr1: Reg<u32, _CR1>, pub cr2: Reg<u32, _CR2>, pub dier: Reg<u32, _DIER>, pub sr: Reg<u32, _SR>, pub egr: Reg<u32, _EGR>, pub ccer: Reg<u32, _CCER>, pub cnt: Reg<u32, _CNT>, pub psc: Reg<u32, _PSC>, pub arr: Reg<u32, _ARR>, pub rcr: Reg<u32, _RCR>, pub ccr1: Reg<u32, _CCR1>, pub bdtr: Reg<u32, _BDTR>, pub dcr: Reg<u32, _DCR>, pub dmar: Reg<u32, _DMAR>, pub or1: Reg<u32, _OR1>, pub or2: Reg<u32, _OR2>, // some fields omitted
Expand description
Register block
Fields
cr1: Reg<u32, _CR1>
0x00 - control register 1
cr2: Reg<u32, _CR2>
0x04 - control register 2
dier: Reg<u32, _DIER>
0x0c - DMA/Interrupt enable register
sr: Reg<u32, _SR>
0x10 - status register
egr: Reg<u32, _EGR>
0x14 - event generation register
ccer: Reg<u32, _CCER>
0x20 - capture/compare enable register
cnt: Reg<u32, _CNT>
0x24 - counter
psc: Reg<u32, _PSC>
0x28 - prescaler
arr: Reg<u32, _ARR>
0x2c - auto-reload register
rcr: Reg<u32, _RCR>
0x30 - repetition counter register
ccr1: Reg<u32, _CCR1>
0x34 - capture/compare register 1
bdtr: Reg<u32, _BDTR>
0x44 - break and dead-time register
dcr: Reg<u32, _DCR>
0x48 - DMA control register
dmar: Reg<u32, _DMAR>
0x4c - DMA address for full transfer
or1: Reg<u32, _OR1>
0x50 - TIM16 option register 1
or2: Reg<u32, _OR2>
0x60 - TIM17 option register 1
Implementations
impl RegisterBlock
[src]
impl RegisterBlock
[src]pub fn ccmr1_input(&self) -> &Reg<u32, _CCMR1_INPUT>
[src]
pub fn ccmr1_input(&self) -> &Reg<u32, _CCMR1_INPUT>
[src]0x18 - capture/compare mode register 1 (input mode)
pub fn ccmr1_input_mut(&self) -> &mut Reg<u32, _CCMR1_INPUT>
[src]
pub fn ccmr1_input_mut(&self) -> &mut Reg<u32, _CCMR1_INPUT>
[src]0x18 - capture/compare mode register 1 (input mode)
pub fn ccmr1_output(&self) -> &Reg<u32, _CCMR1_OUTPUT>
[src]
pub fn ccmr1_output(&self) -> &Reg<u32, _CCMR1_OUTPUT>
[src]0x18 - capture/compare mode register (output mode)
pub fn ccmr1_output_mut(&self) -> &mut Reg<u32, _CCMR1_OUTPUT>
[src]
pub fn ccmr1_output_mut(&self) -> &mut Reg<u32, _CCMR1_OUTPUT>
[src]0x18 - capture/compare mode register (output mode)