Enum stm32_hal2::pac::tim6::cr1::URS_A [−][src]
pub enum URS_A { ANYEVENT, COUNTERONLY, }
Update request source
Value on reset: 0
Variants
0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request
1: Only counter overflow/underflow generates an update interrupt or DMA request
Trait Implementations
impl Clone for URS_A
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impl Clone for URS_A
[src]pub fn clone(&self) -> URS_A
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pub fn clone_from(&mut self, source: &Self)
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impl StructuralPartialEq for URS_A
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impl StructuralPartialEq for URS_A
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