Struct stm32_hal2::pac::dma1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {

    pub isr: Reg<u32, _ISR>,
    pub ifcr: Reg<u32, _IFCR>,
    pub ccr1: Reg<u32, _CCR1>,
    pub cndtr1: Reg<u32, _CNDTR1>,
    pub cpar1: Reg<u32, _CPAR1>,
    pub cmar1: Reg<u32, _CMAR1>,
    pub ccr2: Reg<u32, _CCR2>,
    pub cndtr2: Reg<u32, _CNDTR2>,
    pub cpar2: Reg<u32, _CPAR2>,
    pub cmar2: Reg<u32, _CMAR2>,
    pub ccr3: Reg<u32, _CCR3>,
    pub cndtr3: Reg<u32, _CNDTR3>,
    pub cpar3: Reg<u32, _CPAR3>,
    pub cmar3: Reg<u32, _CMAR3>,
    pub ccr4: Reg<u32, _CCR4>,
    pub cndtr4: Reg<u32, _CNDTR4>,
    pub cpar4: Reg<u32, _CPAR4>,
    pub cmar4: Reg<u32, _CMAR4>,
    pub ccr5: Reg<u32, _CCR5>,
    pub cndtr5: Reg<u32, _CNDTR5>,
    pub cpar5: Reg<u32, _CPAR5>,
    pub cmar5: Reg<u32, _CMAR5>,
    pub ccr6: Reg<u32, _CCR6>,
    pub cndtr6: Reg<u32, _CNDTR6>,
    pub cpar6: Reg<u32, _CPAR6>,
    pub cmar6: Reg<u32, _CMAR6>,
    pub ccr7: Reg<u32, _CCR7>,
    pub cndtr7: Reg<u32, _CNDTR7>,
    pub cpar7: Reg<u32, _CPAR7>,
    pub cmar7: Reg<u32, _CMAR7>,
    pub cselr: Reg<u32, _CSELR>,
    // some fields omitted
}

Register block

Fields

isr: Reg<u32, _ISR>

0x00 - interrupt status register

ifcr: Reg<u32, _IFCR>

0x04 - interrupt flag clear register

ccr1: Reg<u32, _CCR1>

0x08 - channel x configuration register

cndtr1: Reg<u32, _CNDTR1>

0x0c - channel x number of data register

cpar1: Reg<u32, _CPAR1>

0x10 - channel x peripheral address register

cmar1: Reg<u32, _CMAR1>

0x14 - channel x memory address register

ccr2: Reg<u32, _CCR2>

0x1c - channel x configuration register

cndtr2: Reg<u32, _CNDTR2>

0x20 - channel x number of data register

cpar2: Reg<u32, _CPAR2>

0x24 - channel x peripheral address register

cmar2: Reg<u32, _CMAR2>

0x28 - channel x memory address register

ccr3: Reg<u32, _CCR3>

0x30 - channel x configuration register

cndtr3: Reg<u32, _CNDTR3>

0x34 - channel x number of data register

cpar3: Reg<u32, _CPAR3>

0x38 - channel x peripheral address register

cmar3: Reg<u32, _CMAR3>

0x3c - channel x memory address register

ccr4: Reg<u32, _CCR4>

0x44 - channel x configuration register

cndtr4: Reg<u32, _CNDTR4>

0x48 - channel x number of data register

cpar4: Reg<u32, _CPAR4>

0x4c - channel x peripheral address register

cmar4: Reg<u32, _CMAR4>

0x50 - channel x memory address register

ccr5: Reg<u32, _CCR5>

0x58 - channel x configuration register

cndtr5: Reg<u32, _CNDTR5>

0x5c - channel x number of data register

cpar5: Reg<u32, _CPAR5>

0x60 - channel x peripheral address register

cmar5: Reg<u32, _CMAR5>

0x64 - channel x memory address register

ccr6: Reg<u32, _CCR6>

0x6c - channel x configuration register

cndtr6: Reg<u32, _CNDTR6>

0x70 - channel x number of data register

cpar6: Reg<u32, _CPAR6>

0x74 - channel x peripheral address register

cmar6: Reg<u32, _CMAR6>

0x78 - channel x memory address register

ccr7: Reg<u32, _CCR7>

0x80 - channel x configuration register

cndtr7: Reg<u32, _CNDTR7>

0x84 - channel x number of data register

cpar7: Reg<u32, _CPAR7>

0x88 - channel x peripheral address register

cmar7: Reg<u32, _CMAR7>

0x8c - channel x memory address register

cselr: Reg<u32, _CSELR>

0xa8 - channel selection register