Expand description
SDI clock control register
Structs§
- CLKCR_
SPEC - SDI clock control register
- R
- Register
CLKCR
reader - W
- Register
CLKCR
writer
Enums§
- BYPASS_
A - Clock divider bypass enable bit
- CLKEN_A
- Clock enable bit
- HWFC_
EN_ A - HW Flow Control enable
- NEGEDGE_
A - SDIO_CK dephasing selection bit
- PWRSAV_
A - Power saving configuration bit
- WIDBUS_
A - Wide bus mode enable bit
Type Aliases§
- BYPASS_
R - Field
BYPASS
reader - Clock divider bypass enable bit - BYPASS_
W - Field
BYPASS
writer - Clock divider bypass enable bit - CLKDIV_
R - Field
CLKDIV
reader - Clock divide factor - CLKDIV_
W - Field
CLKDIV
writer - Clock divide factor - CLKEN_R
- Field
CLKEN
reader - Clock enable bit - CLKEN_W
- Field
CLKEN
writer - Clock enable bit - HWFC_
EN_ R - Field
HWFC_EN
reader - HW Flow Control enable - HWFC_
EN_ W - Field
HWFC_EN
writer - HW Flow Control enable - NEGEDGE_
R - Field
NEGEDGE
reader - SDIO_CK dephasing selection bit - NEGEDGE_
W - Field
NEGEDGE
writer - SDIO_CK dephasing selection bit - PWRSAV_
R - Field
PWRSAV
reader - Power saving configuration bit - PWRSAV_
W - Field
PWRSAV
writer - Power saving configuration bit - WIDBUS_
R - Field
WIDBUS
reader - Wide bus mode enable bit - WIDBUS_
W - Field
WIDBUS
writer - Wide bus mode enable bit