Module adc1

Source
Expand description

Analog-to-digital converter

Modules§

cr1
control register 1
cr2
control register 2
dr
regular data register
htr
watchdog higher threshold register
jdr
injected data register x
jofr
injected channel data offset register x
jsqr
injected sequence register
ltr
watchdog lower threshold register
smpr1
sample time register 1
smpr2
sample time register 2
sqr1
regular sequence register 1
sqr2
regular sequence register 2
sqr3
regular sequence register 3
sr
status register

Structs§

RegisterBlock
Register block

Type Aliases§

CR1
CR1 register accessor: an alias for Reg<CR1_SPEC>
CR2
CR2 register accessor: an alias for Reg<CR2_SPEC>
DR
DR register accessor: an alias for Reg<DR_SPEC>
HTR
HTR register accessor: an alias for Reg<HTR_SPEC>
JDR
JDR register accessor: an alias for Reg<JDR_SPEC>
JOFR
JOFR register accessor: an alias for Reg<JOFR_SPEC>
JSQR
JSQR register accessor: an alias for Reg<JSQR_SPEC>
LTR
LTR register accessor: an alias for Reg<LTR_SPEC>
SMPR1
SMPR1 register accessor: an alias for Reg<SMPR1_SPEC>
SMPR2
SMPR2 register accessor: an alias for Reg<SMPR2_SPEC>
SQR1
SQR1 register accessor: an alias for Reg<SQR1_SPEC>
SQR2
SQR2 register accessor: an alias for Reg<SQR2_SPEC>
SQR3
SQR3 register accessor: an alias for Reg<SQR3_SPEC>
SR
SR register accessor: an alias for Reg<SR_SPEC>