Module sdcr

Module sdcr 

Source
Expand description

SDRAM Control Register 1

Structs§

R
Register SDCR%s reader
SDCR_SPEC
SDRAM Control Register 1
W
Register SDCR%s writer

Enums§

CAS_A
CAS latency
MWID_A
Memory data bus width
NB_A
Number of internal banks
NC_A
Number of column address bits
NR_A
Number of row address bits
RBURST_A
Burst read
RPIPE_A
Read pipe
SDCLK_A
SDRAM clock configuration
WP_A
Write protection

Type Aliases§

CAS_R
Field CAS reader - CAS latency
CAS_W
Field CAS writer - CAS latency
MWID_R
Field MWID reader - Memory data bus width
MWID_W
Field MWID writer - Memory data bus width
NB_R
Field NB reader - Number of internal banks
NB_W
Field NB writer - Number of internal banks
NC_R
Field NC reader - Number of column address bits
NC_W
Field NC writer - Number of column address bits
NR_R
Field NR reader - Number of row address bits
NR_W
Field NR writer - Number of row address bits
RBURST_R
Field RBURST reader - Burst read
RBURST_W
Field RBURST writer - Burst read
RPIPE_R
Field RPIPE reader - Read pipe
RPIPE_W
Field RPIPE writer - Read pipe
SDCLK_R
Field SDCLK reader - SDRAM clock configuration
SDCLK_W
Field SDCLK writer - SDRAM clock configuration
WP_R
Field WP reader - Write protection
WP_W
Field WP writer - Write protection