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§STAGraph

A graph-based static timing analysis (GB-STA) engine.

§Feature

  • High-order net delay calculation.
  • GPU acceleration.

§Implementation details

§Units

The units are fixed to the following, throughout the entire STA engine. E.g., input libs, parasitics, constraints are all scaled to this set, and output are also in these units.

  • time: 1ps
  • voltage: 1V
  • current: 1mA
  • power: 1uW ( not used yet as we don’t support power analysis )
  • resistance: 1kOhm
  • capacitance: 1ff

It can be verified that:

  • res * cap == time;
  • cur == volt / res;

The fixation of such units is helpful in keeping the code consistent, and make full use of the IEEE 754 precisions.

§MIN/MAX and Corners

We intend to support a single corner only. Multi-corner should run multiple instances of this STA engine on different hosts/cards to reduce memory footprint.

This also means, we only calculate one of MIN/MAX for every GB-STA core instance. You need to specify which merge strategy to use before propagation. To achieve a complete analysis, You can run the core for two times and combine them to yield setup/hold reports.

Modules§

flatten_liberty
Liberty cell library flattening and database management.
flatten_parasitics
Parasitics file (SPEF) flattening and database management.
sta_unit
the unit definition. see the main document for explanations.

Structs§

STAArnoldiROM
The built arnoldi model consisting of driver resistance (Rd), poles of nets, and residues of pins.
STAConstraintArc
A constraint arc in graph.
STAGraph
The main STA graph consisting of levelized graph with liberty/parasitics annotations and initial slew drivers.
STAGraphArc
An arc in STA graph.

Enums§

MergingStrategy
The merging strategy when there are multiple options.

Constants§

Q
The model order is fixed as 4 for every net.