st7305_lcd/cmd/
nvm.rs

1use crate::{command::WriteCommand, instr::Instr};
2
3/// `NVMLOADCTRL` (§8.2.22): what is loaded from NVM and what triggers the
4/// load.
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6pub struct NvmLoadControl {
7    vs_en: SourceVoltageLoad,
8    id_en: IdLoad,
9    nrdtime: NvmLoadControlByTimer,
10    nrdslp: NvmLoadControlBySleepOut,
11}
12
13impl NvmLoadControl {
14    /// Register default `0x17, 0x00`: both items loaded, no trigger.
15    pub const DEFAULT: Self = Self {
16        vs_en: SourceVoltageLoad::Enable,
17        id_en: IdLoad::Enable,
18        nrdtime: NvmLoadControlByTimer::NotTrigger,
19        nrdslp: NvmLoadControlBySleepOut::NotTrigger,
20    };
21
22    /// `VS_EN`: load the source high/low voltages.
23    #[must_use]
24    pub const fn with_source_voltage_load(mut self, v: SourceVoltageLoad) -> Self {
25        self.vs_en = v;
26        self
27    }
28
29    /// `ID_EN`: load ID1/ID2/ID3.
30    #[must_use]
31    pub const fn with_id_load(mut self, v: IdLoad) -> Self {
32        self.id_en = v;
33        self
34    }
35
36    /// `NRDTIME`: a timer triggers the NVM load.
37    #[must_use]
38    pub const fn with_control_by_timer(mut self, v: NvmLoadControlByTimer) -> Self {
39        self.nrdtime = v;
40        self
41    }
42
43    /// `NRDSLP`: sleep out triggers the NVM load.
44    #[must_use]
45    pub const fn with_control_by_sleep_out(mut self, v: NvmLoadControlBySleepOut) -> Self {
46        self.nrdslp = v;
47        self
48    }
49
50    const fn bytes(&self) -> [u8; 2] {
51        [
52            0x17 & !(0b11 << 1) | (self.vs_en as u8) << 2 | (self.id_en as u8) << 1,
53            (self.nrdtime as u8) << 2 | (self.nrdslp as u8) << 1,
54        ]
55    }
56}
57
58impl Default for NvmLoadControl {
59    fn default() -> Self {
60        Self::DEFAULT
61    }
62}
63
64impl WriteCommand for NvmLoadControl {
65    const OPCODE: Instr = Instr::NVMLOADCTRL;
66    type Params = [u8; 2];
67    fn params(&self) -> Self::Params {
68        self.bytes()
69    }
70}
71
72/// `VS_EN`: source voltage load.
73#[derive(Clone, Copy, Debug, PartialEq, Eq)]
74pub enum SourceVoltageLoad {
75    /// Not loaded
76    Disable = 0,
77    /// Loaded
78    Enable = 1,
79}
80
81/// `ID_EN`: ID1/ID2/ID3 load.
82#[derive(Clone, Copy, Debug, PartialEq, Eq)]
83pub enum IdLoad {
84    /// Not loaded
85    Disable = 0,
86    /// Loaded
87    Enable = 1,
88}
89
90/// `NRDTIME`: NVM load by timer.
91#[derive(Clone, Copy, Debug, PartialEq, Eq)]
92pub enum NvmLoadControlByTimer {
93    /// The timer does not trigger a load
94    NotTrigger = 0,
95    /// The timer triggers a load
96    Trigger = 1,
97}
98
99/// `NRDSLP`: NVM load by sleep out.
100#[derive(Clone, Copy, Debug, PartialEq, Eq)]
101pub enum NvmLoadControlBySleepOut {
102    /// Sleep out does not trigger a load
103    NotTrigger = 0,
104    /// Sleep out triggers a load
105    Trigger = 1,
106}
107
108const _: () = assert!(matches!(NvmLoadControl::DEFAULT.bytes(), [0x17, 0x00]));
109
110/// `NVMCTRL1` (§8.2.26): NVM read and program modes. The key bytes
111/// `5Ah 69h EEh` are added by the command.
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub struct NvmWrRdControl {
114    prog: ProgramMode,
115    rd: ReadMode,
116}
117
118impl NvmWrRdControl {
119    /// Register default: both modes off.
120    pub const DEFAULT: Self = Self {
121        prog: ProgramMode::Disable,
122        rd: ReadMode::Disable,
123    };
124
125    /// `PROG`: program mode. Needs the `nvm-program` feature.
126    #[cfg(feature = "nvm-program")]
127    #[must_use]
128    pub const fn with_program_mode(mut self, v: ProgramMode) -> Self {
129        self.prog = v;
130        self
131    }
132
133    /// `RD`: read mode.
134    #[must_use]
135    pub const fn with_read_mode(mut self, v: ReadMode) -> Self {
136        self.rd = v;
137        self
138    }
139
140    const fn bytes(&self) -> [u8; 4] {
141        [
142            0x5A,
143            0x69,
144            0xEE,
145            (self.prog as u8) << 2 | (self.rd as u8) << 1,
146        ]
147    }
148}
149
150impl Default for NvmWrRdControl {
151    fn default() -> Self {
152        Self::DEFAULT
153    }
154}
155
156impl WriteCommand for NvmWrRdControl {
157    const OPCODE: Instr = Instr::NVMCTRL1;
158    type Params = [u8; 4];
159    fn params(&self) -> Self::Params {
160        self.bytes()
161    }
162}
163
164/// `PROG`: NVM program mode.
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum ProgramMode {
167    /// Off
168    Disable = 0,
169    /// On. Always present, so that `nvm-program` stays additive; it can only be
170    /// sent through `NvmWrRdControl::with_program_mode`, which needs the
171    /// feature.
172    Enable = 1,
173}
174
175/// `RD`: NVM read mode.
176#[derive(Clone, Copy, Debug, PartialEq, Eq)]
177pub enum ReadMode {
178    /// Off
179    Disable = 0,
180    /// On
181    Enable = 1,
182}
183
184const _: () = assert!(matches!(
185    NvmWrRdControl::DEFAULT.bytes(),
186    [0x5A, 0x69, 0xEE, 0x00]
187));
188
189/// `NVMRDEN` (§8.2.28): enables NVM read mode (sends the key `4Ah A5h`).
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub struct NvmReadEnable;
192
193impl NvmReadEnable {
194    const fn bytes(&self) -> [u8; 2] {
195        [0x4A, 0xA5]
196    }
197}
198
199impl WriteCommand for NvmReadEnable {
200    const OPCODE: Instr = Instr::NVMRDEN;
201    type Params = [u8; 2];
202    fn params(&self) -> Self::Params {
203        self.bytes()
204    }
205}
206
207const _: () = assert!(matches!(NvmReadEnable.bytes(), [0x4A, 0xA5]));
208
209#[cfg(feature = "nvm-program")]
210mod program;
211#[cfg(feature = "nvm-program")]
212pub use program::*;
st7305_lcd/cmd/nvm.rs

st7305_lcd/cmd/
nvm.rs
