Crate sse2neon

Expand description

x86 SSE-family SIMD intrinsics reimplemented on ARM NEON.

This crate mirrors the Intel _mm_* intrinsic surface (SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, CRC32C) on top of core::arch::aarch64 NEON. Most functions reproduce the observable x86 lane semantics under little-endian memory ordering. The float min/max functions use NEON min/max: they propagate NaN operands and order -0.0 below +0.0.

The SSE4.2 surface covers 64-bit compare (_mm_cmpgt_epi64), CRC32C (_mm_crc32_u8/u16/u32/u64), and population count (_mm_popcnt_u32/u64). The packed string-compare instructions (_mm_cmpistr* and _mm_cmpestr*) are not provided.

§Types

Four vector types match the Intel ABI. Each wraps a NEON register:

__m128 holds four f32 lanes over float32x4_t.
__m128d holds two f64 lanes over float64x2_t.
__m128i holds a 128-bit integer vector over int64x2_t.
__m64 holds a 64-bit integer vector over int64x1_t.

§Lane ordering

_mm_set_ps(w, z, y, x) places x in lane 0 and w in lane 3. Arguments read most-significant lane first. Memory stores least-significant lane first. _mm_setr_* reverses the argument order. Every set/setr function preserves this exact mapping.

§Platform

AArch64 only. The intrinsics use NEON registers that exist on ARMv8. The target must be little-endian, which every AArch64 target is.

§Safety

The public functions are safe. They wrap unsafe NEON intrinsic calls that carry no memory-safety preconditions when the target supports NEON, which is guaranteed on AArch64. Load and store functions that take raw pointers are marked unsafe and document their alignment and length requirements.

§no_std

The crate is #![no_std]. It depends only on core::arch::aarch64 and pulls in no allocator. Rounding for the float-to-int conversions uses NEON rounding ops that read the FPCR mode, so no libm dependency is needed.

Structs§

__m64: 64-bit integer vector.
__m128: 128-bit vector of four f32 lanes.
__m128d: 128-bit vector of two f64 lanes.
__m128i: 128-bit integer vector.

Constants§

_MM_DENORMALS_ZERO_MASK: Mask selecting the denormals-are-zero bit.
_MM_DENORMALS_ZERO_OFF: Denormals-are-zero disabled.
_MM_DENORMALS_ZERO_ON: Denormals-are-zero enabled.
_MM_FLUSH_ZERO_MASK: Mask selecting the flush-to-zero bit.
_MM_FLUSH_ZERO_OFF: Flush-to-zero disabled.
_MM_FLUSH_ZERO_ON: Flush-to-zero enabled.
_MM_FROUND_CEIL: Round toward positive infinity and raise exceptions.
_MM_FROUND_CUR_DIRECTION: Use the current MXCSR rounding mode.
_MM_FROUND_FLOOR: Round toward negative infinity and raise exceptions.
_MM_FROUND_NEARBYINT: Round with the current direction and suppress exceptions.
_MM_FROUND_NINT: Round to nearest and raise exceptions.
_MM_FROUND_NO_EXC: Suppress floating-point exceptions.
_MM_FROUND_RAISE_EXC: Raise floating-point exceptions (the default, value zero).
_MM_FROUND_RINT: Round with the current direction and raise exceptions.
_MM_FROUND_TO_NEAREST_INT: Round to nearest, ties to even.
_MM_FROUND_TO_NEG_INF: Round toward negative infinity.
_MM_FROUND_TO_POS_INF: Round toward positive infinity.
_MM_FROUND_TO_ZERO: Round toward zero (truncate).
_MM_FROUND_TRUNC: Round toward zero and raise exceptions.
_MM_HINT_NTA: Cache hint: non-temporal.
_MM_HINT_T0: Cache hint: prefetch to all levels.
_MM_HINT_T1: Cache hint: prefetch to L2 and higher.
_MM_HINT_T2: Cache hint: prefetch to L3 and higher.
_MM_ROUND_DOWN: MXCSR rounding mode: toward negative infinity.
_MM_ROUND_MASK: Mask selecting the MXCSR rounding-mode bits.
_MM_ROUND_NEAREST: MXCSR rounding mode: nearest.
_MM_ROUND_TOWARD_ZERO: MXCSR rounding mode: toward zero.
_MM_ROUND_UP: MXCSR rounding mode: toward positive infinity.
_SIDD_BIT_MASK: Mask output: one bit per element.
_SIDD_CMP_EQUAL_ANY: Comparison: any element of b equals any element of a.
_SIDD_CMP_EQUAL_EACH: Comparison: elements compare equal lane by lane.
_SIDD_CMP_EQUAL_ORDERED: Comparison: substring search.
_SIDD_CMP_RANGES: Comparison: elements of b fall inside ranges from a.
_SIDD_LEAST_SIGNIFICANT: Index output: least significant set bit.
_SIDD_MASKED_NEGATIVE_POLARITY: Polarity: negate, masked to valid b elements.
_SIDD_MASKED_POSITIVE_POLARITY: Polarity: keep, masked to valid b elements.
_SIDD_MOST_SIGNIFICANT: Index output: most significant set bit.
_SIDD_NEGATIVE_POLARITY: Polarity: negate the match bits.
_SIDD_POSITIVE_POLARITY: Polarity: keep the match bits as computed.
_SIDD_SBYTE_OPS: String data format: signed bytes.
_SIDD_SWORD_OPS: String data format: signed words.
_SIDD_UBYTE_OPS: String data format: unsigned bytes.
_SIDD_UNIT_MASK: Mask output: one full element per bit.
_SIDD_UWORD_OPS: String data format: unsigned words.

Functions§

_MM_GET_DENORMALS_ZERO_MODE: Read the denormals-are-zero mode. ARM ties DAZ to the same bit as FTZ.
_MM_GET_FLUSH_ZERO_MODE: Read the flush-to-zero mode as _MM_FLUSH_ZERO_ON or _MM_FLUSH_ZERO_OFF.
_MM_GET_ROUNDING_MODE: Read the current rounding mode as one of the _MM_ROUND_* values.
_MM_SET_DENORMALS_ZERO_MODE: Set the denormals-are-zero mode. Matches _MM_SET_DENORMALS_ZERO_MODE.
_MM_SET_FLUSH_ZERO_MODE: Set the flush-to-zero mode. Matches _MM_SET_FLUSH_ZERO_MODE.
_MM_SET_ROUNDING_MODE: Set the rounding mode from a _MM_ROUND_* value.
_MM_SHUFFLE: Pack four 2-bit lane selectors into a shuffle immediate.
_MM_SHUFFLE2: Pack two 1-bit lane selectors into a shuffle immediate for _mm_shuffle_pd.
_mm_abs_epi8: Absolute value of sixteen i8 lanes. Matches _mm_abs_epi8.
_mm_abs_epi16: Absolute value of eight i16 lanes. Matches _mm_abs_epi16.
_mm_abs_epi32: Absolute value of four i32 lanes. Matches _mm_abs_epi32.
_mm_add_epi8: Add sixteen i8 lanes with wraparound. Matches _mm_add_epi8.
_mm_add_epi16: Add eight i16 lanes with wraparound. Matches _mm_add_epi16.
_mm_add_epi32: Add four i32 lanes with wraparound. Matches _mm_add_epi32.
_mm_add_epi64: Add two i64 lanes with wraparound. Matches _mm_add_epi64.
_mm_add_pd: Add two f64 lanes. Matches _mm_add_pd.
_mm_add_pi16: Add four i16 lanes with wraparound. Matches _mm_add_pi16.
_mm_add_pi32: Add two i32 lanes with wraparound. Matches _mm_add_pi32.
_mm_add_ps: Add four packed f32 lanes. Matches _mm_add_ps.
_mm_add_sd: Add the low lanes, copy the high lane from a. Matches _mm_add_sd.
_mm_add_ss: Add the low lanes and copy the upper three from a. Matches _mm_add_ss.
_mm_adds_epi8: Add sixteen i8 lanes with signed saturation. Matches _mm_adds_epi8.
_mm_adds_epi16: Add eight i16 lanes with signed saturation. Matches _mm_adds_epi16.
_mm_adds_epu8: Add sixteen u8 lanes with unsigned saturation. Matches _mm_adds_epu8.
_mm_adds_epu16: Add eight u16 lanes with unsigned saturation. Matches _mm_adds_epu16.
_mm_addsub_pd: Add odd lane, subtract even lane: a0-b0, a1+b1. Matches _mm_addsub_pd.
_mm_addsub_ps: Add odd lanes and subtract even lanes: a0-b0, a1+b1, a2-b2, a3+b3. Matches _mm_addsub_ps.
_mm_aesdec_si128: One AES decryption round: InvShiftRows, InvSubBytes, InvMixColumns, XOR key. Matches _mm_aesdec_si128.
_mm_aesdeclast_si128: Last AES decryption round: InvShiftRows, InvSubBytes, then XOR the key. Matches _mm_aesdeclast_si128.
_mm_aesenc_si128: One AES encryption round: ShiftRows, SubBytes, MixColumns, then XOR the key. Matches _mm_aesenc_si128.
_mm_aesenclast_si128: Last AES encryption round: ShiftRows, SubBytes, then XOR the key. Matches _mm_aesenclast_si128.
_mm_aesimc_si128: Apply InvMixColumns to a. Matches _mm_aesimc_si128.
_mm_aeskeygenassist_si128: Assist AES key expansion. Matches _mm_aeskeygenassist_si128.
_mm_alignr_epi8: Concatenate b:a, shift right by IMM bytes, keep the low 16. Matches _mm_alignr_epi8.
_mm_and_pd: Bitwise AND of two f64 vectors. Matches _mm_and_pd.
_mm_and_ps: Bitwise AND of two f32 vectors. Matches _mm_and_ps.
_mm_and_si128: Bitwise AND of two integer vectors. Matches _mm_and_si128.
_mm_andnot_pd: Bitwise (!a) & b. The NOT applies to a. Matches _mm_andnot_pd.
_mm_andnot_ps: Bitwise (!a) & b. The NOT applies to a. Matches _mm_andnot_ps.
_mm_andnot_si128: Bitwise (!a) & b. The NOT applies to a. Matches _mm_andnot_si128.
_mm_avg_epu8: Rounded average of sixteen u8 lanes. Matches _mm_avg_epu8.
_mm_avg_epu16: Rounded average of eight u16 lanes. Matches _mm_avg_epu16.
_mm_avg_pu8: Rounded average of eight u8 lanes. Matches _mm_avg_pu8.
_mm_avg_pu16: Rounded average of four u16 lanes. Matches _mm_avg_pu16.
_mm_blend_epi16: Blend eight i16 lanes by the immediate mask. Matches _mm_blend_epi16.
_mm_blend_pd: Blend two f64 lanes by the immediate mask. Matches _mm_blend_pd.
_mm_blend_ps: Blend four f32 lanes by the immediate mask. Matches _mm_blend_ps.
_mm_blendv_epi8: Blend sixteen i8 lanes by the sign bit of each mask lane. Matches _mm_blendv_epi8.
_mm_blendv_pd: Blend two f64 lanes by the sign bit of each mask lane. Matches _mm_blendv_pd.
_mm_blendv_ps: Blend four f32 lanes by the sign bit of each mask lane. Matches _mm_blendv_ps.
_mm_bslli_si128: Alias of _mm_slli_si128. Matches _mm_bslli_si128.
_mm_bsrli_si128: Alias of _mm_srli_si128. Matches _mm_bsrli_si128.
_mm_castpd_ps: Cast between vector types without changing bits. Matches _mm_castpd_ps.
_mm_castpd_si128: Cast between vector types without changing bits. Matches _mm_castpd_si128.
_mm_castps_pd: Cast between vector types without changing bits. Matches _mm_castps_pd.
_mm_castps_si128: Cast between vector types without changing bits.
_mm_castsi128_pd: Cast between vector types without changing bits. Matches _mm_castsi128_pd.
_mm_castsi128_ps: Cast between vector types without changing bits. Matches _mm_castsi128_ps.
_mm_ceil_pd: Round two f64 lanes toward positive infinity. Matches _mm_ceil_pd.
_mm_ceil_ps: Round four f32 lanes toward positive infinity. Matches _mm_ceil_ps.
_mm_ceil_sd: Ceil lane 0 of b, high lane from a. Matches _mm_ceil_sd.
_mm_ceil_ss: Ceil lane 0 of b, upper lanes from a. Matches _mm_ceil_ss.
_mm_clmulepi64_si128: Carry-less multiply of selected 64-bit halves. Matches _mm_clmulepi64_si128.
_mm_cmpeq_epi8: Lanes where sixteen i8 are equal become all-ones. Matches _mm_cmpeq_epi8.
_mm_cmpeq_epi16: Lanes where eight i16 are equal become all-ones. Matches _mm_cmpeq_epi16.
_mm_cmpeq_epi32: Lanes where four i32 are equal become all-ones. Matches _mm_cmpeq_epi32.
_mm_cmpeq_epi64: Compare two i64 lanes for equality. Matches _mm_cmpeq_epi64.
_mm_cmpeq_pd: Compare a == b lane-wise. Matches _mm_cmpeq_pd.
_mm_cmpeq_ps: Lanes where a == b become all-ones, else all-zeros. Matches _mm_cmpeq_ps.
_mm_cmpeq_ss: Scalar == on lane 0. Matches _mm_cmpeq_ss.
_mm_cmpge_pd: Compare a >= b lane-wise. Matches _mm_cmpge_pd.
_mm_cmpge_ps: Compare a >= b lane-wise. Matches _mm_cmpge_ps.
_mm_cmpge_ss: Scalar >= on lane 0. Matches _mm_cmpge_ss.
_mm_cmpgt_epi8: Signed a > b for sixteen i8 lanes. Matches _mm_cmpgt_epi8.
_mm_cmpgt_epi16: Signed a > b for eight i16 lanes. Matches _mm_cmpgt_epi16.
_mm_cmpgt_epi32: Signed a > b for four i32 lanes. Matches _mm_cmpgt_epi32.
_mm_cmpgt_epi64: Signed a > b for two i64 lanes. Matches _mm_cmpgt_epi64.
_mm_cmpgt_pd: Compare a > b lane-wise. Matches _mm_cmpgt_pd.
_mm_cmpgt_ps: Compare a > b lane-wise. Matches _mm_cmpgt_ps.
_mm_cmpgt_ss: Scalar > on lane 0. Matches _mm_cmpgt_ss.
_mm_cmple_pd: Compare a <= b lane-wise. Matches _mm_cmple_pd.
_mm_cmple_ps: Compare a <= b lane-wise. Matches _mm_cmple_ps.
_mm_cmple_ss: Scalar <= on lane 0. Matches _mm_cmple_ss.
_mm_cmplt_epi8: Signed a < b for sixteen i8 lanes. Matches _mm_cmplt_epi8.
_mm_cmplt_epi16: Signed a < b for eight i16 lanes. Matches _mm_cmplt_epi16.
_mm_cmplt_epi32: Signed a < b for four i32 lanes. Matches _mm_cmplt_epi32.
_mm_cmplt_pd: Compare a < b lane-wise. Matches _mm_cmplt_pd.
_mm_cmplt_ps: Compare a < b lane-wise. Matches _mm_cmplt_ps.
_mm_cmplt_ss: Scalar < on lane 0. Matches _mm_cmplt_ss.
_mm_cmpneq_pd: Compare a != b lane-wise. Matches _mm_cmpneq_pd.
_mm_cmpneq_ps: Compare a != b lane-wise. Matches _mm_cmpneq_ps.
_mm_cmpneq_ss: Scalar != on lane 0. Matches _mm_cmpneq_ss.
_mm_cmpnge_ps: Compare !(a >= b) lane-wise. Matches _mm_cmpnge_ps.
_mm_cmpnge_ss: Scalar !(>=) on lane 0. Matches _mm_cmpnge_ss.
_mm_cmpngt_ps: Compare !(a > b) lane-wise. Matches _mm_cmpngt_ps.
_mm_cmpngt_ss: Scalar !(>) on lane 0. Matches _mm_cmpngt_ss.
_mm_cmpnle_ps: Compare !(a <= b) lane-wise. Matches _mm_cmpnle_ps.
_mm_cmpnle_ss: Scalar !(<=) on lane 0. Matches _mm_cmpnle_ss.
_mm_cmpnlt_ps: Compare !(a < b) lane-wise. Matches _mm_cmpnlt_ps.
_mm_cmpnlt_ss: Scalar !(<) on lane 0. Matches _mm_cmpnlt_ss.
_mm_cmpord_pd: Ordered compare: all-ones where neither lane is NaN. Matches _mm_cmpord_pd.
_mm_cmpord_ps: Ordered compare: all-ones where neither lane is NaN. Matches _mm_cmpord_ps.
_mm_cmpord_ss: Scalar ordered test on lane 0. Matches _mm_cmpord_ss.
_mm_cmpunord_pd: Unordered compare: all-ones where either lane is NaN. Matches _mm_cmpunord_pd.
_mm_cmpunord_ps: Unordered compare: all-ones where either lane is NaN. Matches _mm_cmpunord_ps.
_mm_cmpunord_ss: Scalar unordered test on lane 0. Matches _mm_cmpunord_ss.
_mm_comieq_ss: Compare lane 0 for equality. Returns 1 or 0. NaN yields 0. Matches _mm_comieq_ss.
_mm_comige_ss: Compare lane 0 with >=. Returns 1 or 0. Matches _mm_comige_ss.
_mm_comigt_ss: Compare lane 0 with >. Returns 1 or 0. Matches _mm_comigt_ss.
_mm_comile_ss: Compare lane 0 with <=. Returns 1 or 0. Matches _mm_comile_ss.
_mm_comilt_ss: Compare lane 0 with <. Returns 1 or 0. Matches _mm_comilt_ss.
_mm_comineq_ss: Compare lane 0 for inequality. NaN yields 1. Matches _mm_comineq_ss.
_mm_crc32_u8: Accumulate one byte into a CRC-32C checksum. Matches _mm_crc32_u8.
_mm_crc32_u16: Accumulate two bytes into a CRC-32C checksum. Matches _mm_crc32_u16.
_mm_crc32_u32: Accumulate four bytes into a CRC-32C checksum. Matches _mm_crc32_u32.
_mm_crc32_u64: Accumulate eight bytes into a CRC-32C checksum. Matches _mm_crc32_u64.
_mm_cvtepi8_epi16: Sign-extend the low eight i8 to i16. Matches _mm_cvtepi8_epi16.
_mm_cvtepi8_epi32: Sign-extend the low four i8 to i32. Matches _mm_cvtepi8_epi32.
_mm_cvtepi16_epi32: Sign-extend the low four i16 to i32. Matches _mm_cvtepi16_epi32.
_mm_cvtepi32_epi64: Sign-extend the low two i32 to i64. Matches _mm_cvtepi32_epi64.
_mm_cvtepi32_pd: Convert two i32 (low lanes) to two f64. Matches _mm_cvtepi32_pd.
_mm_cvtepi32_ps: Convert four i32 to f32. Matches _mm_cvtepi32_ps.
_mm_cvtepu8_epi16: Zero-extend the low eight u8 to u16. Matches _mm_cvtepu8_epi16.
_mm_cvtepu8_epi32: Zero-extend the low four u8 to u32. Matches _mm_cvtepu8_epi32.
_mm_cvtepu16_epi32: Zero-extend the low four u16 to u32. Matches _mm_cvtepu16_epi32.
_mm_cvtepu32_epi64: Zero-extend the low two u32 to u64. Matches _mm_cvtepu32_epi64.
_mm_cvtpd_epi32: Convert two f64 to two i32 in the low lanes using the MXCSR rounding mode.
_mm_cvtpd_ps: Convert two f64 to two f32 in the low lanes, zero the high two. Matches _mm_cvtpd_ps.
_mm_cvtps_epi32: Convert four f32 to i32 using the current MXCSR rounding mode.
_mm_cvtps_pd: Convert two f32 (low lanes) to two f64. Matches _mm_cvtps_pd.
_mm_cvtsd_f64: Extract lane 0 as f64. Matches _mm_cvtsd_f64.
_mm_cvtsd_si32: Convert lane 0 of a to i32 using the MXCSR rounding mode. Matches _mm_cvtsd_si32.
_mm_cvtsd_ss: Convert lane 0 of a (f64) to f32 in lane 0, upper lanes from b. Matches _mm_cvtsd_ss.
_mm_cvtsi32_sd: Set lane 0 to b converted to f64, high lane from a. Matches _mm_cvtsi32_sd.
_mm_cvtsi32_si128: Set lane 0 to w, zero the rest. Matches _mm_cvtsi32_si128.
_mm_cvtsi64_sd: Set lane 0 to b converted to f64, high lane from a. Matches _mm_cvtsi64_sd.
_mm_cvtsi64_si32: Extract lane 0 as i32. Matches _mm_cvtsi64_si32.
_mm_cvtsi64_si128: Set lane 0 to w, zero the high lane. Matches _mm_cvtsi64_si128.
_mm_cvtsi128_si32: Extract the low i32 lane. Matches _mm_cvtsi128_si32.
_mm_cvtsi128_si64: Extract the low i64 lane. Matches _mm_cvtsi128_si64.
_mm_cvtss_f32: Extract lane 0 as f32. Matches _mm_cvtss_f32.
_mm_cvtss_sd: Convert lane 0 of b (f32) to f64 in lane 0, high lane from a. Matches _mm_cvtss_sd.
_mm_cvttpd_epi32: Convert two f64 to two i32 in the low lanes by truncation.
_mm_cvttps_epi32: Convert four f32 to i32 by truncation toward zero.
_mm_cvttsd_si32: Convert lane 0 of a to i32 by truncation. Matches _mm_cvttsd_si32.
_mm_div_pd: Divide two f64 lanes, a / b. Matches _mm_div_pd.
_mm_div_ps: Divide packed f32 lanes, a / b. Matches _mm_div_ps.
_mm_div_sd: Divide the low lanes, copy the high lane from a. Matches _mm_div_sd.
_mm_div_ss: Divide the low lanes and copy the upper three from a. Matches _mm_div_ss.
_mm_dp_pd: Dot product of two f64 lanes with mask select. Matches _mm_dp_pd.
_mm_dp_ps: Dot product of four f32 lanes with mask select. Matches _mm_dp_ps.
_mm_extract_epi8: Extract one i8 lane, zero-extended. Matches _mm_extract_epi8.
_mm_extract_epi16: Extract one i16 lane, zero-extended. Matches _mm_extract_epi16.
_mm_extract_epi32: Extract one i32 lane. Matches _mm_extract_epi32.
_mm_extract_epi64: Extract one i64 lane. Matches _mm_extract_epi64.
_mm_floor_pd: Round two f64 lanes toward negative infinity. Matches _mm_floor_pd.
_mm_floor_ps: Round four f32 lanes toward negative infinity. Matches _mm_floor_ps.
_mm_floor_sd: Floor lane 0 of b, high lane from a. Matches _mm_floor_sd.
_mm_floor_ss: Floor lane 0 of b, upper lanes from a. Matches _mm_floor_ss.
_mm_getcsr: Read the MXCSR register value. Reports rounding, FTZ, and DAZ modes.
_mm_hadd_epi16: Horizontally add adjacent i16 pairs from a then b. Matches _mm_hadd_epi16.
_mm_hadd_epi32: Horizontally add adjacent i32 pairs from a then b. Matches _mm_hadd_epi32.
_mm_hadd_pd: Horizontally add the two f64 lanes of a then b. Matches _mm_hadd_pd.
_mm_hadd_ps: Horizontally add adjacent f32 pairs from a then b. Matches _mm_hadd_ps.
_mm_hsub_epi16: Horizontally subtract adjacent i16 pairs. Matches _mm_hsub_epi16.
_mm_hsub_epi32: Horizontally subtract adjacent i32 pairs. Matches _mm_hsub_epi32.
_mm_hsub_pd: Horizontally subtract the two f64 lanes of a then b. Matches _mm_hsub_pd.
_mm_hsub_ps: Horizontally subtract adjacent f32 pairs. Matches _mm_hsub_ps.
_mm_insert_epi8: Insert i into one i8 lane. Matches _mm_insert_epi8.
_mm_insert_epi16: Insert i into one i16 lane. Matches _mm_insert_epi16.
_mm_insert_epi32: Insert i into one i32 lane. Matches _mm_insert_epi32.
_mm_insert_epi64: Insert i into one i64 lane. Matches _mm_insert_epi64.
_mm_load1_ps^⚠: Broadcast one f32 from memory to all lanes. Matches _mm_load1_ps.
_mm_load_pd^⚠: Load two f64 from a 16-byte aligned pointer. Matches _mm_load_pd.
_mm_load_ps^⚠: Load four f32 from a 16-byte aligned pointer. Matches _mm_load_ps.
_mm_load_ps1^⚠: Alias of _mm_load1_ps. Matches _mm_load_ps1.
_mm_load_si128^⚠: Load a 128-bit integer vector from a 16-byte aligned pointer. Matches _mm_load_si128.
_mm_load_ss^⚠: Load one f32 into lane 0, zero the rest. Matches _mm_load_ss.
_mm_loadl_epi64^⚠: Load the low 64 bits, zero the high 64 bits. Matches _mm_loadl_epi64.
_mm_loadu_pd^⚠: Load two f64 from an unaligned pointer. Matches _mm_loadu_pd.
_mm_loadu_ps^⚠: Load four f32 from an unaligned pointer. Matches _mm_loadu_ps.
_mm_loadu_si128^⚠: Load a 128-bit integer vector from an unaligned pointer. Matches _mm_loadu_si128.
_mm_madd_epi16: Multiply pairs of i16, add adjacent products to i32. Matches _mm_madd_epi16.
_mm_maddubs_epi16: Multiply unsigned a by signed b bytes, add adjacent pairs with signed saturation into i16. Matches _mm_maddubs_epi16.
_mm_max_epi8: Packed maximum of sixteen i8 lanes. Matches _mm_max_epi8.
_mm_max_epi16: Packed maximum of eight i16 lanes. Matches _mm_max_epi16.
_mm_max_epi32: Packed maximum of four i32 lanes. Matches _mm_max_epi32.
_mm_max_epu8: Packed maximum of sixteen u8 lanes. Matches _mm_max_epu8.
_mm_max_epu16: Packed maximum of eight u16 lanes. Matches _mm_max_epu16.
_mm_max_epu32: Packed maximum of four u32 lanes. Matches _mm_max_epu32.
_mm_max_pd: Packed maximum of two f64 lanes. Uses NEON max: a NaN operand propagates, and -0.0 is below +0.0.
_mm_max_pi16: Packed maximum of four i16 lanes. Matches _mm_max_pi16.
_mm_max_ps: Packed maximum. Uses NEON max: a NaN operand propagates, and -0.0 is below +0.0.
_mm_max_pu8: Packed maximum of eight u8 lanes. Matches _mm_max_pu8.
_mm_max_ss: Scalar maximum on lane 0. Upper lanes come from a. Uses NEON max on lane 0: a NaN operand propagates, and -0.0 is below +0.0.
_mm_min_epi8: Packed minimum of sixteen i8 lanes. Matches _mm_min_epi8.
_mm_min_epi16: Packed minimum of eight i16 lanes. Matches _mm_min_epi16.
_mm_min_epi32: Packed minimum of four i32 lanes. Matches _mm_min_epi32.
_mm_min_epu8: Packed minimum of sixteen u8 lanes. Matches _mm_min_epu8.
_mm_min_epu16: Packed minimum of eight u16 lanes. Matches _mm_min_epu16.
_mm_min_epu32: Packed minimum of four u32 lanes. Matches _mm_min_epu32.
_mm_min_pd: Packed minimum of two f64 lanes. Uses NEON min: a NaN operand propagates, and -0.0 is below +0.0.
_mm_min_pi16: Packed minimum of four i16 lanes. Matches _mm_min_pi16.
_mm_min_ps: Packed minimum. Uses NEON min: a NaN operand propagates, and -0.0 is below +0.0.
_mm_min_pu8: Packed minimum of eight u8 lanes. Matches _mm_min_pu8.
_mm_min_ss: Scalar minimum on lane 0. Upper lanes come from a. Uses NEON min on lane 0: a NaN operand propagates, and -0.0 is below +0.0.
_mm_minpos_epu16: Find the minimum u16 lane and its index. Matches _mm_minpos_epu16.
_mm_move_epi64: Copy the low i64 lane, zero the high lane. Matches _mm_move_epi64.
_mm_move_sd: Copy the low lane from b, the high lane from a. Matches _mm_move_sd.
_mm_move_ss: Copy lane 0 from b, lanes 1-3 from a. Matches _mm_move_ss.
_mm_movedup_pd: Duplicate the low f64 lane to both lanes. Matches _mm_movedup_pd.
_mm_movehdup_ps: Duplicate the odd f32 lanes: a1, a1, a3, a3. Matches _mm_movehdup_ps.
_mm_movehl_ps: Move the two high lanes of b into the two low lanes, high from a. Matches _mm_movehl_ps.
_mm_moveldup_ps: Duplicate the even f32 lanes: a0, a0, a2, a2. Matches _mm_moveldup_ps.
_mm_movelh_ps: Move the two low lanes of b into the two high lanes, low from a. Matches _mm_movelh_ps.
_mm_movemask_epi8: Gather the sign bit of each of the sixteen i8 lanes into 16 bits. Matches _mm_movemask_epi8.
_mm_movemask_pd: Gather the sign bit of each f64 lane into 2 bits. Matches _mm_movemask_pd.
_mm_movemask_pi8: Gather the sign bit of each of the eight i8 lanes into 8 bits. Matches _mm_movemask_pi8.
_mm_movemask_ps: Gather the sign bit of each of the four lanes into the low 4 bits. Matches _mm_movemask_ps.
_mm_movepi64_pi64: Take the low 64 bits of a __m128i as a __m64. Matches _mm_movepi64_pi64.
_mm_movpi64_epi64: Widen a __m64 into the low 64 bits of a __m128i, zeroing the high half. Matches _mm_movpi64_epi64.
_mm_mul_epi32: Multiply the even i32 lanes to i64. Matches _mm_mul_epi32.
_mm_mul_epu32: Multiply the low u32 of each 64-bit lane, produce u64. Matches _mm_mul_epu32.
_mm_mul_pd: Multiply two f64 lanes. Matches _mm_mul_pd.
_mm_mul_ps: Multiply packed f32 lanes. Matches _mm_mul_ps.
_mm_mul_sd: Multiply the low lanes, copy the high lane from a. Matches _mm_mul_sd.
_mm_mul_ss: Multiply the low lanes and copy the upper three from a. Matches _mm_mul_ss.
_mm_mulhi_epi16: Multiply eight i16 lanes, keep the high 16 bits. Matches _mm_mulhi_epi16.
_mm_mulhi_epu16: Multiply eight u16 lanes, keep the high 16 bits. Matches _mm_mulhi_epu16.
_mm_mulhrs_epi16: Multiply eight i16 pairs, keep bits 16-30, round. Matches _mm_mulhrs_epi16.
_mm_mullo_epi16: Multiply eight i16 lanes, keep the low 16 bits. Matches _mm_mullo_epi16.
_mm_mullo_epi32: Multiply four i32 lanes, keep the low 32 bits. Matches _mm_mullo_epi32.
_mm_or_pd: Bitwise OR of two f64 vectors. Matches _mm_or_pd.
_mm_or_ps: Bitwise OR of two f32 vectors. Matches _mm_or_ps.
_mm_or_si128: Bitwise OR of two integer vectors. Matches _mm_or_si128.
_mm_packs_epi16: Pack eight i16 from each input to sixteen i8 with signed saturation. Matches _mm_packs_epi16.
_mm_packs_epi32: Pack four i32 from each input to eight i16 with signed saturation. Matches _mm_packs_epi32.
_mm_packus_epi16: Pack eight i16 from each input to sixteen u8 with unsigned saturation. Matches _mm_packus_epi16.
_mm_packus_epi32: Pack four i32 from each input to eight u16 with unsigned saturation. Matches _mm_packus_epi32.
_mm_popcnt_u32: Count set bits in a 32-bit value. Matches _mm_popcnt_u32.
_mm_popcnt_u64: Count set bits in a 64-bit value. Matches _mm_popcnt_u64.
_mm_rcp_ps: Approximate reciprocal of each lane. About 12 bits. Matches _mm_rcp_ps.
_mm_rcp_ss: Approximate reciprocal of lane 0, upper lanes from a. Matches _mm_rcp_ss.
_mm_round_pd: Round two f64 lanes per the ROUNDING mode. Matches _mm_round_pd.
_mm_round_ps: Round four f32 lanes per the ROUNDING mode. Matches _mm_round_ps.
_mm_round_sd: Round lane 0 per ROUNDING, high lane from a. Matches _mm_round_sd.
_mm_round_ss: Round lane 0 per ROUNDING, copy upper lanes from a. Matches _mm_round_ss.
_mm_rsqrt_ps: Approximate reciprocal square root of each lane. Matches _mm_rsqrt_ps.
_mm_rsqrt_ss: Approximate reciprocal square root of lane 0, upper from a. Matches _mm_rsqrt_ss.
_mm_sad_epu8: Sum absolute differences of u8 lanes into two u16 totals. Matches _mm_sad_epu8.
_mm_sad_pu8: Sum absolute differences of eight u8 lanes into a single u16 total in lane 0. Matches _mm_sad_pu8.
_mm_set1_epi8: Broadcast one i8 to all lanes. Matches _mm_set1_epi8.
_mm_set1_epi16: Broadcast one i16 to all lanes. Matches _mm_set1_epi16.
_mm_set1_epi32: Broadcast one i32 to all lanes. Matches _mm_set1_epi32.
_mm_set1_epi64x: Broadcast one i64 to both lanes. Matches _mm_set1_epi64x.
_mm_set1_pd: Broadcast one f64 to both lanes. Matches _mm_set1_pd.
_mm_set1_pi32: Broadcast one i32 to both lanes. Matches _mm_set1_pi32.
_mm_set1_ps: Broadcast one f32 to all four lanes. Matches _mm_set1_ps.
_mm_set_epi8: Set sixteen i8 lanes, most significant first. Lane 0 is e0. Matches _mm_set_epi8.
_mm_set_epi16: Set eight i16 lanes, most significant first. Lane 0 is e0. Matches _mm_set_epi16.
_mm_set_epi32: Set four i32 lanes, most significant first. Lane 0 is e0. Matches _mm_set_epi32.
_mm_set_epi64x: Set two i64 lanes, most significant first. Lane 0 is e0. Matches _mm_set_epi64x.
_mm_set_pd: Set two f64 lanes, most significant first. Lane 0 is e0. Matches _mm_set_pd.
_mm_set_pi8: Set eight i8 lanes, most significant first. Lane 0 is e0. Matches _mm_set_pi8.
_mm_set_pi16: Set four i16 lanes, most significant first. Lane 0 is e0. Matches _mm_set_pi16.
_mm_set_pi32: Set two i32 lanes, most significant first. Lane 0 is e0. Matches _mm_set_pi32.
_mm_set_ps: Set four lanes, most significant first. Lane 0 is x. Matches _mm_set_ps.
_mm_set_ps1: Alias of _mm_set1_ps. Matches _mm_set_ps1.
_mm_set_sd: Set lane 0 to w, zero the high lane. Matches _mm_set_sd.
_mm_set_ss: Set lane 0 to w, upper lanes to zero. Matches _mm_set_ss.
_mm_setcsr: Write the MXCSR register. Applies the rounding, FTZ, and DAZ fields.
_mm_setr_epi32: Set four i32 lanes in order. Lane 0 is e3. Matches _mm_setr_epi32.
_mm_setr_pd: Set two f64 lanes in order. Lane 0 is e1. Matches _mm_setr_pd.
_mm_setr_ps: Set four lanes in order. Lane 0 is w. Matches _mm_setr_ps.
_mm_setzero_pd: Return a zeroed f64 vector. Matches _mm_setzero_pd.
_mm_setzero_ps: Return a zeroed vector. Matches _mm_setzero_ps.
_mm_setzero_si64: Return a zeroed __m64. Matches _mm_setzero_si64.
_mm_setzero_si128: Return a zeroed integer vector. Matches _mm_setzero_si128.
_mm_shuffle_epi8: Shuffle bytes of a by the indices in b. Matches _mm_shuffle_epi8.
_mm_shuffle_epi32: Shuffle four i32 lanes by IMM. Matches _mm_shuffle_epi32.
_mm_shuffle_ps: Shuffle four f32 lanes. IMM picks lanes 0-1 from a, 2-3 from b.
_mm_shufflehi_epi16: Shuffle the high four i16 lanes by IMM, keep the low four. Matches _mm_shufflehi_epi16. IMM is a compile-time constant in 0..256.
_mm_shufflelo_epi16: Shuffle the low four i16 lanes by IMM, keep the high four. Matches _mm_shufflelo_epi16. IMM is a compile-time constant in 0..256.
_mm_sign_epi8: Sign sixteen i8 lanes of a by the sign of b. Matches _mm_sign_epi8.
_mm_sign_epi16: Sign eight i16 lanes of a by the sign of b. Matches _mm_sign_epi16.
_mm_sign_epi32: Sign four i32 lanes of a by the sign of b. Matches _mm_sign_epi32.
_mm_slli_epi16: Shift eight i16 lanes left by IMM. Count >= 16 yields zero. Matches _mm_slli_epi16.
_mm_slli_epi32: Shift four i32 lanes left by IMM. Count >= 32 yields zero. Matches _mm_slli_epi32.
_mm_slli_epi64: Shift two i64 lanes left by IMM. Count >= 64 yields zero. Matches _mm_slli_epi64.
_mm_slli_si128: Shift the whole vector left by IMM bytes. Matches _mm_slli_si128.
_mm_sqrt_pd: Square root of two f64 lanes. Matches _mm_sqrt_pd.
_mm_sqrt_ps: Square root of each lane. Matches _mm_sqrt_ps.
_mm_sqrt_ss: Square root of lane 0, upper lanes from a. Matches _mm_sqrt_ss.
_mm_srai_epi16: Arithmetic shift eight i16 lanes right by IMM. Count >= 16 fills sign. Matches _mm_srai_epi16.
_mm_srai_epi32: Arithmetic shift four i32 lanes right by IMM. Count >= 32 fills sign. Matches _mm_srai_epi32.
_mm_srli_epi16: Logical shift eight u16 lanes right by IMM. Matches _mm_srli_epi16.
_mm_srli_epi32: Logical shift four u32 lanes right by IMM. Matches _mm_srli_epi32.
_mm_srli_epi64: Logical shift two u64 lanes right by IMM. Matches _mm_srli_epi64.
_mm_srli_si128: Shift the whole vector right by IMM bytes. Matches _mm_srli_si128.
_mm_store_pd^⚠: Store two f64 to a 16-byte aligned pointer. Matches _mm_store_pd.
_mm_store_ps^⚠: Store four f32 to a 16-byte aligned pointer. Matches _mm_store_ps.
_mm_store_si128^⚠: Store a 128-bit integer vector to a 16-byte aligned pointer. Matches _mm_store_si128.
_mm_store_ss^⚠: Store lane 0 to memory. Matches _mm_store_ss.
_mm_storel_epi64^⚠: Store the low 64 bits to memory. Matches _mm_storel_epi64.
_mm_storeu_pd^⚠: Store two f64 to an unaligned pointer. Matches _mm_storeu_pd.
_mm_storeu_ps^⚠: Store four f32 to an unaligned pointer. Matches _mm_storeu_ps.
_mm_storeu_si128^⚠: Store a 128-bit integer vector to an unaligned pointer. Matches _mm_storeu_si128.
_mm_sub_epi8: Subtract sixteen i8 lanes with wraparound. Matches _mm_sub_epi8.
_mm_sub_epi16: Subtract eight i16 lanes with wraparound. Matches _mm_sub_epi16.
_mm_sub_epi32: Subtract four i32 lanes with wraparound. Matches _mm_sub_epi32.
_mm_sub_epi64: Subtract two i64 lanes with wraparound. Matches _mm_sub_epi64.
_mm_sub_pd: Subtract two f64 lanes, a - b. Matches _mm_sub_pd.
_mm_sub_pi16: Subtract four i16 lanes with wraparound. Matches _mm_sub_pi16.
_mm_sub_ps: Subtract packed f32 lanes, a - b. Matches _mm_sub_ps.
_mm_sub_sd: Subtract the low lanes, copy the high lane from a. Matches _mm_sub_sd.
_mm_sub_ss: Subtract the low lanes and copy the upper three from a. Matches _mm_sub_ss.
_mm_subs_epi8: Subtract sixteen i8 lanes with signed saturation. Matches _mm_subs_epi8.
_mm_subs_epi16: Subtract eight i16 lanes with signed saturation. Matches _mm_subs_epi16.
_mm_subs_epu8: Subtract sixteen u8 lanes with unsigned saturation. Matches _mm_subs_epu8.
_mm_subs_epu16: Subtract eight u16 lanes with unsigned saturation. Matches _mm_subs_epu16.
_mm_test_all_ones: True if all bits are one. Matches _mm_test_all_ones.
_mm_test_all_zeros: True if (a & mask) == 0. Matches _mm_test_all_zeros.
_mm_test_mix_ones_zeros: True if a & mask has both set and clear bits. Matches _mm_test_mix_ones_zeros.
_mm_testc_si128: True if ((!a) & b) == 0. Matches _mm_testc_si128.
_mm_testnzc_si128: True if both a & b and (!a) & b are nonzero. Matches _mm_testnzc_si128.
_mm_testz_si128: True if (a & b) == 0. Matches _mm_testz_si128.
_mm_ucomieq_ss: Alias of _mm_comieq_ss. Matches _mm_ucomieq_ss.
_mm_ucomige_ss: Alias of _mm_comige_ss. Matches _mm_ucomige_ss.
_mm_ucomigt_ss: Alias of _mm_comigt_ss. Matches _mm_ucomigt_ss.
_mm_ucomile_ss: Alias of _mm_comile_ss. Matches _mm_ucomile_ss.
_mm_ucomilt_ss: Alias of _mm_comilt_ss. Matches _mm_ucomilt_ss.
_mm_ucomineq_ss: Alias of _mm_comineq_ss. Matches _mm_ucomineq_ss.
_mm_unpackhi_epi8: Interleave the high eight i8 lanes. Matches _mm_unpackhi_epi8.
_mm_unpackhi_epi16: Interleave the high four i16 lanes. Matches _mm_unpackhi_epi16.
_mm_unpackhi_epi32: Interleave the high two i32 lanes. Matches _mm_unpackhi_epi32.
_mm_unpackhi_epi64: Interleave the high i64 lane. Matches _mm_unpackhi_epi64.
_mm_unpackhi_pd: Interleave the high f64 lanes. Matches _mm_unpackhi_pd.
_mm_unpackhi_ps: Interleave the high two lanes of a and b. Matches _mm_unpackhi_ps.
_mm_unpacklo_epi8: Interleave the low eight i8 lanes. Matches _mm_unpacklo_epi8.
_mm_unpacklo_epi16: Interleave the low four i16 lanes. Matches _mm_unpacklo_epi16.
_mm_unpacklo_epi32: Interleave the low two i32 lanes. Matches _mm_unpacklo_epi32.
_mm_unpacklo_epi64: Interleave the low i64 lane. Matches _mm_unpacklo_epi64.
_mm_unpacklo_pd: Interleave the low f64 lanes. Matches _mm_unpacklo_pd.
_mm_unpacklo_ps: Interleave the low two lanes of a and b. Matches _mm_unpacklo_ps.
_mm_xor_pd: Bitwise XOR of two f64 vectors. Matches _mm_xor_pd.
_mm_xor_ps: Bitwise XOR of two f32 vectors. Matches _mm_xor_ps.
_mm_xor_si128: Bitwise XOR of two integer vectors. Matches _mm_xor_si128.

Crate sse2neon

Crate sse2neon Copy item path

§Types

§Lane ordering

§Platform

§Safety

§no_std

Structs§

Constants§

Functions§

Crate sse2neon