spirv_std/
memory.rs

1//! Types for handling memory ordering constraints for concurrent memory access.
2
3/// Specification for how large of a scope some instructions should operate on - used when calling
4/// functions that take a configurable scope.
5#[derive(Debug, PartialEq, Eq)]
6pub enum Scope {
7    /// Crosses multiple devices.
8    CrossDevice = 0,
9
10    /// The current device.
11    Device = 1,
12
13    /// The current workgroup.
14    Workgroup = 2,
15
16    /// The current subgroup.
17    Subgroup = 3,
18
19    /// The current invocation.
20    Invocation = 4,
21
22    /// The current queue family.
23    QueueFamily = 5,
24}
25
26bitflags::bitflags! {
27    /// Memory semantics to determine how some operations should function - used when calling such
28    /// configurable operations.
29    pub struct Semantics: u32 {
30        /// No memory semantics.
31        const NONE = 0;
32
33        /// On an atomic instruction, orders memory operations provided in program
34        /// order after this atomic instruction against this atomic instruction. On
35        /// a barrier, orders memory operations provided in program order after this
36        /// barrier against atomic instructions before this barrier.
37        const ACQUIRE = 0x2;
38
39        /// On an atomic instruction, orders memory operations provided in program
40        /// order before this atomic instruction against this atomic instruction. On
41        /// a barrier, orders memory operations provided in program order before
42        /// this barrier against atomic instructions after this barrier.
43        const RELEASE = 0x4;
44
45        /// Has the properties of both [`Self::ACQUIRE`] and [`Self::RELEASE`] semantics. It
46        /// is used for read-modify-write operations.
47        const ACQUIRE_RELEASE = 0x8;
48
49        /// All observers see this memory access in the same order with respect to
50        /// other sequentially-consistent memory accesses from this invocation.
51        /// If the declared memory model is `vulkan`, `SEQUENTIALLY_CONST` must
52        /// not be used.
53        const SEQUENTIALLY_CONST = 0x10;
54
55        /// Apply the memory-ordering constraints to
56        /// [`crate::storage_class::StorageBuffer`],
57        /// [`crate::storage_class::PhysicalStorageBuffer`], or
58        /// [`crate::storage_class::Uniform`] Storage Class memory.
59        const UNIFORM_MEMORY = 0x40;
60
61        /// Apply the memory-ordering constraints to subgroup memory.
62        const SUBGROUP_MEMORY = 0x80;
63
64        /// Apply the memory-ordering constraints to
65        /// [`crate::storage_class::Workgroup`] Storage Class memory.
66        const WORKGROUP_MEMORY = 0x100;
67
68        /// Apply the memory-ordering constraints to
69        /// [`crate::storage_class::CrossWorkgroup`] Storage Class memory.
70        const CROSS_WORKGROUP_MEMORY = 0x200;
71
72        /// Apply the memory-ordering constraints to
73        /// [`crate::storage_class::AtomicCounter`] Storage Class memory.
74        const ATOMIC_COUNTER_MEMORY = 0x400;
75
76        /// Apply the memory-ordering constraints to image contents (types declared
77        /// by `OpTypeImage`), or to accesses done through pointers to the
78        /// [`crate::storage_class::Image`] Storage Class.
79        const IMAGE_MEMORY = 0x800;
80
81        /// Apply the memory-ordering constraints to the
82        /// [`crate::storage_class::Output`] Storage Class memory.
83        const OUTPUT_MEMORY = 0x1000;
84
85        /// Perform an availability operation on all references in the selected
86        /// storage classes.
87        const MAKE_AVAILABLE = 0x2000;
88
89        /// Perform a visibility operation on all references in the selected
90        /// storage classes.
91        const MAKE_VISIBLE = 0x4000;
92
93        /// This access cannot be eliminated, duplicated, or combined with
94        /// other accesses.
95        const VOLATILE = 0x8000;
96    }
97}
spirv_std/memory.rs

spirv_std/
memory.rs
