spi_i2c_hdl_cat/lib.rs
1//! # spi-i2c-hdl-cat
2//!
3//! SPI and I2C controllers implemented using `hdl-cat` categorical
4//! hardware description language. Protocol FSMs modeled as
5//! `Sync<S, I, O>` Mealy machines composed via categorical arrows.
6//!
7//! ## Architecture
8//!
9//! ```text
10//! primitives/ Shared domain newtypes: I2cAddress7, ClockDivider, BaudRate
11//! spi/ SPI domain: modes, transactions, Sync machines
12//! i2c/ I2C domain: conditions, transactions, Sync machines
13//! composition/ MonoidalCategory combinators for multi-device orchestration
14//! ```
15//!
16//! **Layer 1 (Pure):** Domain types, categorical composition,
17//! golden models. Zero `mut`, combinators only.
18//!
19//! **Layer 2 (HDL):** `hdl-cat` `CircuitArrow` and `Sync<S, I, O>`
20//! implementations for hardware compilation.
21
22pub mod composition;
23pub mod error;
24pub mod i2c;
25pub mod primitives;
26pub mod simulation;
27pub mod spi;