spi_flash/
sreg.rs

1/// Status Register 1
2#[derive(Copy, Clone, Debug)]
3pub struct StatusRegister1(pub u8);
4
5impl StatusRegister1 {
6    /// Get BUSY bit.
7    pub fn get_busy(&self) -> bool {
8        self.0 & 0b0000_0001 != 0
9    }
10
11    /// Get (BP0, BP1, BP2) bits.
12    pub fn get_block_protect(&self) -> (bool, bool, bool) {
13        let bp = (self.0 & 0b0001_1100) >> 2;
14        (bp & 0b001 != 0, bp & 0b010 != 0, bp & 0b100 != 0)
15    }
16
17    /// Set (BP0, BP1, BP2) bits.
18    pub fn set_block_protect(&mut self, bp0: bool, bp1: bool, bp2: bool) {
19        self.0 &= 0b1110_0011;
20        self.0 |= ((bp0 as u8) << 2) | ((bp1 as u8) << 3) | ((bp2 as u8) << 4);
21    }
22
23    /// Get SEC (sector protect) bit.
24    pub fn get_sec(&self) -> bool {
25        self.0 & 0b0100_0000 != 0
26    }
27
28    /// Get TB (top/bottom protection) bit.
29    pub fn get_tb(&self) -> bool {
30        self.0 & 0b0010_0000 != 0
31    }
32
33    /// Get SRP (status register protect) bit.
34    pub fn get_srp(&self) -> bool {
35        self.0 & 0b1000_0000 != 0
36    }
37}
38
39/// Status Register 2
40#[derive(Copy, Clone, Debug)]
41pub struct StatusRegister2(pub u8);
42
43impl StatusRegister2 {
44    /// Get CMP (protection complement) bit.
45    pub fn get_cmp(&self) -> bool {
46        self.0 & 0b0100_0000 != 0
47    }
48}
49
50/// Status Register 3
51#[derive(Copy, Clone, Debug)]
52pub struct StatusRegister3(pub u8);
53
54impl StatusRegister3 {
55    /// Get WPS (write protect selection) bit.
56    ///
57    /// This bit is non-standard and its functionality
58    /// depends on the specific flash chip.
59    pub fn get_wps(&self) -> bool {
60        self.0 & 0b0000_0100 != 0
61    }
62
63    /// Set WPS (write protect selection) bit.
64    ///
65    /// This bit is non-standard and its functionality
66    /// depends on the specific flash chip.
67    pub fn set_wps(&mut self, wps: bool) {
68        self.0 &= 0b1111_1011;
69        self.0 |= (wps as u8) << 2;
70    }
71}
spi_flash/sreg.rs

spi_flash/
sreg.rs
