Expand description
NOR Flash abstraction with wear leveling and transaction support
Models typical small SPI NOR flash chips:
- 4KB pages (erase granularity)
- 256B write granularity (program page size)
- Limited erase cycles (~100k)
Structs§
- Flash
- Simulated NOR Flash storage
- Flash
Config - Flash configuration
- PageId
- Page identifier (0-based)
Constants§
- DEFAULT_
NUM_ PAGES - Default number of pages (16 = 64KB)
- DEFAULT_
PAGE_ SIZE - Default page size (4KB)
- PROGRAM_
PAGE_ SIZE - Program page size (256 bytes)