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Module memory

Module memory 

Source

Modules§

load
store

Structs§

MemoryAccessCols
Memory Access Columns
MemoryAccessColsU8
Memory Access Columns for u8 limbs
MemoryAccessTimestamp
Memory Access Timestamp
MemoryBumpChip
MemoryBumpCols
MemoryGlobalChip
A memory chip that can initialize or finalize values in memory.
MemoryInitCols
MemoryLocalChip
MemoryLocalCols
PageProtAccessCols
Page Permission Access Columns, when the shard and previous shard are known to be equal
PageProtChip
PageProtCols
PageProtGlobalChip
A memory chip that can initialize or finalize values in memory.
PageProtInitCols
PageProtLocalChip
PageProtLocalCols
RegisterAccessCols
Register Access Columns
RegisterAccessTimestamp
Register Access Timestamp. The register accesses use the same argument as the memory accesses, and shares the same space as the memory. This structure is used for register accesses in RISC-V. For optimization, we ensure that all register accesses have the high limb of the timestamp and previous timestamp to be equal. This is done through adding in a “shadow” read, through the MemoryBump chip. Therefore, only the columns for low limb comparison is needed here.
SingleMemoryLocal
SinglePageProtCols
SinglePageProtLocal

Enums§

MemoryChipType
The type of global/local memory chip that is being initialized.

Constants§

NUM_LOCAL_MEMORY_ENTRIES_PER_ROW
NUM_LOCAL_PAGE_PROT_ENTRIES_PER_ROW
NUM_PAGE_PROT_ENTRIES_PER_ROW