sp1_core_executor/events/
instr.rs

1use deepsize2::DeepSizeOf;
2use serde::{Deserialize, Serialize};
3
4use super::MemoryRecordEnum;
5use crate::events::PageProtRecord;
6use crate::{vm::results::TrapResult, Instruction, Opcode};
7
8/// Alu Instruction Event.
9///
10/// This object encapsulated the information needed to prove a RISC-V ALU operation.
11#[derive(Debug, Clone, Copy, Serialize, Deserialize, PartialEq, Eq, DeepSizeOf)]
12#[repr(C)]
13pub struct AluEvent {
14    /// The clock cycle.
15    pub clk: u64,
16    /// The program counter.
17    pub pc: u64,
18    /// The opcode.
19    pub opcode: Opcode,
20    /// The first operand value.
21    pub a: u64,
22    /// The second operand value.
23    pub b: u64,
24    /// The third operand value.
25    pub c: u64,
26    /// Whether the first operand is register 0.
27    pub op_a_0: bool,
28}
29
30impl AluEvent {
31    /// Create a new [`AluEvent`].
32    #[must_use]
33    #[allow(clippy::too_many_arguments)]
34    pub fn new(clk: u64, pc: u64, opcode: Opcode, a: u64, b: u64, c: u64, op_a_0: bool) -> Self {
35        Self { clk, pc, opcode, a, b, c, op_a_0 }
36    }
37}
38
39/// Memory Instruction Event.
40///
41/// This object encapsulated the information needed to prove a RISC-V memory operation.
42#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
43#[repr(C)]
44pub struct MemInstrEvent {
45    /// The clk.
46    pub clk: u64,
47    /// The program counter.
48    pub pc: u64,
49    /// The opcode.
50    pub opcode: Opcode,
51    /// The first operand value.
52    pub a: u64,
53    /// The second operand value.
54    pub b: u64,
55    /// The third operand value.
56    pub c: u64,
57    /// Whether the first operand is register 0.
58    pub op_a_0: bool,
59    /// The memory access record for memory operations.
60    pub mem_access: MemoryRecordEnum,
61}
62
63impl MemInstrEvent {
64    /// Create a new [`MemInstrEvent`].
65    #[must_use]
66    #[allow(clippy::too_many_arguments)]
67    pub fn new(
68        clk: u64,
69        pc: u64,
70        opcode: Opcode,
71        a: u64,
72        b: u64,
73        c: u64,
74        op_a_0: bool,
75        mem_access: MemoryRecordEnum,
76    ) -> Self {
77        Self { clk, pc, opcode, a, b, c, op_a_0, mem_access }
78    }
79}
80
81/// Trap Memory Instruction Event.
82///
83/// This object encapsulated the information to prove a RISC-V memory operation that trapped.
84#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
85#[repr(C)]
86pub struct TrapMemInstrEvent {
87    /// The clk.
88    pub clk: u64,
89    /// The program counter.
90    pub pc: u64,
91    /// The opcode.
92    pub opcode: Opcode,
93    /// The first operand value.
94    pub a: u64,
95    /// The second operand value.
96    pub b: u64,
97    /// The third operand value.
98    pub c: u64,
99    /// Whether the first operand is register 0.
100    pub op_a_0: bool,
101    /// The page permission record for memory operations.
102    pub page_prot_access: PageProtRecord,
103    /// The trap result.
104    pub trap_result: TrapResult,
105}
106
107/// Branch Instruction Event.
108///
109/// This object encapsulated the information needed to prove a RISC-V branch operation.
110#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
111#[repr(C)]
112pub struct BranchEvent {
113    /// The clock cycle.
114    pub clk: u64,
115    /// The program counter.
116    pub pc: u64,
117    /// The next program counter.
118    pub next_pc: u64,
119    /// The opcode.
120    pub opcode: Opcode,
121    /// The first operand value.
122    pub a: u64,
123    /// The second operand value.
124    pub b: u64,
125    /// The third operand value.
126    pub c: u64,
127    /// Whether the first operand is register 0.
128    pub op_a_0: bool,
129}
130
131impl BranchEvent {
132    /// Create a new [`BranchEvent`].
133    #[must_use]
134    #[allow(clippy::too_many_arguments)]
135    pub fn new(
136        clk: u64,
137        pc: u64,
138        next_pc: u64,
139        opcode: Opcode,
140        a: u64,
141        b: u64,
142        c: u64,
143        op_a_0: bool,
144    ) -> Self {
145        Self { clk, pc, next_pc, opcode, a, b, c, op_a_0 }
146    }
147}
148
149/// Jump Instruction Event.
150///
151/// This object encapsulated the information needed to prove a RISC-V jump operation.
152#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
153#[repr(C)]
154pub struct JumpEvent {
155    /// The clock cycle.
156    pub clk: u64,
157    /// The program counter.
158    pub pc: u64,
159    /// The next program counter.
160    pub next_pc: u64,
161    /// The opcode.
162    pub opcode: Opcode,
163    /// The first operand value.
164    pub a: u64,
165    /// The second operand value.
166    pub b: u64,
167    /// The third operand value.
168    pub c: u64,
169    /// Whether the first operand is register 0.
170    pub op_a_0: bool,
171}
172
173impl JumpEvent {
174    /// Create a new [`JumpEvent`].
175    #[must_use]
176    #[allow(clippy::too_many_arguments)]
177    pub fn new(
178        clk: u64,
179        pc: u64,
180        next_pc: u64,
181        opcode: Opcode,
182        a: u64,
183        b: u64,
184        c: u64,
185        op_a_0: bool,
186    ) -> Self {
187        Self { clk, pc, next_pc, opcode, a, b, c, op_a_0 }
188    }
189}
190/// `UType` Instruction Event.
191///
192/// This object encapsulated the information needed to prove a RISC-V AUIPC and LUI operation.
193#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
194#[repr(C)]
195pub struct UTypeEvent {
196    /// The clock cycle.
197    pub clk: u64,
198    /// The program counter.
199    pub pc: u64,
200    /// The opcode.
201    pub opcode: Opcode,
202    /// The first operand value.
203    pub a: u64,
204    /// The second operand value.
205    pub b: u64,
206    /// The third operand value.
207    pub c: u64,
208    /// Whether the first operand is register 0.
209    pub op_a_0: bool,
210}
211
212impl UTypeEvent {
213    /// Create a new [`UTypeEvent`].
214    #[must_use]
215    #[allow(clippy::too_many_arguments)]
216    pub fn new(clk: u64, pc: u64, opcode: Opcode, a: u64, b: u64, c: u64, op_a_0: bool) -> Self {
217        Self { clk, pc, opcode, a, b, c, op_a_0 }
218    }
219}
220
221/// A `TrapExec` Event.
222///
223/// The information needed to prove a trap on untrusted program's permissions.
224#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
225#[repr(C)]
226pub struct TrapExecEvent {
227    /// The clock cycle.
228    pub clk: u64,
229    /// The program counter.
230    pub pc: u64,
231    /// The trap result.
232    pub trap_result: TrapResult,
233    /// The page permission record.
234    pub page_prot_record: PageProtRecord,
235}
236
237/// Instruction Fetch Event.
238///
239/// This object encapsulated the information needed to prove an instruction fetch from memory.
240#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
241#[repr(C)]
242pub struct InstructionFetchEvent {
243    /// The clock cycle.
244    pub clk: u64,
245    /// The program counter.
246    pub pc: u64,
247    /// Decoded instruction.
248    pub instruction: Instruction,
249    /// Encoded instruction
250    pub encoded_instruction: u32,
251}
252
253impl InstructionFetchEvent {
254    /// Create a new [`InstructionFetchEvent`].
255    #[must_use]
256    #[allow(clippy::too_many_arguments)]
257    pub fn new(clk: u64, pc: u64, instruction: Instruction, encoded_instruction: u32) -> Self {
258        Self { clk, pc, instruction, encoded_instruction }
259    }
260}
261
262/// Instruction Decode Event.
263///
264/// This object encapsulated the information needed to prove an instruction decode.
265#[derive(Debug, Clone, Copy, Serialize, Deserialize, DeepSizeOf)]
266#[repr(C)]
267pub struct InstructionDecodeEvent {
268    /// Decoded instruction.
269    pub instruction: Instruction,
270    /// Encoded instruction
271    pub encoded_instruction: u32,
272    /// The multiplicity of the instruction.
273    pub multiplicity: usize,
274}
275
276impl InstructionDecodeEvent {
277    /// Create a new [`InstructionDecodeEvent`].
278    #[must_use]
279    #[allow(clippy::too_many_arguments)]
280    pub fn new(instruction: Instruction, encoded_instruction: u32, multiplicity: usize) -> Self {
281        Self { instruction, encoded_instruction, multiplicity }
282    }
283}
sp1_core_executor/events/instr.rs

sp1_core_executor/events/
instr.rs
