Module cache_optimization 

Cache-friendly feature layouts for improved performance

This module provides optimized data layouts and access patterns to maximize CPU cache utilization during kernel approximation computations.

Key Optimizations

• Blocked Matrix Operations: Tiles large matrices into cache-friendly blocks
• Data Alignment: Ensures proper alignment for SIMD operations
• Memory Layouts: Provides both row-major and column-major layouts
• Prefetching: Hints for CPU prefetching to reduce cache misses
• Structure of Arrays (SoA): Optimized layout for vectorized operations

Modules

utils

Utility functions for cache optimization

Structs

AlignedBuffer

Aligned memory allocator for SIMD operations

CacheConfig

Configuration for cache optimization

CacheFriendlyMatrix

Cache-friendly feature matrix wrapper

Enums

MemoryLayout

Memory layout strategy for feature matrices

Traits

CacheAwareTransform

Cache-aware feature transformation strategy