singe_nvml/
types.rs

1#![allow(deprecated)]
2
3use std::{cmp::max, mem};
4
5use crate::{device::Device, gpu_instance::GpuInstance};
6use num_enum::{IntoPrimitive, TryFromPrimitive};
7use singe_core::{
8    copy_string_to_c_chars, impl_enum_conversion, string_from_c_chars, string_from_c_ptr,
9    try_enum_from_raw,
10};
11use singe_nvml_sys as sys;
12
13use crate::{
14    error::{Error, Result},
15    utility::{mask255_bits, option_u64_from_not_available},
16};
17
18pub(crate) fn try_from_nvml_enum<T>(name: &'static str, value: u32) -> Result<T>
19where
20    T: TryFrom<u32>,
21{
22    try_enum_from_raw(name, value).map_err(|error| Error::UnknownEnumValue {
23        name: error.name.into(),
24        value: error.value,
25    })
26}
27
28bitflags::bitflags! {
29    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
30    pub struct InitFlags: u32 {
31        const NO_GPUS = sys::NVML_INIT_FLAG_NO_GPUS;
32        const NO_ATTACH = sys::NVML_INIT_FLAG_NO_ATTACH;
33        const FORCE_INIT = sys::NVML_INIT_FLAG_FORCE_INIT;
34    }
35}
36
37bitflags::bitflags! {
38    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
39    pub struct EventTypes: u64 {
40        const NONE = sys::nvmlEventTypeNone as u64;
41        const SINGLE_BIT_ECC_ERROR = sys::nvmlEventTypeSingleBitEccError as u64;
42        const DOUBLE_BIT_ECC_ERROR = sys::nvmlEventTypeDoubleBitEccError as u64;
43        const PSTATE = sys::nvmlEventTypePState as u64;
44        const XID_CRITICAL_ERROR = sys::nvmlEventTypeXidCriticalError as u64;
45        const CLOCK = sys::nvmlEventTypeClock as u64;
46        const POWER_SOURCE_CHANGE = sys::nvmlEventTypePowerSourceChange as u64;
47        const MIG_CONFIG_CHANGE = sys::nvmlEventMigConfigChange as u64;
48        const SINGLE_BIT_ECC_ERROR_STORM = sys::nvmlEventTypeSingleBitEccErrorStorm as u64;
49        const DRAM_RETIREMENT_EVENT = sys::nvmlEventTypeDramRetirementEvent as u64;
50        const DRAM_RETIREMENT_FAILURE = sys::nvmlEventTypeDramRetirementFailure as u64;
51        const NON_FATAL_POISON_ERROR = sys::nvmlEventTypeNonFatalPoisonError as u64;
52        const FATAL_POISON_ERROR = sys::nvmlEventTypeFatalPoisonError as u64;
53        const GPU_UNAVAILABLE_ERROR = sys::nvmlEventTypeGpuUnavailableError as u64;
54        const GPU_RECOVERY_ACTION = sys::nvmlEventTypeGpuRecoveryAction as u64;
55        const ALL = sys::nvmlEventTypeAll as u64;
56    }
57}
58
59bitflags::bitflags! {
60    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
61    pub struct SystemEventTypes: u64 {
62        const GPU_DRIVER_UNBIND = sys::nvmlSystemEventTypeGpuDriverUnbind as u64;
63        const GPU_DRIVER_BIND = sys::nvmlSystemEventTypeGpuDriverBind as u64;
64    }
65}
66
67bitflags::bitflags! {
68    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
69    pub struct DeviceCapabilities: u32 {
70        const EGM = sys::NVML_DEV_CAP_EGM;
71    }
72}
73
74bitflags::bitflags! {
75    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
76    pub struct DriverModelFlags: u32 {
77        const DEFAULT = sys::nvmlFlagDefault;
78        const FORCE = sys::nvmlFlagForce;
79    }
80}
81
82bitflags::bitflags! {
83    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
84    pub struct GpuInstanceProfileCapabilities: u32 {
85        const P2P = sys::NVML_GPU_INSTANCE_PROFILE_CAPS_P2P;
86        const GFX = sys::NVML_GPU_INSTANCE_PROFILE_CAPS_GFX;
87    }
88}
89
90bitflags::bitflags! {
91    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
92    pub struct ComputeInstanceProfileCapabilities: u32 {
93        const GFX = sys::NVML_COMPUTE_INSTANCE_PROFILE_CAPS_GFX;
94    }
95}
96
97bitflags::bitflags! {
98    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
99    pub struct NvLinkPacketTypes: u32 {
100        const NOP = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_NOP as _;
101        const READ = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_READ as _;
102        const WRITE = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_WRITE as _;
103        const RATOM = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_RATOM as _;
104        const NRATOM = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_NRATOM as _;
105        const FLUSH = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_FLUSH as _;
106        const RESPDATA = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_RESPDATA as _;
107        const RESPNODATA = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_RESPNODATA as _;
108        const ALL = sys::nvmlNvLinkUtilizationCountPktTypes_t::NVML_NVLINK_COUNTER_PKTFILTER_ALL as _;
109    }
110}
111
112#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
113pub struct CudaDriverVersion {
114    pub raw: i32,
115    pub major: i32,
116    pub minor: i32,
117}
118
119impl CudaDriverVersion {
120    pub const fn from_raw(raw: i32) -> Self {
121        Self {
122            raw,
123            major: raw / 1000,
124            minor: (raw % 1000) / 10,
125        }
126    }
127}
128
129#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
130pub struct Pid(pub u32);
131
132#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
133pub struct FieldId(pub u32);
134
135impl FieldId {
136    pub const ECC_CURRENT: Self = Self(sys::NVML_FI_DEV_ECC_CURRENT);
137    pub const ECC_PENDING: Self = Self(sys::NVML_FI_DEV_ECC_PENDING);
138    pub const RETIRED_SBE: Self = Self(sys::NVML_FI_DEV_RETIRED_SBE);
139    pub const RETIRED_DBE: Self = Self(sys::NVML_FI_DEV_RETIRED_DBE);
140    pub const RETIRED_PENDING: Self = Self(sys::NVML_FI_DEV_RETIRED_PENDING);
141    pub const MEMORY_TEMP: Self = Self(sys::NVML_FI_DEV_MEMORY_TEMP);
142    pub const TOTAL_ENERGY_CONSUMPTION: Self = Self(sys::NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION);
143    pub const PCIE_REPLAY_COUNTER: Self = Self(sys::NVML_FI_DEV_PCIE_REPLAY_COUNTER);
144    pub const REMAPPED_CORRECTED_ROWS: Self = Self(sys::NVML_FI_DEV_REMAPPED_COR);
145    pub const REMAPPED_UNCORRECTED_ROWS: Self = Self(sys::NVML_FI_DEV_REMAPPED_UNC);
146    pub const REMAPPED_PENDING: Self = Self(sys::NVML_FI_DEV_REMAPPED_PENDING);
147    pub const REMAPPED_FAILURE: Self = Self(sys::NVML_FI_DEV_REMAPPED_FAILURE);
148    pub const POWER_AVERAGE: Self = Self(sys::NVML_FI_DEV_POWER_AVERAGE);
149    pub const POWER_INSTANT: Self = Self(sys::NVML_FI_DEV_POWER_INSTANT);
150    pub const POWER_MIN_LIMIT: Self = Self(sys::NVML_FI_DEV_POWER_MIN_LIMIT);
151    pub const POWER_MAX_LIMIT: Self = Self(sys::NVML_FI_DEV_POWER_MAX_LIMIT);
152    pub const POWER_DEFAULT_LIMIT: Self = Self(sys::NVML_FI_DEV_POWER_DEFAULT_LIMIT);
153    pub const POWER_CURRENT_LIMIT: Self = Self(sys::NVML_FI_DEV_POWER_CURRENT_LIMIT);
154    pub const ENERGY: Self = Self(sys::NVML_FI_DEV_ENERGY);
155    pub const POWER_REQUESTED_LIMIT: Self = Self(sys::NVML_FI_DEV_POWER_REQUESTED_LIMIT);
156    pub const PCIE_TX_BYTES: Self = Self(sys::NVML_FI_DEV_PCIE_COUNT_TX_BYTES);
157    pub const PCIE_RX_BYTES: Self = Self(sys::NVML_FI_DEV_PCIE_COUNT_RX_BYTES);
158    pub const NVLINK_THROUGHPUT_DATA_TX: Self = Self(sys::NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_TX);
159    pub const NVLINK_THROUGHPUT_DATA_RX: Self = Self(sys::NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_RX);
160    pub const NVLINK_THROUGHPUT_RAW_TX: Self = Self(sys::NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_TX);
161    pub const NVLINK_THROUGHPUT_RAW_RX: Self = Self(sys::NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_RX);
162    pub const PERF_POLICY_POWER: Self = Self(sys::NVML_FI_DEV_PERF_POLICY_POWER);
163    pub const PERF_POLICY_THERMAL: Self = Self(sys::NVML_FI_DEV_PERF_POLICY_THERMAL);
164    pub const PERF_POLICY_SYNC_BOOST: Self = Self(sys::NVML_FI_DEV_PERF_POLICY_SYNC_BOOST);
165    pub const PERF_POLICY_BOARD_LIMIT: Self = Self(sys::NVML_FI_DEV_PERF_POLICY_BOARD_LIMIT);
166    pub const PERF_POLICY_LOW_UTILIZATION: Self =
167        Self(sys::NVML_FI_DEV_PERF_POLICY_LOW_UTILIZATION);
168    pub const PERF_POLICY_RELIABILITY: Self = Self(sys::NVML_FI_DEV_PERF_POLICY_RELIABILITY);
169    pub const PERF_POLICY_TOTAL_APP_CLOCKS: Self =
170        Self(sys::NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS);
171    pub const PERF_POLICY_TOTAL_BASE_CLOCKS: Self =
172        Self(sys::NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS);
173    pub const TEMPERATURE_SHUTDOWN_TLIMIT: Self =
174        Self(sys::NVML_FI_DEV_TEMPERATURE_SHUTDOWN_TLIMIT);
175    pub const TEMPERATURE_SLOWDOWN_TLIMIT: Self =
176        Self(sys::NVML_FI_DEV_TEMPERATURE_SLOWDOWN_TLIMIT);
177    pub const TEMPERATURE_MEMORY_MAX_TLIMIT: Self =
178        Self(sys::NVML_FI_DEV_TEMPERATURE_MEM_MAX_TLIMIT);
179    pub const TEMPERATURE_GPU_MAX_TLIMIT: Self = Self(sys::NVML_FI_DEV_TEMPERATURE_GPU_MAX_TLIMIT);
180}
181
182#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
183pub struct GpmMetricId(pub u32);
184
185impl GpmMetricId {
186    pub const GRAPHICS_UTIL: Self =
187        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_GRAPHICS_UTIL as _);
188    pub const SM_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_SM_UTIL as _);
189    pub const SM_OCCUPANCY: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_SM_OCCUPANCY as _);
190    pub const INTEGER_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_INTEGER_UTIL as _);
191    pub const ANY_TENSOR_UTIL: Self =
192        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_ANY_TENSOR_UTIL as _);
193    pub const DFMA_TENSOR_UTIL: Self =
194        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_DFMA_TENSOR_UTIL as _);
195    pub const HMMA_TENSOR_UTIL: Self =
196        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_HMMA_TENSOR_UTIL as _);
197    pub const IMMA_TENSOR_UTIL: Self =
198        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_IMMA_TENSOR_UTIL as _);
199    pub const DRAM_BW_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_DRAM_BW_UTIL as _);
200    pub const FP64_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_FP64_UTIL as _);
201    pub const FP32_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_FP32_UTIL as _);
202    pub const FP16_UTIL: Self = Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_FP16_UTIL as _);
203    pub const PCIE_TX_PER_SEC: Self =
204        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_PCIE_TX_PER_SEC as _);
205    pub const PCIE_RX_PER_SEC: Self =
206        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_PCIE_RX_PER_SEC as _);
207    pub const NVLINK_TOTAL_RX_PER_SEC: Self =
208        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_NVLINK_TOTAL_RX_PER_SEC as _);
209    pub const NVLINK_TOTAL_TX_PER_SEC: Self =
210        Self(sys::nvmlGpmMetricId_t::NVML_GPM_METRIC_NVLINK_TOTAL_TX_PER_SEC as _);
211}
212
213#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
214pub struct VgpuTypeId(pub u32);
215
216#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
217pub struct VgpuInstanceId(pub u32);
218
219#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
220pub struct VgpuPlacementId(pub u32);
221
222#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
223pub struct VgpuVersion {
224    pub min: u32,
225    pub max: u32,
226}
227
228#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
229pub struct VgpuVersionRange {
230    pub supported: VgpuVersion,
231    pub current: VgpuVersion,
232}
233
234#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
235#[repr(u32)]
236pub enum VgpuGuestInfoState {
237    Uninitialized =
238        sys::nvmlVgpuGuestInfoState_t::NVML_VGPU_INSTANCE_GUEST_INFO_STATE_UNINITIALIZED as _,
239    Initialized =
240        sys::nvmlVgpuGuestInfoState_t::NVML_VGPU_INSTANCE_GUEST_INFO_STATE_INITIALIZED as _,
241}
242
243impl_enum_conversion!(u32, sys::nvmlVgpuGuestInfoState_t, VgpuGuestInfoState);
244
245bitflags::bitflags! {
246    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
247    pub struct VgpuVmCompatibility: u32 {
248        const NONE = sys::nvmlVgpuVmCompatibility_t::NVML_VGPU_VM_COMPATIBILITY_NONE as u32;
249        const COLD = sys::nvmlVgpuVmCompatibility_t::NVML_VGPU_VM_COMPATIBILITY_COLD as u32;
250        const HIBERNATE = sys::nvmlVgpuVmCompatibility_t::NVML_VGPU_VM_COMPATIBILITY_HIBERNATE as u32;
251        const SLEEP = sys::nvmlVgpuVmCompatibility_t::NVML_VGPU_VM_COMPATIBILITY_SLEEP as u32;
252        const LIVE = sys::nvmlVgpuVmCompatibility_t::NVML_VGPU_VM_COMPATIBILITY_LIVE as u32;
253    }
254}
255
256bitflags::bitflags! {
257    #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
258    pub struct VgpuPgpuCompatibilityLimitCode: u32 {
259        const NONE = sys::nvmlVgpuPgpuCompatibilityLimitCode_t::NVML_VGPU_COMPATIBILITY_LIMIT_NONE as u32;
260        const HOST_DRIVER = sys::nvmlVgpuPgpuCompatibilityLimitCode_t::NVML_VGPU_COMPATIBILITY_LIMIT_HOST_DRIVER as u32;
261        const GUEST_DRIVER = sys::nvmlVgpuPgpuCompatibilityLimitCode_t::NVML_VGPU_COMPATIBILITY_LIMIT_GUEST_DRIVER as u32;
262        const GPU = sys::nvmlVgpuPgpuCompatibilityLimitCode_t::NVML_VGPU_COMPATIBILITY_LIMIT_GPU as u32;
263        const OTHER = sys::nvmlVgpuPgpuCompatibilityLimitCode_t::NVML_VGPU_COMPATIBILITY_LIMIT_OTHER as u32;
264    }
265}
266
267#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
268pub struct VgpuCompatibility {
269    pub vm_compatibility: VgpuVmCompatibility,
270    pub limit_code: VgpuPgpuCompatibilityLimitCode,
271}
272
273#[derive(Debug, Clone, PartialEq, Eq, Hash)]
274pub struct VgpuMetadata {
275    pub version: u32,
276    pub revision: u32,
277    pub guest_info_state: VgpuGuestInfoState,
278    pub guest_driver_version: String,
279    pub host_driver_version: String,
280    pub virtualization_caps: u32,
281    pub guest_vgpu_version: u32,
282    pub opaque_data: Vec<u8>,
283}
284
285#[derive(Debug, Clone, PartialEq, Eq, Hash)]
286pub struct PgpuMetadata {
287    pub version: u32,
288    pub revision: u32,
289    pub host_driver_version: String,
290    pub virtualization_caps: u32,
291    pub host_supported_vgpu_range: VgpuVersion,
292    pub opaque_data: Vec<u8>,
293}
294
295#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
296#[repr(u32)]
297pub enum VgpuPlacementMode {
298    Heterogeneous = sys::NVML_VGPU_PGPU_HETEROGENEOUS_MODE,
299    Homogeneous = sys::NVML_VGPU_PGPU_HOMOGENEOUS_MODE,
300}
301
302#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
303pub struct VgpuTypeDeviceId {
304    pub device_id: u64,
305    pub subsystem_id: u64,
306}
307
308#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
309pub struct VgpuTypeResolution {
310    pub x: u32,
311    pub y: u32,
312}
313
314#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
315pub struct VgpuTypeBar1Info {
316    pub bar1_size: u64,
317}
318
319#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
320pub struct FieldQuery {
321    pub field: FieldId,
322    pub scope_id: u32,
323}
324
325impl FieldQuery {
326    pub const fn new(field: FieldId) -> Self {
327        Self { field, scope_id: 0 }
328    }
329
330    pub const fn with_scope(field: FieldId, scope_id: u32) -> Self {
331        Self { field, scope_id }
332    }
333}
334
335#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
336#[repr(u32)]
337pub enum EnableState {
338    Disabled = sys::nvmlEnableState_t::NVML_FEATURE_DISABLED as _,
339    Enabled = sys::nvmlEnableState_t::NVML_FEATURE_ENABLED as _,
340}
341
342impl_enum_conversion!(u32, sys::nvmlEnableState_t, EnableState);
343
344#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
345pub enum Brand {
346    Unknown,
347    Quadro,
348    Tesla,
349    Nvs,
350    Grid,
351    GeForce,
352    Titan,
353    NvidiaVApps,
354    NvidiaVpc,
355    NvidiaVcs,
356    NvidiaVws,
357    NvidiaCloudGaming,
358    QuadroRtx,
359    NvidiaRtx,
360    Nvidia,
361    GeForceRtx,
362    TitanRtx,
363    Other(u32),
364}
365
366impl Brand {
367    pub const fn from_raw(value: u32) -> Self {
368        match value {
369            value if value == sys::nvmlBrandType_t::NVML_BRAND_UNKNOWN as u32 => Self::Unknown,
370            value if value == sys::nvmlBrandType_t::NVML_BRAND_QUADRO as u32 => Self::Quadro,
371            value if value == sys::nvmlBrandType_t::NVML_BRAND_TESLA as u32 => Self::Tesla,
372            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVS as u32 => Self::Nvs,
373            value if value == sys::nvmlBrandType_t::NVML_BRAND_GRID as u32 => Self::Grid,
374            value if value == sys::nvmlBrandType_t::NVML_BRAND_GEFORCE as u32 => Self::GeForce,
375            value if value == sys::nvmlBrandType_t::NVML_BRAND_TITAN as u32 => Self::Titan,
376            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_VAPPS as u32 => {
377                Self::NvidiaVApps
378            }
379            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_VPC as u32 => Self::NvidiaVpc,
380            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_VCS as u32 => Self::NvidiaVcs,
381            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_VWS as u32 => Self::NvidiaVws,
382            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_CLOUD_GAMING as u32 => {
383                Self::NvidiaCloudGaming
384            }
385            value if value == sys::nvmlBrandType_t::NVML_BRAND_QUADRO_RTX as u32 => Self::QuadroRtx,
386            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA_RTX as u32 => Self::NvidiaRtx,
387            value if value == sys::nvmlBrandType_t::NVML_BRAND_NVIDIA as u32 => Self::Nvidia,
388            value if value == sys::nvmlBrandType_t::NVML_BRAND_GEFORCE_RTX as u32 => {
389                Self::GeForceRtx
390            }
391            value if value == sys::nvmlBrandType_t::NVML_BRAND_TITAN_RTX as u32 => Self::TitanRtx,
392            raw => Self::Other(raw),
393        }
394    }
395}
396
397#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
398#[repr(u32)]
399pub enum TemperatureSensor {
400    Gpu = sys::nvmlTemperatureSensors_t::NVML_TEMPERATURE_GPU as _,
401}
402
403impl_enum_conversion!(u32, sys::nvmlTemperatureSensors_t, TemperatureSensor);
404
405#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
406#[repr(u32)]
407pub enum TemperatureThreshold {
408    Shutdown = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_SHUTDOWN as _,
409    Slowdown = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_SLOWDOWN as _,
410    MemoryMax = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_MEM_MAX as _,
411    GpuMax = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_GPU_MAX as _,
412    AcousticMin = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MIN as _,
413    AcousticCurrent =
414        sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_CURR as _,
415    AcousticMax = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MAX as _,
416    GpuCurrent = sys::nvmlTemperatureThresholds_t::NVML_TEMPERATURE_THRESHOLD_GPS_CURR as _,
417}
418
419impl_enum_conversion!(u32, sys::nvmlTemperatureThresholds_t, TemperatureThreshold);
420
421#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
422#[repr(u32)]
423pub enum ComputeMode {
424    Default = sys::nvmlComputeMode_t::NVML_COMPUTEMODE_DEFAULT as _,
425    ExclusiveThread = sys::nvmlComputeMode_t::NVML_COMPUTEMODE_EXCLUSIVE_THREAD as _,
426    Prohibited = sys::nvmlComputeMode_t::NVML_COMPUTEMODE_PROHIBITED as _,
427    ExclusiveProcess = sys::nvmlComputeMode_t::NVML_COMPUTEMODE_EXCLUSIVE_PROCESS as _,
428}
429
430impl_enum_conversion!(u32, sys::nvmlComputeMode_t, ComputeMode);
431
432#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
433pub enum Architecture {
434    Kepler,
435    Maxwell,
436    Pascal,
437    Volta,
438    Turing,
439    Ampere,
440    Ada,
441    Hopper,
442    Blackwell,
443    Other(u32),
444}
445
446impl Architecture {
447    pub const fn from_raw(value: u32) -> Self {
448        match value {
449            sys::NVML_DEVICE_ARCH_KEPLER => Self::Kepler,
450            sys::NVML_DEVICE_ARCH_MAXWELL => Self::Maxwell,
451            sys::NVML_DEVICE_ARCH_PASCAL => Self::Pascal,
452            sys::NVML_DEVICE_ARCH_VOLTA => Self::Volta,
453            sys::NVML_DEVICE_ARCH_TURING => Self::Turing,
454            sys::NVML_DEVICE_ARCH_AMPERE => Self::Ampere,
455            sys::NVML_DEVICE_ARCH_ADA => Self::Ada,
456            sys::NVML_DEVICE_ARCH_HOPPER => Self::Hopper,
457            sys::NVML_DEVICE_ARCH_BLACKWELL => Self::Blackwell,
458            raw => Self::Other(raw),
459        }
460    }
461}
462
463#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
464#[repr(u32)]
465pub enum ClockType {
466    Graphics = sys::nvmlClockType_t::NVML_CLOCK_GRAPHICS as _,
467    Sm = sys::nvmlClockType_t::NVML_CLOCK_SM as _,
468    Memory = sys::nvmlClockType_t::NVML_CLOCK_MEM as _,
469    Video = sys::nvmlClockType_t::NVML_CLOCK_VIDEO as _,
470}
471
472impl_enum_conversion!(u32, sys::nvmlClockType_t, ClockType);
473
474#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
475#[repr(u32)]
476pub enum NvLinkUtilizationCountUnits {
477    Cycles = sys::nvmlNvLinkUtilizationCountUnits_t::NVML_NVLINK_COUNTER_UNIT_CYCLES as _,
478    Packets = sys::nvmlNvLinkUtilizationCountUnits_t::NVML_NVLINK_COUNTER_UNIT_PACKETS as _,
479    Bytes = sys::nvmlNvLinkUtilizationCountUnits_t::NVML_NVLINK_COUNTER_UNIT_BYTES as _,
480    Reserved = sys::nvmlNvLinkUtilizationCountUnits_t::NVML_NVLINK_COUNTER_UNIT_RESERVED as _,
481    Count = sys::nvmlNvLinkUtilizationCountUnits_t::NVML_NVLINK_COUNTER_UNIT_COUNT as _,
482}
483
484impl_enum_conversion!(
485    u32,
486    sys::nvmlNvLinkUtilizationCountUnits_t,
487    NvLinkUtilizationCountUnits
488);
489
490#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
491#[repr(u32)]
492pub enum NvLinkCapability {
493    P2pSupported = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_P2P_SUPPORTED as _,
494    SysmemAccess = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_SYSMEM_ACCESS as _,
495    P2pAtomics = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_P2P_ATOMICS as _,
496    SysmemAtomics = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_SYSMEM_ATOMICS as _,
497    SliBridge = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_SLI_BRIDGE as _,
498    Valid = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_VALID as _,
499    Count = sys::nvmlNvLinkCapability_t::NVML_NVLINK_CAP_COUNT as _,
500}
501
502impl_enum_conversion!(u32, sys::nvmlNvLinkCapability_t, NvLinkCapability);
503
504#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
505#[repr(u32)]
506pub enum NvLinkErrorCounter {
507    DlReplay = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_DL_REPLAY as _,
508    DlRecovery = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_DL_RECOVERY as _,
509    DlCrcFlit = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_DL_CRC_FLIT as _,
510    DlCrcData = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_DL_CRC_DATA as _,
511    DlEccData = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_DL_ECC_DATA as _,
512    Count = sys::nvmlNvLinkErrorCounter_t::NVML_NVLINK_ERROR_COUNT as _,
513}
514
515impl_enum_conversion!(u32, sys::nvmlNvLinkErrorCounter_t, NvLinkErrorCounter);
516
517#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
518#[repr(u32)]
519pub enum NvLinkRemoteDeviceType {
520    Gpu = sys::nvmlIntNvLinkDeviceType_t::NVML_NVLINK_DEVICE_TYPE_GPU as _,
521    IbmNpu = sys::nvmlIntNvLinkDeviceType_t::NVML_NVLINK_DEVICE_TYPE_IBMNPU as _,
522    Switch = sys::nvmlIntNvLinkDeviceType_t::NVML_NVLINK_DEVICE_TYPE_SWITCH as _,
523    Unknown = sys::nvmlIntNvLinkDeviceType_t::NVML_NVLINK_DEVICE_TYPE_UNKNOWN as _,
524}
525
526impl_enum_conversion!(u32, sys::nvmlIntNvLinkDeviceType_t, NvLinkRemoteDeviceType);
527
528#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
529#[repr(u32)]
530pub enum NvLinkVersion {
531    Invalid = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_INVALID as _,
532    V1_0 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_1_0 as _,
533    V2_0 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_2_0 as _,
534    V2_2 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_2_2 as _,
535    V3_0 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_3_0 as _,
536    V3_1 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_3_1 as _,
537    V4_0 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_4_0 as _,
538    V5_0 = sys::nvmlNvlinkVersion_t::NVML_NVLINK_VERSION_5_0 as _,
539}
540
541impl_enum_conversion!(u32, sys::nvmlNvlinkVersion_t, NvLinkVersion);
542
543#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
544#[repr(u32)]
545pub enum PowerProfileType {
546    MaxP = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_MAX_P as _,
547    MaxQ = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_MAX_Q as _,
548    Compute = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_COMPUTE as _,
549    MemoryBound = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_MEMORY_BOUND as _,
550    Network = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_NETWORK as _,
551    Balanced = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_BALANCED as _,
552    LlmInference = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_LLM_INFERENCE as _,
553    LlmTraining = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_LLM_TRAINING as _,
554    Rbm = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_RBM as _,
555    Dcpcie = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_DCPCIE as _,
556    HmmaSparse = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_HMMA_SPARSE as _,
557    HmmaDense = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_HMMA_DENSE as _,
558    SyncBalanced = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_SYNC_BALANCED as _,
559    Hpc = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_HPC as _,
560    Mig = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_MIG as _,
561    Max = sys::nvmlPowerProfileType_t::NVML_POWER_PROFILE_MAX as _,
562}
563
564impl_enum_conversion!(u32, sys::nvmlPowerProfileType_t, PowerProfileType);
565
566#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
567#[repr(u32)]
568pub enum PowerMizerMode {
569    Adaptive = sys::NVML_POWER_MIZER_MODE_ADAPTIVE,
570    PreferMaximumPerformance = sys::NVML_POWER_MIZER_MODE_PREFER_MAXIMUM_PERFORMANCE,
571    Auto = sys::NVML_POWER_MIZER_MODE_AUTO,
572    PreferConsistentPerformance = sys::NVML_POWER_MIZER_MODE_PREFER_CONSISTENT_PERFORMANCE,
573}
574
575#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
576pub struct PowerMizerModes {
577    pub current_mode: u32,
578    pub mode: u32,
579    pub supported_modes: u32,
580}
581
582#[derive(Debug, Clone, PartialEq, Eq, Hash)]
583pub struct WorkloadPowerProfileInfo {
584    pub profile_id: u32,
585    pub priority: u32,
586    pub conflicting_profiles: Vec<u32>,
587}
588
589#[derive(Debug, Clone, PartialEq, Eq, Hash)]
590pub struct WorkloadPowerProfilesInfo {
591    pub supported_profiles: Vec<u32>,
592    pub profiles: Vec<WorkloadPowerProfileInfo>,
593}
594
595#[derive(Debug, Clone, PartialEq, Eq, Hash)]
596pub struct WorkloadPowerCurrentProfiles {
597    pub supported_profiles: Vec<u32>,
598    pub requested_profiles: Vec<u32>,
599    pub enforced_profiles: Vec<u32>,
600}
601
602#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
603pub struct DramEncryptionInfo {
604    pub encryption_state: EnableState,
605}
606
607#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
608pub struct ConfComputeSystemCaps {
609    pub cpu_caps: u32,
610    pub gpus_caps: u32,
611}
612
613#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
614pub struct ConfComputeSystemState {
615    pub environment: u32,
616    pub cc_feature: u32,
617    pub dev_tools_mode: u32,
618}
619
620#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
621pub struct ConfComputeSystemSettings {
622    pub environment: u32,
623    pub cc_feature: u32,
624    pub dev_tools_mode: u32,
625    pub multi_gpu_mode: u32,
626}
627
628#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
629pub struct ConfComputeMemSizeInfo {
630    pub protected_mem_size_kib: u64,
631    pub unprotected_mem_size_kib: u64,
632}
633
634#[derive(Debug, Clone, PartialEq, Eq, Hash)]
635pub struct ConfComputeGpuCertificate {
636    pub cert_chain: Vec<u8>,
637    pub attestation_cert_chain: Vec<u8>,
638}
639
640#[derive(Debug, Clone, PartialEq, Eq, Hash)]
641pub struct ConfComputeGpuAttestationReport {
642    pub cec_attestation_report_present: bool,
643    pub nonce: [u8; 32],
644    pub attestation_report: Vec<u8>,
645    pub cec_attestation_report: Vec<u8>,
646}
647
648#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
649pub struct ConfComputeKeyRotationThreshold {
650    pub attacker_advantage: u64,
651}
652
653#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
654#[repr(u32)]
655pub enum ClockId {
656    Current = sys::nvmlClockId_t::NVML_CLOCK_ID_CURRENT as _,
657    #[deprecated]
658    AppClockTarget = sys::nvmlClockId_t::NVML_CLOCK_ID_APP_CLOCK_TARGET as _,
659    #[deprecated]
660    AppClockDefault = sys::nvmlClockId_t::NVML_CLOCK_ID_APP_CLOCK_DEFAULT as _,
661    CustomerBoostMax = sys::nvmlClockId_t::NVML_CLOCK_ID_CUSTOMER_BOOST_MAX as _,
662}
663
664impl_enum_conversion!(u32, sys::nvmlClockId_t, ClockId);
665
666/// Represents the thermal sensor targets.
667#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
668#[repr(i32)]
669pub enum ThermalTarget {
670    None = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_NONE as _,
671    /// GPU core temperature requires NvPhysicalGpuHandle.
672    Gpu = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_GPU as _,
673    /// GPU memory temperature requires NvPhysicalGpuHandle.
674    Memory = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_MEMORY as _,
675    /// GPU power supply temperature requires NvPhysicalGpuHandle.
676    PowerSupply = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_POWER_SUPPLY as _,
677    /// GPU board ambient temperature requires NvPhysicalGpuHandle.
678    Board = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_BOARD as _,
679    /// Visual Computing Device Board temperature requires NvVisualComputingDeviceHandle.
680    VcdBoard = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_VCD_BOARD as _,
681    /// Visual Computing Device Inlet temperature requires NvVisualComputingDeviceHandle.
682    VcdInlet = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_VCD_INLET as _,
683    /// Visual Computing Device Outlet temperature requires NvVisualComputingDeviceHandle.
684    VcdOutlet = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_VCD_OUTLET as _,
685    All = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_ALL as _,
686    Unknown = sys::nvmlThermalTarget_t::NVML_THERMAL_TARGET_UNKNOWN as _,
687}
688
689impl_enum_conversion!(i32, sys::nvmlThermalTarget_t, ThermalTarget);
690
691/// Represents the thermal sensor controllers.
692#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
693#[repr(i32)]
694pub enum ThermalController {
695    None = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_NONE as _,
696    GpuInternal = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_GPU_INTERNAL as _,
697    Adm1032 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_ADM1032 as _,
698    Adt7461 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_ADT7461 as _,
699    Max6649 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_MAX6649 as _,
700    Max1617 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_MAX1617 as _,
701    Lm99 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_LM99 as _,
702    Lm89 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_LM89 as _,
703    Lm64 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_LM64 as _,
704    G781 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_G781 as _,
705    Adt7473 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_ADT7473 as _,
706    Sbmax6649 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_SBMAX6649 as _,
707    VbiosEvt = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_VBIOSEVT as _,
708    Os = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_OS as _,
709    NvsysconCanoas = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_NVSYSCON_CANOAS as _,
710    NvsysconE551 = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_NVSYSCON_E551 as _,
711    Max6649r = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_MAX6649R as _,
712    Adt7473s = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_ADT7473S as _,
713    Unknown = sys::nvmlThermalController_t::NVML_THERMAL_CONTROLLER_UNKNOWN as _,
714}
715
716impl_enum_conversion!(i32, sys::nvmlThermalController_t, ThermalController);
717
718/// Enum to represent device addressing mode values.
719#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
720#[repr(u32)]
721pub enum DeviceAddressingMode {
722    /// No active mode.
723    None = sys::nvmlDeviceAddressingModeType_t::NVML_DEVICE_ADDRESSING_MODE_NONE as _,
724    /// Heterogeneous Memory Management mode.
725    Hmm = sys::nvmlDeviceAddressingModeType_t::NVML_DEVICE_ADDRESSING_MODE_HMM as _,
726    /// Address Translation Services mode.
727    Ats = sys::nvmlDeviceAddressingModeType_t::NVML_DEVICE_ADDRESSING_MODE_ATS as _,
728}
729
730impl_enum_conversion!(
731    u32,
732    sys::nvmlDeviceAddressingModeType_t,
733    DeviceAddressingMode
734);
735
736#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
737#[repr(u32)]
738pub enum BridgeChipType {
739    Plx = sys::nvmlBridgeChipType_t::NVML_BRIDGE_CHIP_PLX as _,
740    Bro4 = sys::nvmlBridgeChipType_t::NVML_BRIDGE_CHIP_BRO4 as _,
741}
742
743impl_enum_conversion!(u32, sys::nvmlBridgeChipType_t, BridgeChipType);
744
745#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
746#[repr(u32)]
747pub enum PerformanceState {
748    P0 = sys::nvmlPstates_t::NVML_PSTATE_0 as _,
749    P1 = sys::nvmlPstates_t::NVML_PSTATE_1 as _,
750    P2 = sys::nvmlPstates_t::NVML_PSTATE_2 as _,
751    P3 = sys::nvmlPstates_t::NVML_PSTATE_3 as _,
752    P4 = sys::nvmlPstates_t::NVML_PSTATE_4 as _,
753    P5 = sys::nvmlPstates_t::NVML_PSTATE_5 as _,
754    P6 = sys::nvmlPstates_t::NVML_PSTATE_6 as _,
755    P7 = sys::nvmlPstates_t::NVML_PSTATE_7 as _,
756    P8 = sys::nvmlPstates_t::NVML_PSTATE_8 as _,
757    P9 = sys::nvmlPstates_t::NVML_PSTATE_9 as _,
758    P10 = sys::nvmlPstates_t::NVML_PSTATE_10 as _,
759    P11 = sys::nvmlPstates_t::NVML_PSTATE_11 as _,
760    P12 = sys::nvmlPstates_t::NVML_PSTATE_12 as _,
761    P13 = sys::nvmlPstates_t::NVML_PSTATE_13 as _,
762    P14 = sys::nvmlPstates_t::NVML_PSTATE_14 as _,
763    P15 = sys::nvmlPstates_t::NVML_PSTATE_15 as _,
764    Unknown = sys::nvmlPstates_t::NVML_PSTATE_UNKNOWN as _,
765}
766
767impl_enum_conversion!(u32, sys::nvmlPstates_t, PerformanceState);
768
769#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
770#[repr(u32)]
771pub enum PcieUtilCounter {
772    TxBytes = sys::nvmlPcieUtilCounter_t::NVML_PCIE_UTIL_TX_BYTES as _,
773    RxBytes = sys::nvmlPcieUtilCounter_t::NVML_PCIE_UTIL_RX_BYTES as _,
774}
775
776impl_enum_conversion!(u32, sys::nvmlPcieUtilCounter_t, PcieUtilCounter);
777
778#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
779#[repr(u32)]
780pub enum TopologyLevel {
781    Internal = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_INTERNAL as _,
782    Single = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_SINGLE as _,
783    Multiple = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_MULTIPLE as _,
784    HostBridge = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_HOSTBRIDGE as _,
785    Node = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_NODE as _,
786    System = sys::nvmlGpuTopologyLevel_t::NVML_TOPOLOGY_SYSTEM as _,
787}
788
789impl_enum_conversion!(u32, sys::nvmlGpuTopologyLevel_t, TopologyLevel);
790
791#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
792#[repr(u32)]
793pub enum P2pCapabilityIndex {
794    Read = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_READ as _,
795    Write = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_WRITE as _,
796    Nvlink = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_NVLINK as _,
797    Atomics = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_ATOMICS as _,
798    Prop = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_PROP as _,
799    Unknown = sys::nvmlGpuP2PCapsIndex_t::NVML_P2P_CAPS_INDEX_UNKNOWN as _,
800}
801
802impl_enum_conversion!(u32, sys::nvmlGpuP2PCapsIndex_t, P2pCapabilityIndex);
803
804#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
805#[repr(u32)]
806pub enum P2pStatus {
807    Ok = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_OK as _,
808    ChipsetNotSupported = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_CHIPSET_NOT_SUPPORTED as _,
809    GpuNotSupported = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_GPU_NOT_SUPPORTED as _,
810    IoHubNotSupported = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_IOH_TOPOLOGY_NOT_SUPPORTED as _,
811    DisabledByRegKey = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_DISABLED_BY_REGKEY as _,
812    NotSupported = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_NOT_SUPPORTED as _,
813    Unknown = sys::nvmlGpuP2PStatus_t::NVML_P2P_STATUS_UNKNOWN as _,
814}
815
816impl_enum_conversion!(u32, sys::nvmlGpuP2PStatus_t, P2pStatus);
817
818#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
819#[repr(u32)]
820pub enum InforomObject {
821    Oem = sys::nvmlInforomObject_t::NVML_INFOROM_OEM as _,
822    Ecc = sys::nvmlInforomObject_t::NVML_INFOROM_ECC as _,
823    Power = sys::nvmlInforomObject_t::NVML_INFOROM_POWER as _,
824    Den = sys::nvmlInforomObject_t::NVML_INFOROM_DEN as _,
825}
826
827impl_enum_conversion!(u32, sys::nvmlInforomObject_t, InforomObject);
828
829#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
830#[repr(u32)]
831pub enum MemoryErrorType {
832    Corrected = sys::nvmlMemoryErrorType_t::NVML_MEMORY_ERROR_TYPE_CORRECTED as _,
833    Uncorrected = sys::nvmlMemoryErrorType_t::NVML_MEMORY_ERROR_TYPE_UNCORRECTED as _,
834}
835
836impl_enum_conversion!(u32, sys::nvmlMemoryErrorType_t, MemoryErrorType);
837
838#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
839#[repr(u32)]
840pub enum EccCounterType {
841    Volatile = sys::nvmlEccCounterType_t::NVML_VOLATILE_ECC as _,
842    Aggregate = sys::nvmlEccCounterType_t::NVML_AGGREGATE_ECC as _,
843}
844
845impl_enum_conversion!(u32, sys::nvmlEccCounterType_t, EccCounterType);
846
847#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
848#[repr(u32)]
849pub enum MemoryLocation {
850    L1Cache = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_L1_CACHE as _,
851    L2Cache = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_L2_CACHE as _,
852    Dram = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_DRAM as _,
853    RegisterFile = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_REGISTER_FILE as _,
854    TextureMemory = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_TEXTURE_MEMORY as _,
855    TextureShm = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_TEXTURE_SHM as _,
856    Cbu = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_CBU as _,
857    Sram = sys::nvmlMemoryLocation_t::NVML_MEMORY_LOCATION_SRAM as _,
858}
859
860impl_enum_conversion!(u32, sys::nvmlMemoryLocation_t, MemoryLocation);
861
862#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
863#[repr(u32)]
864pub enum PerfPolicyType {
865    Power = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_POWER as _,
866    Thermal = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_THERMAL as _,
867    SyncBoost = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_SYNC_BOOST as _,
868    BoardLimit = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_BOARD_LIMIT as _,
869    LowUtilization = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_LOW_UTILIZATION as _,
870    Reliability = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_RELIABILITY as _,
871    TotalAppClocks = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_TOTAL_APP_CLOCKS as _,
872    TotalBaseClocks = sys::nvmlPerfPolicyType_t::NVML_PERF_POLICY_TOTAL_BASE_CLOCKS as _,
873}
874
875impl_enum_conversion!(u32, sys::nvmlPerfPolicyType_t, PerfPolicyType);
876
877#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
878#[repr(u32)]
879pub enum PageRetirementCause {
880    MultipleSingleBitEccErrors =
881        sys::nvmlPageRetirementCause_t::NVML_PAGE_RETIREMENT_CAUSE_MULTIPLE_SINGLE_BIT_ECC_ERRORS
882            as _,
883    DoubleBitEccError =
884        sys::nvmlPageRetirementCause_t::NVML_PAGE_RETIREMENT_CAUSE_DOUBLE_BIT_ECC_ERROR as _,
885}
886
887impl_enum_conversion!(u32, sys::nvmlPageRetirementCause_t, PageRetirementCause);
888
889#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
890#[repr(u32)]
891pub enum FieldValueType {
892    Double = sys::nvmlValueType_t::NVML_VALUE_TYPE_DOUBLE as _,
893    UnsignedInt = sys::nvmlValueType_t::NVML_VALUE_TYPE_UNSIGNED_INT as _,
894    UnsignedLong = sys::nvmlValueType_t::NVML_VALUE_TYPE_UNSIGNED_LONG as _,
895    UnsignedLongLong = sys::nvmlValueType_t::NVML_VALUE_TYPE_UNSIGNED_LONG_LONG as _,
896    SignedLongLong = sys::nvmlValueType_t::NVML_VALUE_TYPE_SIGNED_LONG_LONG as _,
897    SignedInt = sys::nvmlValueType_t::NVML_VALUE_TYPE_SIGNED_INT as _,
898    UnsignedShort = sys::nvmlValueType_t::NVML_VALUE_TYPE_UNSIGNED_SHORT as _,
899}
900
901impl_enum_conversion!(u32, sys::nvmlValueType_t, FieldValueType);
902
903#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
904#[repr(u32)]
905pub enum SamplingType {
906    TotalPower = sys::nvmlSamplingType_t::NVML_TOTAL_POWER_SAMPLES as _,
907    GpuUtilization = sys::nvmlSamplingType_t::NVML_GPU_UTILIZATION_SAMPLES as _,
908    MemoryUtilization = sys::nvmlSamplingType_t::NVML_MEMORY_UTILIZATION_SAMPLES as _,
909    EncoderUtilization = sys::nvmlSamplingType_t::NVML_ENC_UTILIZATION_SAMPLES as _,
910    DecoderUtilization = sys::nvmlSamplingType_t::NVML_DEC_UTILIZATION_SAMPLES as _,
911    ProcessorClock = sys::nvmlSamplingType_t::NVML_PROCESSOR_CLK_SAMPLES as _,
912    MemoryClock = sys::nvmlSamplingType_t::NVML_MEMORY_CLK_SAMPLES as _,
913    ModulePower = sys::nvmlSamplingType_t::NVML_MODULE_POWER_SAMPLES as _,
914    JpgUtilization = sys::nvmlSamplingType_t::NVML_JPG_UTILIZATION_SAMPLES as _,
915    OfaUtilization = sys::nvmlSamplingType_t::NVML_OFA_UTILIZATION_SAMPLES as _,
916}
917
918impl_enum_conversion!(u32, sys::nvmlSamplingType_t, SamplingType);
919
920#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
921#[repr(u32)]
922pub enum ProcessMode {
923    Compute = 0,
924    Graphics = 1,
925    MpsCompute = 2,
926}
927
928#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
929#[repr(u32)]
930pub enum AffinityScope {
931    Node = sys::NVML_AFFINITY_SCOPE_NODE,
932    Socket = sys::NVML_AFFINITY_SCOPE_SOCKET,
933}
934
935#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
936pub enum BusType {
937    Unknown,
938    Pci,
939    Pcie,
940    Fpci,
941    Agp,
942    Other(u32),
943}
944
945impl BusType {
946    pub const fn from_raw(value: u32) -> Self {
947        match value {
948            sys::NVML_BUS_TYPE_UNKNOWN => Self::Unknown,
949            sys::NVML_BUS_TYPE_PCI => Self::Pci,
950            sys::NVML_BUS_TYPE_PCIE => Self::Pcie,
951            sys::NVML_BUS_TYPE_FPCI => Self::Fpci,
952            sys::NVML_BUS_TYPE_AGP => Self::Agp,
953            raw => Self::Other(raw),
954        }
955    }
956}
957
958#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
959pub enum PowerSource {
960    Ac,
961    Battery,
962    Undersized,
963    Other(u32),
964}
965
966impl PowerSource {
967    pub const fn from_raw(value: u32) -> Self {
968        match value {
969            sys::NVML_POWER_SOURCE_AC => Self::Ac,
970            sys::NVML_POWER_SOURCE_BATTERY => Self::Battery,
971            sys::NVML_POWER_SOURCE_UNDERSIZED => Self::Undersized,
972            raw => Self::Other(raw),
973        }
974    }
975}
976
977#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
978#[repr(u32)]
979pub enum EncoderType {
980    H264 = sys::nvmlEncoderType_t::NVML_ENCODER_QUERY_H264 as _,
981    Hevc = sys::nvmlEncoderType_t::NVML_ENCODER_QUERY_HEVC as _,
982    Av1 = sys::nvmlEncoderType_t::NVML_ENCODER_QUERY_AV1 as _,
983    Unknown = sys::nvmlEncoderType_t::NVML_ENCODER_QUERY_UNKNOWN as _,
984}
985
986impl_enum_conversion!(u32, sys::nvmlEncoderType_t, EncoderType);
987
988#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
989#[repr(u32)]
990pub enum RestrictedApi {
991    #[deprecated]
992    SetApplicationsClocks =
993        sys::nvmlRestrictedAPI_t::NVML_RESTRICTED_API_SET_APPLICATION_CLOCKS as _,
994    SetAutoBoostedClocks =
995        sys::nvmlRestrictedAPI_t::NVML_RESTRICTED_API_SET_AUTO_BOOSTED_CLOCKS as _,
996    Count = sys::nvmlRestrictedAPI_t::NVML_RESTRICTED_API_COUNT as _,
997}
998
999impl_enum_conversion!(u32, sys::nvmlRestrictedAPI_t, RestrictedApi);
1000
1001#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1002#[repr(u32)]
1003pub enum AdaptiveClockInfoStatus {
1004    Disabled = sys::NVML_ADAPTIVE_CLOCKING_INFO_STATUS_DISABLED,
1005    Enabled = sys::NVML_ADAPTIVE_CLOCKING_INFO_STATUS_ENABLED,
1006}
1007
1008#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1009#[repr(u32)]
1010pub enum FanPolicy {
1011    TemperatureContinuousSw = sys::NVML_FAN_POLICY_TEMPERATURE_CONTINOUS_SW,
1012    Manual = sys::NVML_FAN_POLICY_MANUAL,
1013}
1014
1015#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1016#[repr(u32)]
1017pub enum FanState {
1018    Normal = sys::nvmlFanState_t::NVML_FAN_NORMAL as _,
1019    Failed = sys::nvmlFanState_t::NVML_FAN_FAILED as _,
1020}
1021
1022impl_enum_conversion!(u32, sys::nvmlFanState_t, FanState);
1023
1024#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1025#[repr(u32)]
1026pub enum CoolerControl {
1027    None = sys::nvmlCoolerControl_t::NVML_THERMAL_COOLER_SIGNAL_NONE as _,
1028    Toggle = sys::nvmlCoolerControl_t::NVML_THERMAL_COOLER_SIGNAL_TOGGLE as _,
1029    Variable = sys::nvmlCoolerControl_t::NVML_THERMAL_COOLER_SIGNAL_VARIABLE as _,
1030    Count = sys::nvmlCoolerControl_t::NVML_THERMAL_COOLER_SIGNAL_COUNT as _,
1031}
1032
1033impl_enum_conversion!(u32, sys::nvmlCoolerControl_t, CoolerControl);
1034
1035#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1036#[repr(u32)]
1037pub enum CoolerTarget {
1038    None = sys::nvmlCoolerTarget_t::NVML_THERMAL_COOLER_TARGET_NONE as _,
1039    Gpu = sys::nvmlCoolerTarget_t::NVML_THERMAL_COOLER_TARGET_GPU as _,
1040    Memory = sys::nvmlCoolerTarget_t::NVML_THERMAL_COOLER_TARGET_MEMORY as _,
1041    PowerSupply = sys::nvmlCoolerTarget_t::NVML_THERMAL_COOLER_TARGET_POWER_SUPPLY as _,
1042    GpuRelated = sys::nvmlCoolerTarget_t::NVML_THERMAL_COOLER_TARGET_GPU_RELATED as _,
1043}
1044
1045impl_enum_conversion!(u32, sys::nvmlCoolerTarget_t, CoolerTarget);
1046
1047#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1048#[repr(u32)]
1049pub enum FbcSessionType {
1050    Unknown = sys::nvmlFBCSessionType_t::NVML_FBC_SESSION_TYPE_UNKNOWN as _,
1051    ToSys = sys::nvmlFBCSessionType_t::NVML_FBC_SESSION_TYPE_TOSYS as _,
1052    Cuda = sys::nvmlFBCSessionType_t::NVML_FBC_SESSION_TYPE_CUDA as _,
1053    Vid = sys::nvmlFBCSessionType_t::NVML_FBC_SESSION_TYPE_VID as _,
1054    HwEnc = sys::nvmlFBCSessionType_t::NVML_FBC_SESSION_TYPE_HWENC as _,
1055}
1056
1057impl_enum_conversion!(u32, sys::nvmlFBCSessionType_t, FbcSessionType);
1058
1059#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1060#[repr(u32)]
1061pub enum DriverModel {
1062    Wddm = sys::nvmlDriverModel_t::NVML_DRIVER_WDDM as _,
1063    #[deprecated]
1064    Wdm = sys::nvmlDriverModel_t::NVML_DRIVER_WDM as _,
1065    Mcdm = sys::nvmlDriverModel_t::NVML_DRIVER_MCDM as _,
1066}
1067
1068impl_enum_conversion!(u32, sys::nvmlDriverModel_t, DriverModel);
1069
1070#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1071#[repr(u32)]
1072pub enum GpuOperationMode {
1073    AllOn = sys::nvmlGpuOperationMode_t::NVML_GOM_ALL_ON as _,
1074    Compute = sys::nvmlGpuOperationMode_t::NVML_GOM_COMPUTE as _,
1075    LowDp = sys::nvmlGpuOperationMode_t::NVML_GOM_LOW_DP as _,
1076}
1077
1078impl_enum_conversion!(u32, sys::nvmlGpuOperationMode_t, GpuOperationMode);
1079
1080#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1081#[repr(u32)]
1082pub enum MigMode {
1083    Disabled = sys::NVML_DEVICE_MIG_DISABLE,
1084    Enabled = sys::NVML_DEVICE_MIG_ENABLE,
1085}
1086
1087#[derive(Debug, Clone, PartialEq, Eq)]
1088pub struct MigModeActivation {
1089    pub status: Result<()>,
1090}
1091
1092impl MigModeActivation {
1093    pub fn from_raw(status: sys::nvmlReturn_t) -> Self {
1094        Self {
1095            status: if status == sys::nvmlReturn_t::NVML_SUCCESS {
1096                Ok(())
1097            } else {
1098                Err(status.into())
1099            },
1100        }
1101    }
1102}
1103
1104#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1105pub enum VirtualizationMode {
1106    None,
1107    Passthrough,
1108    Vgpu,
1109    HostVgpu,
1110    HostVsga,
1111    Other(u32),
1112}
1113
1114impl VirtualizationMode {
1115    pub const fn from_raw(value: u32) -> Self {
1116        match value {
1117            value
1118                if value
1119                    == sys::nvmlGpuVirtualizationMode_t::NVML_GPU_VIRTUALIZATION_MODE_NONE
1120                        as u32 =>
1121            {
1122                Self::None
1123            }
1124            value
1125                if value
1126                    == sys::nvmlGpuVirtualizationMode_t::NVML_GPU_VIRTUALIZATION_MODE_PASSTHROUGH
1127                        as u32 =>
1128            {
1129                Self::Passthrough
1130            }
1131            value
1132                if value
1133                    == sys::nvmlGpuVirtualizationMode_t::NVML_GPU_VIRTUALIZATION_MODE_VGPU
1134                        as u32 =>
1135            {
1136                Self::Vgpu
1137            }
1138            value
1139                if value
1140                    == sys::nvmlGpuVirtualizationMode_t::NVML_GPU_VIRTUALIZATION_MODE_HOST_VGPU
1141                        as u32 =>
1142            {
1143                Self::HostVgpu
1144            }
1145            value
1146                if value
1147                    == sys::nvmlGpuVirtualizationMode_t::NVML_GPU_VIRTUALIZATION_MODE_HOST_VSGA
1148                        as u32 =>
1149            {
1150                Self::HostVsga
1151            }
1152            raw => Self::Other(raw),
1153        }
1154    }
1155}
1156
1157#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1158#[repr(u32)]
1159pub enum HostVgpuMode {
1160    NonSriov = sys::nvmlHostVgpuMode_t::NVML_HOST_VGPU_MODE_NON_SRIOV as _,
1161    Sriov = sys::nvmlHostVgpuMode_t::NVML_HOST_VGPU_MODE_SRIOV as _,
1162}
1163
1164impl_enum_conversion!(u32, sys::nvmlHostVgpuMode_t, HostVgpuMode);
1165
1166#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1167#[repr(u32)]
1168pub enum VgpuDriverCapability {
1169    HeterogeneousMultiVgpu =
1170        sys::nvmlVgpuDriverCapability_t::NVML_VGPU_DRIVER_CAP_HETEROGENEOUS_MULTI_VGPU as _,
1171    WarmUpdate = sys::nvmlVgpuDriverCapability_t::NVML_VGPU_DRIVER_CAP_WARM_UPDATE as _,
1172}
1173
1174impl_enum_conversion!(u32, sys::nvmlVgpuDriverCapability_t, VgpuDriverCapability);
1175
1176#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1177#[repr(u32)]
1178pub enum VgpuVmIdType {
1179    DomainId = sys::nvmlVgpuVmIdType_t::NVML_VGPU_VM_ID_DOMAIN_ID as _,
1180    Uuid = sys::nvmlVgpuVmIdType_t::NVML_VGPU_VM_ID_UUID as _,
1181}
1182
1183impl_enum_conversion!(u32, sys::nvmlVgpuVmIdType_t, VgpuVmIdType);
1184
1185#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1186pub struct VgpuVmId {
1187    pub value: String,
1188    pub kind: VgpuVmIdType,
1189}
1190
1191#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1192pub struct VgpuLicenseExpiry {
1193    pub year: u32,
1194    pub month: u16,
1195    pub day: u16,
1196    pub hour: u16,
1197    pub minute: u16,
1198    pub second: u16,
1199    pub status: u8,
1200}
1201
1202#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1203pub struct VgpuLicenseInfo {
1204    pub is_licensed: bool,
1205    pub expiry: VgpuLicenseExpiry,
1206    pub current_state: u32,
1207}
1208
1209#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1210pub struct VgpuRuntimeState {
1211    pub size: u64,
1212}
1213
1214#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1215#[repr(u32)]
1216pub enum VgpuSchedulerPolicy {
1217    BestEffort = sys::NVML_VGPU_SCHEDULER_POLICY_BEST_EFFORT,
1218    EqualShare = sys::NVML_VGPU_SCHEDULER_POLICY_EQUAL_SHARE,
1219    FixedShare = sys::NVML_VGPU_SCHEDULER_POLICY_FIXED_SHARE,
1220}
1221
1222#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1223#[repr(u32)]
1224pub enum VgpuSchedulerArrMode {
1225    Default = sys::NVML_VGPU_SCHEDULER_ARR_DEFAULT,
1226    Disabled = sys::NVML_VGPU_SCHEDULER_ARR_DISABLE,
1227    Enabled = sys::NVML_VGPU_SCHEDULER_ARR_ENABLE,
1228}
1229
1230#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1231#[repr(u32)]
1232pub enum VgpuSchedulerEngine {
1233    Graphics = sys::NVML_VGPU_SCHEDULER_ENGINE_TYPE_GRAPHICS,
1234}
1235
1236#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1237pub struct VgpuSchedulerParams {
1238    pub timeslice: u32,
1239    pub avg_factor: Option<u32>,
1240}
1241
1242#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1243pub struct VgpuSchedulerState {
1244    pub engine: VgpuSchedulerEngine,
1245    pub policy: VgpuSchedulerPolicy,
1246    pub arr_mode: VgpuSchedulerArrMode,
1247    pub params: VgpuSchedulerParams,
1248}
1249
1250#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1251pub struct VgpuSchedulerLogEntry {
1252    pub timestamp: u64,
1253    pub time_run_total: u64,
1254    pub time_run: u64,
1255    pub sw_runlist_id: u32,
1256    pub target_time_slice: u64,
1257    pub cumulative_preemption_time: u64,
1258}
1259
1260#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1261pub struct VgpuSchedulerLog {
1262    pub state: VgpuSchedulerState,
1263    pub entries: Vec<VgpuSchedulerLogEntry>,
1264}
1265
1266#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1267pub struct DeviceVgpuCapability(sys::nvmlDeviceVgpuCapability_t);
1268
1269impl From<DeviceVgpuCapability> for sys::nvmlDeviceVgpuCapability_t {
1270    fn from(value: DeviceVgpuCapability) -> Self {
1271        value.0
1272    }
1273}
1274
1275impl DeviceVgpuCapability {
1276    pub const DEVICE_STREAMING: Self =
1277        Self(sys::nvmlDeviceVgpuCapability_t::NVML_DEVICE_VGPU_CAP_DEVICE_STREAMING);
1278    pub const WARM_UPDATE: Self =
1279        Self(sys::nvmlDeviceVgpuCapability_t::NVML_DEVICE_VGPU_CAP_WARM_UPDATE);
1280}
1281
1282#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1283pub struct VgpuTypeCapability(sys::nvmlVgpuCapability_t);
1284
1285impl From<VgpuTypeCapability> for sys::nvmlVgpuCapability_t {
1286    fn from(value: VgpuTypeCapability) -> Self {
1287        value.0
1288    }
1289}
1290
1291impl VgpuTypeCapability {
1292    pub const NVLINK_P2P: Self = Self(sys::nvmlVgpuCapability_t::NVML_VGPU_CAP_NVLINK_P2P);
1293    pub const GPUDIRECT: Self = Self(sys::nvmlVgpuCapability_t::NVML_VGPU_CAP_GPUDIRECT);
1294}
1295
1296#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1297#[repr(u32)]
1298pub enum ComputeInstanceEngineProfile {
1299    Shared = sys::NVML_COMPUTE_INSTANCE_ENGINE_PROFILE_SHARED,
1300    Count = sys::NVML_COMPUTE_INSTANCE_ENGINE_PROFILE_COUNT,
1301}
1302
1303#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1304pub struct CurrentPending<T> {
1305    pub current: T,
1306    pub pending: T,
1307}
1308
1309#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1310pub struct GspFirmwareMode {
1311    pub enabled: bool,
1312    pub default_mode: bool,
1313}
1314
1315#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1316pub struct AutoBoostClocks {
1317    pub enabled: EnableState,
1318    pub default_enabled: EnableState,
1319}
1320
1321#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1322pub struct ComputeCapability {
1323    pub major: i32,
1324    pub minor: i32,
1325}
1326
1327#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1328pub struct Utilization {
1329    pub gpu: u32,
1330    pub memory: u32,
1331}
1332
1333#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1334pub struct MemoryInfo {
1335    pub total: u64,
1336    pub reserved: u64,
1337    pub free: u64,
1338    pub used: u64,
1339}
1340
1341#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1342pub struct PciInfo {
1343    pub bus_id_legacy: String,
1344    pub bus_id: String,
1345    pub domain: u32,
1346    pub bus: u32,
1347    pub device: u32,
1348    pub pci_device_id: u32,
1349    pub pci_subsystem_id: u32,
1350}
1351
1352#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1353pub struct PciInfoExt {
1354    pub bus_id: String,
1355    pub domain: u32,
1356    pub bus: u32,
1357    pub device: u32,
1358    pub pci_device_id: u32,
1359    pub pci_subsystem_id: u32,
1360    pub base_class: u32,
1361    pub sub_class: u32,
1362}
1363
1364#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1365pub struct ExcludedDeviceInfo {
1366    pub pci_info: PciInfo,
1367    pub uuid: String,
1368}
1369
1370#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1371pub struct HwbcEntry {
1372    pub hwbc_id: u32,
1373    pub firmware_version: String,
1374}
1375
1376#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1377pub struct GpmSupport {
1378    pub is_supported_device: bool,
1379}
1380
1381#[derive(Debug, Clone, PartialEq)]
1382pub struct GpmMetric {
1383    pub metric_id: GpmMetricId,
1384    pub result: Result<f64>,
1385    pub short_name: String,
1386    pub long_name: String,
1387    pub unit: String,
1388}
1389
1390#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1391#[repr(u32)]
1392pub enum LedColor {
1393    Green = sys::nvmlLedColor_t::NVML_LED_COLOR_GREEN as _,
1394    Amber = sys::nvmlLedColor_t::NVML_LED_COLOR_AMBER as _,
1395}
1396
1397impl_enum_conversion!(u32, sys::nvmlLedColor_t, LedColor);
1398
1399#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1400pub struct LedState {
1401    pub cause: String,
1402    pub color: LedColor,
1403}
1404
1405#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1406pub struct UnitInfo {
1407    pub name: String,
1408    pub id: String,
1409    pub serial: String,
1410    pub firmware_version: String,
1411}
1412
1413#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1414pub struct PsuInfo {
1415    pub state: String,
1416    pub current: u32,
1417    pub voltage: u32,
1418    pub power: u32,
1419}
1420
1421#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1422pub struct UnitFanInfo {
1423    pub speed: u32,
1424    pub state: FanState,
1425}
1426
1427#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1428pub struct UnitFanSpeeds {
1429    pub fans: Vec<UnitFanInfo>,
1430}
1431
1432#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1433#[repr(u32)]
1434pub enum UnitTemperatureType {
1435    Intake = 0,
1436    Exhaust = 1,
1437    Board = 2,
1438}
1439
1440#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1441pub struct UnitTemperature {
1442    pub kind: UnitTemperatureType,
1443    pub temperature: u32,
1444}
1445
1446#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1447pub struct PowerLimits {
1448    pub min: u32,
1449    pub max: u32,
1450}
1451
1452#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1453#[deprecated]
1454pub struct EccErrorCounts {
1455    pub l1_cache: u64,
1456    pub l2_cache: u64,
1457    pub device_memory: u64,
1458    pub register_file: u64,
1459}
1460
1461#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1462pub struct ViolationTime {
1463    pub reference_time: u64,
1464    pub violation_time: u64,
1465}
1466
1467#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1468pub struct RetiredPage {
1469    pub address: u64,
1470    pub timestamp: Option<u64>,
1471}
1472
1473#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1474pub struct RemappedRows {
1475    pub corrected: u32,
1476    pub uncorrected: u32,
1477    pub pending: bool,
1478    pub failure_occurred: bool,
1479}
1480
1481#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1482pub struct RowRemapperHistogram {
1483    pub max: u32,
1484    pub high: u32,
1485    pub partial: u32,
1486    pub low: u32,
1487    pub none: u32,
1488}
1489
1490#[derive(Debug, Clone, Copy, PartialEq)]
1491pub enum FieldValue {
1492    Double(f64),
1493    UnsignedInt(u32),
1494    UnsignedLong(u64),
1495    UnsignedLongLong(u64),
1496    SignedLongLong(i64),
1497    SignedInt(i32),
1498    UnsignedShort(u16),
1499}
1500
1501#[derive(Debug, Clone, PartialEq)]
1502pub struct FieldSample {
1503    pub field: FieldId,
1504    pub scope_id: u32,
1505    pub timestamp: i64,
1506    pub latency_usec: i64,
1507    pub result: Result<FieldValue>,
1508}
1509
1510#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1511pub struct AccountingStats {
1512    pub gpu_utilization: u32,
1513    pub memory_utilization: u32,
1514    pub max_memory_usage: u64,
1515    pub time: u64,
1516    pub start_time: u64,
1517    pub is_running: bool,
1518}
1519
1520#[derive(Debug, Clone, Copy, PartialEq)]
1521pub struct Sample {
1522    pub timestamp: u64,
1523    pub value: FieldValue,
1524}
1525
1526#[derive(Debug, Clone, PartialEq)]
1527pub struct Samples {
1528    pub value_type: FieldValueType,
1529    pub samples: Vec<Sample>,
1530}
1531
1532#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1533pub struct ProcessDetail {
1534    pub pid: Pid,
1535    pub used_gpu_memory: Option<u64>,
1536    pub gpu_instance_id: u32,
1537    pub compute_instance_id: u32,
1538    pub used_gpu_cc_protected_memory: Option<u64>,
1539}
1540
1541#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1542pub struct EventData {
1543    pub device: Option<Device>,
1544    pub event_types: EventTypes,
1545    pub event_data: u64,
1546    pub gpu_instance_id: u32,
1547    pub compute_instance_id: u32,
1548}
1549
1550#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1551pub struct SystemEventData {
1552    pub event_types: SystemEventTypes,
1553    pub gpu_id: u32,
1554}
1555
1556#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1557pub struct Bar1MemoryInfo {
1558    pub total: u64,
1559    pub free: u64,
1560    pub used: u64,
1561}
1562
1563#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1564pub struct UtilizationCounter {
1565    pub utilization: u32,
1566    pub sampling_period_us: u32,
1567}
1568
1569#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1570pub struct CurrentClockFreqs {
1571    pub value: String,
1572}
1573
1574#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1575pub struct PerformanceModes {
1576    pub value: String,
1577}
1578
1579#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1580pub struct ClockRange {
1581    pub min: u32,
1582    pub max: u32,
1583}
1584
1585#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1586pub struct ClockRangeI32 {
1587    pub min: i32,
1588    pub max: i32,
1589}
1590
1591#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1592pub struct ClockOffset {
1593    pub kind: ClockType,
1594    pub pstate: PerformanceState,
1595    pub clock_offset_mhz: i32,
1596    pub min_clock_offset_mhz: i32,
1597    pub max_clock_offset_mhz: i32,
1598}
1599
1600#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1601pub struct MarginTemperature {
1602    pub value: i32,
1603}
1604
1605#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1606pub struct BbxFlushTime {
1607    pub timestamp: u64,
1608    pub duration_us: u64,
1609}
1610
1611#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1612pub struct DeviceAttributes {
1613    pub multiprocessor_count: u32,
1614    pub shared_copy_engine_count: u32,
1615    pub shared_decoder_count: u32,
1616    pub shared_encoder_count: u32,
1617    pub shared_jpeg_count: u32,
1618    pub shared_ofa_count: u32,
1619    pub gpu_instance_slice_count: u32,
1620    pub compute_instance_slice_count: u32,
1621    pub memory_size_mb: u64,
1622}
1623
1624#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1625pub struct PlatformInfo {
1626    pub ib_guid: [u8; 16],
1627    pub chassis_serial_number: [u8; 16],
1628    pub slot_number: u8,
1629    pub tray_index: u8,
1630    pub host_id: u8,
1631    pub peer_type: u8,
1632    pub module_id: u8,
1633}
1634
1635#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1636pub struct Pdi {
1637    pub value: u64,
1638}
1639
1640#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1641pub struct C2cModeInfo {
1642    pub enabled: bool,
1643}
1644
1645#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1646pub struct ClkMonFaultInfo {
1647    pub clock_api_domain: u32,
1648    pub clock_domain_fault_mask: u32,
1649}
1650
1651#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1652pub struct ClkMonStatus {
1653    pub global_status: bool,
1654    pub faults: Vec<ClkMonFaultInfo>,
1655}
1656
1657#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1658pub struct EccSramErrorStatus {
1659    pub aggregate_unc_parity: u64,
1660    pub aggregate_unc_secded: u64,
1661    pub aggregate_corrected: u64,
1662    pub volatile_unc_parity: u64,
1663    pub volatile_unc_secded: u64,
1664    pub volatile_corrected: u64,
1665    pub aggregate_unc_bucket_l2: u64,
1666    pub aggregate_unc_bucket_sm: u64,
1667    pub aggregate_unc_bucket_pcie: u64,
1668    pub aggregate_unc_bucket_mcu: u64,
1669    pub aggregate_unc_bucket_other: u64,
1670    pub threshold_exceeded: bool,
1671}
1672
1673#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1674pub struct EccSramUniqueUncorrectedErrorEntry {
1675    pub unit: u32,
1676    pub location: u32,
1677    pub sublocation: u32,
1678    pub extlocation: u32,
1679    pub address: u32,
1680    pub is_parity: bool,
1681    pub count: u32,
1682}
1683
1684#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1685pub struct EccSramUniqueUncorrectedErrorCounts {
1686    pub entries: Vec<EccSramUniqueUncorrectedErrorEntry>,
1687}
1688
1689#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1690pub struct ThermalSensorSetting {
1691    pub controller: ThermalController,
1692    pub default_min_temp: i32,
1693    pub default_max_temp: i32,
1694    pub current_temp: i32,
1695    pub target: ThermalTarget,
1696}
1697
1698#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1699pub struct ThermalSettings {
1700    pub sensors: Vec<ThermalSensorSetting>,
1701}
1702
1703#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1704pub struct BridgeChipInfo {
1705    pub kind: BridgeChipType,
1706    pub firmware_version: u32,
1707}
1708
1709#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1710pub struct BridgeChipHierarchy {
1711    pub bridge_chips: Vec<BridgeChipInfo>,
1712}
1713
1714#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1715pub struct RepairStatus {
1716    pub channel_repair_pending: bool,
1717    pub tpc_repair_pending: bool,
1718}
1719
1720#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1721#[repr(u32)]
1722pub enum GpuFabricState {
1723    NotSupported = sys::NVML_GPU_FABRIC_STATE_NOT_SUPPORTED,
1724    NotStarted = sys::NVML_GPU_FABRIC_STATE_NOT_STARTED,
1725    InProgress = sys::NVML_GPU_FABRIC_STATE_IN_PROGRESS,
1726    Completed = sys::NVML_GPU_FABRIC_STATE_COMPLETED,
1727}
1728
1729#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1730#[repr(u32)]
1731pub enum GpuFabricHealthSummary {
1732    NotSupported = sys::NVML_GPU_FABRIC_HEALTH_SUMMARY_NOT_SUPPORTED,
1733    Healthy = sys::NVML_GPU_FABRIC_HEALTH_SUMMARY_HEALTHY,
1734    Unhealthy = sys::NVML_GPU_FABRIC_HEALTH_SUMMARY_UNHEALTHY,
1735    LimitedCapacity = sys::NVML_GPU_FABRIC_HEALTH_SUMMARY_LIMITED_CAPACITY,
1736}
1737
1738#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1739#[repr(u32)]
1740pub enum GpuFabricBooleanState {
1741    NotSupported = sys::NVML_GPU_FABRIC_HEALTH_MASK_DEGRADED_BW_NOT_SUPPORTED,
1742    True = sys::NVML_GPU_FABRIC_HEALTH_MASK_DEGRADED_BW_TRUE,
1743    False = sys::NVML_GPU_FABRIC_HEALTH_MASK_DEGRADED_BW_FALSE,
1744}
1745
1746#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, TryFromPrimitive, IntoPrimitive)]
1747#[repr(u32)]
1748pub enum GpuFabricIncorrectConfiguration {
1749    NotSupported = sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NOT_SUPPORTED,
1750    None = sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NONE,
1751    IncorrectSysguid = sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCORRECT_SYSGUID,
1752    IncorrectChassisSerialNumber =
1753        sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCORRECT_CHASSIS_SN,
1754    NoPartition = sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NO_PARTITION,
1755    InsufficientNvlinks =
1756        sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INSUFFICIENT_NVLINKS,
1757    IncompatibleGpuFirmware =
1758        sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCOMPATIBLE_GPU_FW,
1759    InvalidLocation = sys::NVML_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INVALID_LOCATION,
1760}
1761
1762#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1763pub struct GpuFabricHealth {
1764    pub degraded_bandwidth: GpuFabricBooleanState,
1765    pub route_recovery: GpuFabricBooleanState,
1766    pub route_unhealthy: GpuFabricBooleanState,
1767    pub access_timeout_recovery: GpuFabricBooleanState,
1768    pub incorrect_configuration: GpuFabricIncorrectConfiguration,
1769    pub raw_mask: u32,
1770}
1771
1772#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1773pub struct GpuFabricInfo {
1774    pub cluster_uuid: [u8; sys::NVML_GPU_FABRIC_UUID_LEN as usize],
1775    pub status_code: u32,
1776    pub clique_id: u32,
1777    pub state: GpuFabricState,
1778    pub health: GpuFabricHealth,
1779    pub health_summary: GpuFabricHealthSummary,
1780}
1781
1782#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1783pub struct DynamicPstateInfo {
1784    pub domain: u32,
1785    pub percentage: u32,
1786    pub increase_threshold: u32,
1787    pub decrease_threshold: u32,
1788}
1789
1790#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1791pub struct DynamicPstatesInfo {
1792    pub flags: u32,
1793    pub utilization: Vec<DynamicPstateInfo>,
1794}
1795
1796#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1797pub struct NvLinkUtilizationControl {
1798    pub units: NvLinkUtilizationCountUnits,
1799    pub packet_filter: NvLinkPacketTypes,
1800}
1801
1802#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1803pub struct NvLinkUtilizationCounter {
1804    pub rx: u64,
1805    pub tx: u64,
1806}
1807
1808#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1809pub struct NvLinkFirmwareVersion {
1810    pub ucode_type: u8,
1811    pub major: u32,
1812    pub minor: u32,
1813    pub sub_minor: u32,
1814}
1815
1816#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1817pub struct NvLinkInfo {
1818    pub nvle_enabled: bool,
1819    pub firmware_versions: Vec<NvLinkFirmwareVersion>,
1820}
1821
1822#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1823pub struct NvLinkBwMode {
1824    pub is_best: bool,
1825    pub mode: u8,
1826}
1827
1828#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1829pub struct NvLinkSupportedBwModes {
1830    pub modes: Vec<u8>,
1831}
1832
1833#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1834pub struct EncoderStats {
1835    pub session_count: u32,
1836    pub average_fps: u32,
1837    pub average_latency_us: u32,
1838}
1839
1840#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1841pub struct FanSpeedInfo {
1842    pub fan: u32,
1843    pub speed: u32,
1844}
1845
1846#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1847pub struct MinMaxFanSpeed {
1848    pub min: u32,
1849    pub max: u32,
1850}
1851
1852#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1853pub struct TemperatureInfo {
1854    pub sensor: TemperatureSensor,
1855    pub temperature: i32,
1856}
1857
1858#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1859pub struct CoolerInfo {
1860    pub index: u32,
1861    pub signal_type: CoolerControl,
1862    pub target: CoolerTarget,
1863}
1864
1865#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1866pub struct GpuInstanceProfileInfo {
1867    pub id: u32,
1868    pub slice_count: u32,
1869    pub instance_count: u32,
1870    pub multiprocessor_count: u32,
1871    pub copy_engine_count: u32,
1872    pub decoder_count: u32,
1873    pub encoder_count: u32,
1874    pub jpeg_count: u32,
1875    pub ofa_count: u32,
1876    pub memory_size_mb: u64,
1877    pub name: String,
1878    pub capabilities: GpuInstanceProfileCapabilities,
1879}
1880
1881/// Information about a GPU instance.
1882#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1883pub struct GpuInstanceInfo {
1884    /// Parent device for the GPU instance.
1885    pub device: Device,
1886    /// GPU instance ID.
1887    pub id: u32,
1888    /// GPU instance profile ID.
1889    pub profile_id: u32,
1890    /// Placement of the GPU instance within the parent device.
1891    pub placement: GpuInstancePlacement,
1892}
1893
1894#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1895pub struct GpuInstancePlacement {
1896    pub start: u32,
1897    pub size: u32,
1898}
1899
1900#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1901pub struct ComputeInstanceProfileInfo {
1902    pub id: u32,
1903    pub slice_count: u32,
1904    pub instance_count: u32,
1905    pub multiprocessor_count: u32,
1906    pub shared_copy_engine_count: u32,
1907    pub shared_decoder_count: u32,
1908    pub shared_encoder_count: u32,
1909    pub shared_jpeg_count: u32,
1910    pub shared_ofa_count: u32,
1911    pub name: String,
1912    pub capabilities: ComputeInstanceProfileCapabilities,
1913}
1914
1915/// Information about a compute instance.
1916#[derive(Debug, Clone, PartialEq, Eq, Hash)]
1917pub struct ComputeInstanceInfo {
1918    /// Parent device for the compute instance.
1919    pub device: Device,
1920    /// Parent GPU instance.
1921    pub gpu_instance: GpuInstance,
1922    /// Compute instance ID.
1923    pub id: u32,
1924    /// Compute instance profile ID.
1925    pub profile_id: u32,
1926    /// Placement of the compute instance within the parent GPU instance.
1927    pub placement: ComputeInstancePlacement,
1928}
1929
1930#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1931pub struct ComputeInstancePlacement {
1932    pub start: u32,
1933    pub size: u32,
1934}
1935
1936#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1937pub struct EncoderSessionInfo {
1938    pub session_id: u32,
1939    pub pid: Pid,
1940    pub vgpu_instance: u32,
1941    pub codec_type: EncoderType,
1942    pub horizontal_resolution: u32,
1943    pub vertical_resolution: u32,
1944    pub average_fps: u32,
1945    pub average_latency_us: u32,
1946}
1947
1948#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1949pub struct FbcStats {
1950    pub session_count: u32,
1951    pub average_fps: u32,
1952    pub average_latency_us: u32,
1953}
1954
1955#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1956pub struct FbcSessionInfo {
1957    pub session_id: u32,
1958    pub pid: Pid,
1959    pub vgpu_instance: u32,
1960    pub display_ordinal: u32,
1961    pub session_type: FbcSessionType,
1962    pub session_flags: u32,
1963    pub max_horizontal_resolution: u32,
1964    pub max_vertical_resolution: u32,
1965    pub horizontal_resolution: u32,
1966    pub vertical_resolution: u32,
1967    pub average_fps: u32,
1968    pub average_latency_us: u32,
1969}
1970
1971#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1972pub struct ProcessInfo {
1973    pub pid: Pid,
1974    pub used_gpu_memory: Option<u64>,
1975    pub gpu_instance_id: u32,
1976    pub compute_instance_id: u32,
1977}
1978
1979#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1980pub struct ProcessUtilizationSample {
1981    pub pid: Pid,
1982    pub timestamp: u64,
1983    pub sm_utilization: u32,
1984    pub memory_utilization: u32,
1985    pub encoder_utilization: u32,
1986    pub decoder_utilization: u32,
1987}
1988
1989#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
1990pub struct ProcessUtilizationInfo {
1991    pub timestamp: u64,
1992    pub pid: Pid,
1993    pub sm_utilization: u32,
1994    pub memory_utilization: u32,
1995    pub encoder_utilization: u32,
1996    pub decoder_utilization: u32,
1997    pub jpg_utilization: u32,
1998    pub ofa_utilization: u32,
1999}
2000
2001impl From<sys::nvmlUtilization_t> for Utilization {
2002    fn from(value: sys::nvmlUtilization_t) -> Self {
2003        Self {
2004            gpu: value.gpu,
2005            memory: value.memory,
2006        }
2007    }
2008}
2009
2010impl From<sys::nvmlMemory_v2_t> for MemoryInfo {
2011    fn from(value: sys::nvmlMemory_v2_t) -> Self {
2012        Self {
2013            total: value.total,
2014            reserved: value.reserved,
2015            free: value.free,
2016            used: value.used,
2017        }
2018    }
2019}
2020
2021impl From<sys::nvmlPciInfo_t> for PciInfo {
2022    fn from(value: sys::nvmlPciInfo_t) -> Self {
2023        Self {
2024            bus_id_legacy: string_from_c_chars(&value.busIdLegacy),
2025            bus_id: string_from_c_chars(&value.busId),
2026            domain: value.domain,
2027            bus: value.bus,
2028            device: value.device,
2029            pci_device_id: value.pciDeviceId,
2030            pci_subsystem_id: value.pciSubSystemId,
2031        }
2032    }
2033}
2034
2035impl From<sys::nvmlPciInfoExt_t> for PciInfoExt {
2036    fn from(value: sys::nvmlPciInfoExt_t) -> Self {
2037        Self {
2038            bus_id: string_from_c_chars(&value.busId),
2039            domain: value.domain,
2040            bus: value.bus,
2041            device: value.device,
2042            pci_device_id: value.pciDeviceId,
2043            pci_subsystem_id: value.pciSubSystemId,
2044            base_class: value.baseClass,
2045            sub_class: value.subClass,
2046        }
2047    }
2048}
2049
2050impl From<sys::nvmlExcludedDeviceInfo_t> for ExcludedDeviceInfo {
2051    fn from(value: sys::nvmlExcludedDeviceInfo_t) -> Self {
2052        Self {
2053            pci_info: value.pciInfo.into(),
2054            uuid: string_from_c_chars(&value.uuid),
2055        }
2056    }
2057}
2058
2059impl From<sys::nvmlHwbcEntry_t> for HwbcEntry {
2060    fn from(value: sys::nvmlHwbcEntry_t) -> Self {
2061        Self {
2062            hwbc_id: value.hwbcId,
2063            firmware_version: string_from_c_chars(&value.firmwareVersion),
2064        }
2065    }
2066}
2067
2068impl From<sys::nvmlGpuInstanceProfileInfo_v3_t> for GpuInstanceProfileInfo {
2069    fn from(value: sys::nvmlGpuInstanceProfileInfo_v3_t) -> Self {
2070        Self {
2071            id: value.id,
2072            slice_count: value.sliceCount,
2073            instance_count: value.instanceCount,
2074            multiprocessor_count: value.multiprocessorCount,
2075            copy_engine_count: value.copyEngineCount,
2076            decoder_count: value.decoderCount,
2077            encoder_count: value.encoderCount,
2078            jpeg_count: value.jpegCount,
2079            ofa_count: value.ofaCount,
2080            memory_size_mb: value.memorySizeMB,
2081            name: string_from_c_chars(&value.name),
2082            capabilities: GpuInstanceProfileCapabilities::from_bits_retain(value.capabilities),
2083        }
2084    }
2085}
2086
2087impl From<sys::nvmlGpuInstanceInfo_t> for GpuInstanceInfo {
2088    fn from(value: sys::nvmlGpuInstanceInfo_t) -> Self {
2089        Self {
2090            device: unsafe { Device::from_raw(value.device) },
2091            id: value.id,
2092            profile_id: value.profileId,
2093            placement: value.placement.into(),
2094        }
2095    }
2096}
2097
2098impl From<sys::nvmlGpuInstancePlacement_t> for GpuInstancePlacement {
2099    fn from(value: sys::nvmlGpuInstancePlacement_t) -> Self {
2100        Self {
2101            start: value.start,
2102            size: value.size,
2103        }
2104    }
2105}
2106
2107impl From<GpuInstancePlacement> for sys::nvmlGpuInstancePlacement_t {
2108    fn from(value: GpuInstancePlacement) -> Self {
2109        Self {
2110            start: value.start,
2111            size: value.size,
2112        }
2113    }
2114}
2115
2116impl From<sys::nvmlComputeInstanceProfileInfo_v3_t> for ComputeInstanceProfileInfo {
2117    fn from(value: sys::nvmlComputeInstanceProfileInfo_v3_t) -> Self {
2118        Self {
2119            id: value.id,
2120            slice_count: value.sliceCount,
2121            instance_count: value.instanceCount,
2122            multiprocessor_count: value.multiprocessorCount,
2123            shared_copy_engine_count: value.sharedCopyEngineCount,
2124            shared_decoder_count: value.sharedDecoderCount,
2125            shared_encoder_count: value.sharedEncoderCount,
2126            shared_jpeg_count: value.sharedJpegCount,
2127            shared_ofa_count: value.sharedOfaCount,
2128            name: string_from_c_chars(&value.name),
2129            capabilities: ComputeInstanceProfileCapabilities::from_bits_retain(value.capabilities),
2130        }
2131    }
2132}
2133
2134impl From<sys::nvmlComputeInstanceInfo_t> for ComputeInstanceInfo {
2135    fn from(value: sys::nvmlComputeInstanceInfo_t) -> Self {
2136        Self {
2137            device: unsafe { Device::from_raw(value.device) },
2138            gpu_instance: unsafe { GpuInstance::from_raw(value.gpuInstance) },
2139            id: value.id,
2140            profile_id: value.profileId,
2141            placement: value.placement.into(),
2142        }
2143    }
2144}
2145
2146impl From<sys::nvmlComputeInstancePlacement_t> for ComputeInstancePlacement {
2147    fn from(value: sys::nvmlComputeInstancePlacement_t) -> Self {
2148        Self {
2149            start: value.start,
2150            size: value.size,
2151        }
2152    }
2153}
2154
2155impl From<ComputeInstancePlacement> for sys::nvmlComputeInstancePlacement_t {
2156    fn from(value: ComputeInstancePlacement) -> Self {
2157        Self {
2158            start: value.start,
2159            size: value.size,
2160        }
2161    }
2162}
2163
2164impl From<sys::nvmlVgpuPlacementId_t> for VgpuPlacementId {
2165    fn from(value: sys::nvmlVgpuPlacementId_t) -> Self {
2166        Self(value.placementId)
2167    }
2168}
2169
2170impl From<sys::nvmlVgpuVersion_t> for VgpuVersion {
2171    fn from(value: sys::nvmlVgpuVersion_t) -> Self {
2172        Self {
2173            min: value.minVersion,
2174            max: value.maxVersion,
2175        }
2176    }
2177}
2178
2179impl From<VgpuVersion> for sys::nvmlVgpuVersion_t {
2180    fn from(value: VgpuVersion) -> Self {
2181        Self {
2182            minVersion: value.min,
2183            maxVersion: value.max,
2184        }
2185    }
2186}
2187
2188impl From<sys::nvmlVgpuPgpuCompatibility_t> for VgpuCompatibility {
2189    fn from(value: sys::nvmlVgpuPgpuCompatibility_t) -> Self {
2190        Self {
2191            vm_compatibility: VgpuVmCompatibility::from_bits_retain(
2192                value.vgpuVmCompatibility as u32,
2193            ),
2194            limit_code: VgpuPgpuCompatibilityLimitCode::from_bits_retain(
2195                value.compatibilityLimitCode as u32,
2196            ),
2197        }
2198    }
2199}
2200
2201impl VgpuMetadata {
2202    pub(crate) fn from_raw(raw: &sys::nvmlVgpuMetadata_t, opaque_data: Vec<u8>) -> Self {
2203        Self {
2204            version: raw.version,
2205            revision: raw.revision,
2206            guest_info_state: raw.guestInfoState.into(),
2207            guest_driver_version: string_from_c_chars(&raw.guestDriverVersion),
2208            host_driver_version: string_from_c_chars(&raw.hostDriverVersion),
2209            virtualization_caps: raw.vgpuVirtualizationCaps,
2210            guest_vgpu_version: raw.guestVgpuVersion,
2211            opaque_data,
2212        }
2213    }
2214
2215    pub(crate) fn encode_raw(&self) -> Vec<u8> {
2216        let opaque_offset = mem::offset_of!(sys::nvmlVgpuMetadata_t, opaqueData);
2217        let len = max(
2218            size_of::<sys::nvmlVgpuMetadata_t>(),
2219            opaque_offset.saturating_add(self.opaque_data.len()),
2220        );
2221        let mut raw = vec![0u8; len];
2222        let metadata = unsafe { &mut *raw.as_mut_ptr().cast::<sys::nvmlVgpuMetadata_t>() };
2223        metadata.version = self.version;
2224        metadata.revision = self.revision;
2225        metadata.guestInfoState = self.guest_info_state.into();
2226        metadata.vgpuVirtualizationCaps = self.virtualization_caps;
2227        metadata.guestVgpuVersion = self.guest_vgpu_version;
2228        metadata.opaqueDataSize = self.opaque_data.len() as u32;
2229
2230        copy_string_to_c_chars(&mut metadata.guestDriverVersion, &self.guest_driver_version);
2231        copy_string_to_c_chars(&mut metadata.hostDriverVersion, &self.host_driver_version);
2232        raw[opaque_offset..opaque_offset + self.opaque_data.len()]
2233            .copy_from_slice(&self.opaque_data);
2234        raw
2235    }
2236}
2237
2238impl PgpuMetadata {
2239    pub(crate) fn from_raw(raw: &sys::nvmlVgpuPgpuMetadata_t, opaque_data: Vec<u8>) -> Self {
2240        Self {
2241            version: raw.version,
2242            revision: raw.revision,
2243            host_driver_version: string_from_c_chars(&raw.hostDriverVersion),
2244            virtualization_caps: raw.pgpuVirtualizationCaps,
2245            host_supported_vgpu_range: raw.hostSupportedVgpuRange.into(),
2246            opaque_data,
2247        }
2248    }
2249
2250    pub(crate) fn encode_raw(&self) -> Vec<u8> {
2251        let opaque_offset = mem::offset_of!(sys::nvmlVgpuPgpuMetadata_t, opaqueData);
2252        let len = max(
2253            size_of::<sys::nvmlVgpuPgpuMetadata_t>(),
2254            opaque_offset.saturating_add(self.opaque_data.len()),
2255        );
2256        let mut raw = vec![0u8; len];
2257        let metadata = unsafe { &mut *raw.as_mut_ptr().cast::<sys::nvmlVgpuPgpuMetadata_t>() };
2258        metadata.version = self.version;
2259        metadata.revision = self.revision;
2260        metadata.pgpuVirtualizationCaps = self.virtualization_caps;
2261        metadata.hostSupportedVgpuRange = self.host_supported_vgpu_range.into();
2262        metadata.opaqueDataSize = self.opaque_data.len() as u32;
2263
2264        copy_string_to_c_chars(&mut metadata.hostDriverVersion, &self.host_driver_version);
2265        raw[opaque_offset..opaque_offset + self.opaque_data.len()]
2266            .copy_from_slice(&self.opaque_data);
2267        raw
2268    }
2269}
2270
2271impl From<sys::nvmlVgpuSchedulerLogEntry_t> for VgpuSchedulerLogEntry {
2272    fn from(value: sys::nvmlVgpuSchedulerLogEntry_t) -> Self {
2273        Self {
2274            timestamp: value.timestamp,
2275            time_run_total: value.timeRunTotal,
2276            time_run: value.timeRun,
2277            sw_runlist_id: value.swRunlistId,
2278            target_time_slice: value.targetTimeSlice,
2279            cumulative_preemption_time: value.cumulativePreemptionTime,
2280        }
2281    }
2282}
2283
2284impl From<sys::nvmlVgpuSchedulerLogEntry_v2_t> for VgpuSchedulerLogEntry {
2285    fn from(value: sys::nvmlVgpuSchedulerLogEntry_v2_t) -> Self {
2286        Self {
2287            timestamp: value.timestamp,
2288            time_run_total: value.timeRunTotal,
2289            time_run: value.timeRun,
2290            sw_runlist_id: value.swRunlistId,
2291            target_time_slice: value.targetTimeSlice,
2292            cumulative_preemption_time: value.cumulativePreemptionTime,
2293        }
2294    }
2295}
2296
2297impl From<sys::nvmlVgpuLicenseExpiry_t> for VgpuLicenseExpiry {
2298    fn from(value: sys::nvmlVgpuLicenseExpiry_t) -> Self {
2299        Self {
2300            year: value.year,
2301            month: value.month,
2302            day: value.day,
2303            hour: value.hour,
2304            minute: value.min,
2305            second: value.sec,
2306            status: value.status,
2307        }
2308    }
2309}
2310
2311impl From<sys::nvmlVgpuLicenseInfo_t> for VgpuLicenseInfo {
2312    fn from(value: sys::nvmlVgpuLicenseInfo_t) -> Self {
2313        Self {
2314            is_licensed: value.isLicensed != 0,
2315            expiry: value.licenseExpiry.into(),
2316            current_state: value.currentState,
2317        }
2318    }
2319}
2320
2321impl From<sys::nvmlVgpuRuntimeState_t> for VgpuRuntimeState {
2322    fn from(value: sys::nvmlVgpuRuntimeState_t) -> Self {
2323        Self { size: value.size }
2324    }
2325}
2326
2327impl VgpuSchedulerState {
2328    pub(crate) fn from_raw(engine: sys::nvmlVgpuSchedulerStateInfo_v2_t) -> Result<Self> {
2329        let avg_factor = (engine.avgFactor != 0).then_some(engine.avgFactor);
2330        let arr_mode = if avg_factor.is_some() {
2331            VgpuSchedulerArrMode::Enabled
2332        } else {
2333            VgpuSchedulerArrMode::Default
2334        };
2335
2336        Ok(Self {
2337            engine: try_from_nvml_enum("vgpu scheduler engine", engine.engineId)?,
2338            policy: try_from_nvml_enum("vgpu scheduler policy", engine.schedulerPolicy)?,
2339            arr_mode,
2340            params: VgpuSchedulerParams {
2341                timeslice: engine.timeslice,
2342                avg_factor,
2343            },
2344        })
2345    }
2346}
2347
2348impl VgpuSchedulerLog {
2349    pub(crate) fn from_raw(info: sys::nvmlVgpuSchedulerLogInfo_v2_t) -> Result<Self> {
2350        let avg_factor = (info.avgFactor != 0).then_some(info.avgFactor);
2351        let arr_mode = if avg_factor.is_some() {
2352            VgpuSchedulerArrMode::Enabled
2353        } else {
2354            VgpuSchedulerArrMode::Default
2355        };
2356
2357        let entries = info.logEntries[..info.entriesCount as usize]
2358            .iter()
2359            .copied()
2360            .map(Into::into)
2361            .collect();
2362
2363        Ok(Self {
2364            state: VgpuSchedulerState {
2365                engine: try_from_nvml_enum("vgpu scheduler engine", info.engineId)?,
2366                policy: try_from_nvml_enum("vgpu scheduler policy", info.schedulerPolicy)?,
2367                arr_mode,
2368                params: VgpuSchedulerParams {
2369                    timeslice: info.timeslice,
2370                    avg_factor,
2371                },
2372            },
2373            entries,
2374        })
2375    }
2376}
2377
2378impl From<sys::nvmlLedState_t> for LedState {
2379    fn from(value: sys::nvmlLedState_t) -> Self {
2380        Self {
2381            cause: string_from_c_chars(&value.cause),
2382            color: value.color.into(),
2383        }
2384    }
2385}
2386
2387impl From<sys::nvmlUnitInfo_t> for UnitInfo {
2388    fn from(value: sys::nvmlUnitInfo_t) -> Self {
2389        Self {
2390            name: string_from_c_chars(&value.name),
2391            id: string_from_c_chars(&value.id),
2392            serial: string_from_c_chars(&value.serial),
2393            firmware_version: string_from_c_chars(&value.firmwareVersion),
2394        }
2395    }
2396}
2397
2398impl From<sys::nvmlPSUInfo_t> for PsuInfo {
2399    fn from(value: sys::nvmlPSUInfo_t) -> Self {
2400        Self {
2401            state: string_from_c_chars(&value.state),
2402            current: value.current,
2403            voltage: value.voltage,
2404            power: value.power,
2405        }
2406    }
2407}
2408
2409impl From<sys::nvmlGpmSupport_t> for GpmSupport {
2410    fn from(value: sys::nvmlGpmSupport_t) -> Self {
2411        Self {
2412            is_supported_device: value.isSupportedDevice != 0,
2413        }
2414    }
2415}
2416
2417impl From<sys::nvmlGpmMetric_t> for GpmMetric {
2418    fn from(value: sys::nvmlGpmMetric_t) -> Self {
2419        let result = if value.nvmlReturn == sys::nvmlReturn_t::NVML_SUCCESS {
2420            Ok(value.value)
2421        } else {
2422            Err(value.nvmlReturn.into())
2423        };
2424
2425        Self {
2426            metric_id: GpmMetricId(value.metricId),
2427            result,
2428            short_name: unsafe { string_from_c_ptr(value.metricInfo.shortName) },
2429            long_name: unsafe { string_from_c_ptr(value.metricInfo.longName) },
2430            unit: unsafe { string_from_c_ptr(value.metricInfo.unit) },
2431        }
2432    }
2433}
2434
2435impl From<sys::nvmlBAR1Memory_t> for Bar1MemoryInfo {
2436    fn from(value: sys::nvmlBAR1Memory_t) -> Self {
2437        Self {
2438            total: value.bar1Total,
2439            free: value.bar1Free,
2440            used: value.bar1Used,
2441        }
2442    }
2443}
2444
2445impl From<sys::nvmlEccErrorCounts_t> for EccErrorCounts {
2446    fn from(value: sys::nvmlEccErrorCounts_t) -> Self {
2447        Self {
2448            l1_cache: value.l1Cache,
2449            l2_cache: value.l2Cache,
2450            device_memory: value.deviceMemory,
2451            register_file: value.registerFile,
2452        }
2453    }
2454}
2455
2456impl From<sys::nvmlViolationTime_t> for ViolationTime {
2457    fn from(value: sys::nvmlViolationTime_t) -> Self {
2458        Self {
2459            reference_time: value.referenceTime,
2460            violation_time: value.violationTime,
2461        }
2462    }
2463}
2464
2465impl From<sys::nvmlRowRemapperHistogramValues_t> for RowRemapperHistogram {
2466    fn from(value: sys::nvmlRowRemapperHistogramValues_t) -> Self {
2467        Self {
2468            max: value.max,
2469            high: value.high,
2470            partial: value.partial,
2471            low: value.low,
2472            none: value.none,
2473        }
2474    }
2475}
2476
2477impl From<sys::nvmlAccountingStats_t> for AccountingStats {
2478    fn from(value: sys::nvmlAccountingStats_t) -> Self {
2479        Self {
2480            gpu_utilization: value.gpuUtilization,
2481            memory_utilization: value.memoryUtilization,
2482            max_memory_usage: value.maxMemoryUsage,
2483            time: value.time,
2484            start_time: value.startTime,
2485            is_running: value.isRunning != 0,
2486        }
2487    }
2488}
2489
2490impl From<sys::nvmlDeviceCurrentClockFreqs_t> for CurrentClockFreqs {
2491    fn from(value: sys::nvmlDeviceCurrentClockFreqs_t) -> Self {
2492        Self {
2493            value: string_from_c_chars(&value.str_),
2494        }
2495    }
2496}
2497
2498impl From<sys::nvmlDevicePerfModes_t> for PerformanceModes {
2499    fn from(value: sys::nvmlDevicePerfModes_t) -> Self {
2500        Self {
2501            value: string_from_c_chars(&value.str_),
2502        }
2503    }
2504}
2505
2506impl From<sys::nvmlMarginTemperature_t> for MarginTemperature {
2507    fn from(value: sys::nvmlMarginTemperature_t) -> Self {
2508        Self {
2509            value: value.marginTemperature,
2510        }
2511    }
2512}
2513
2514impl From<sys::nvmlDeviceAttributes_t> for DeviceAttributes {
2515    fn from(value: sys::nvmlDeviceAttributes_t) -> Self {
2516        Self {
2517            multiprocessor_count: value.multiprocessorCount,
2518            shared_copy_engine_count: value.sharedCopyEngineCount,
2519            shared_decoder_count: value.sharedDecoderCount,
2520            shared_encoder_count: value.sharedEncoderCount,
2521            shared_jpeg_count: value.sharedJpegCount,
2522            shared_ofa_count: value.sharedOfaCount,
2523            gpu_instance_slice_count: value.gpuInstanceSliceCount,
2524            compute_instance_slice_count: value.computeInstanceSliceCount,
2525            memory_size_mb: value.memorySizeMB,
2526        }
2527    }
2528}
2529
2530impl From<sys::nvmlPlatformInfo_t> for PlatformInfo {
2531    fn from(value: sys::nvmlPlatformInfo_t) -> Self {
2532        Self {
2533            ib_guid: value.ibGuid,
2534            chassis_serial_number: value.chassisSerialNumber,
2535            slot_number: value.slotNumber,
2536            tray_index: value.trayIndex,
2537            host_id: value.hostId,
2538            peer_type: value.peerType,
2539            module_id: value.moduleId,
2540        }
2541    }
2542}
2543
2544impl From<sys::nvmlPdi_t> for Pdi {
2545    fn from(value: sys::nvmlPdi_t) -> Self {
2546        Self { value: value.value }
2547    }
2548}
2549
2550impl From<sys::nvmlBridgeChipInfo_t> for BridgeChipInfo {
2551    fn from(value: sys::nvmlBridgeChipInfo_t) -> Self {
2552        Self {
2553            kind: value.type_.into(),
2554            firmware_version: value.fwVersion,
2555        }
2556    }
2557}
2558
2559impl From<sys::nvmlBridgeChipHierarchy_t> for BridgeChipHierarchy {
2560    fn from(value: sys::nvmlBridgeChipHierarchy_t) -> Self {
2561        Self {
2562            bridge_chips: value.bridgeChipInfo[..value.bridgeCount as usize]
2563                .iter()
2564                .copied()
2565                .map(Into::into)
2566                .collect(),
2567        }
2568    }
2569}
2570
2571impl From<sys::nvmlRepairStatus_t> for RepairStatus {
2572    fn from(value: sys::nvmlRepairStatus_t) -> Self {
2573        Self {
2574            channel_repair_pending: value.bChannelRepairPending != 0,
2575            tpc_repair_pending: value.bTpcRepairPending != 0,
2576        }
2577    }
2578}
2579
2580impl From<sys::nvmlC2cModeInfo_v1_t> for C2cModeInfo {
2581    fn from(value: sys::nvmlC2cModeInfo_v1_t) -> Self {
2582        Self {
2583            enabled: value.isC2cEnabled != 0,
2584        }
2585    }
2586}
2587
2588impl From<sys::nvmlClkMonFaultInfo_t> for ClkMonFaultInfo {
2589    fn from(value: sys::nvmlClkMonFaultInfo_t) -> Self {
2590        Self {
2591            clock_api_domain: value.clkApiDomain,
2592            clock_domain_fault_mask: value.clkDomainFaultMask,
2593        }
2594    }
2595}
2596
2597impl From<sys::nvmlClkMonStatus_t> for ClkMonStatus {
2598    fn from(value: sys::nvmlClkMonStatus_t) -> Self {
2599        Self {
2600            global_status: value.bGlobalStatus != 0,
2601            faults: value.clkMonList[..value.clkMonListSize as usize]
2602                .iter()
2603                .copied()
2604                .map(Into::into)
2605                .collect(),
2606        }
2607    }
2608}
2609
2610impl From<sys::nvmlEccSramErrorStatus_t> for EccSramErrorStatus {
2611    fn from(value: sys::nvmlEccSramErrorStatus_t) -> Self {
2612        Self {
2613            aggregate_unc_parity: value.aggregateUncParity,
2614            aggregate_unc_secded: value.aggregateUncSecDed,
2615            aggregate_corrected: value.aggregateCor,
2616            volatile_unc_parity: value.volatileUncParity,
2617            volatile_unc_secded: value.volatileUncSecDed,
2618            volatile_corrected: value.volatileCor,
2619            aggregate_unc_bucket_l2: value.aggregateUncBucketL2,
2620            aggregate_unc_bucket_sm: value.aggregateUncBucketSm,
2621            aggregate_unc_bucket_pcie: value.aggregateUncBucketPcie,
2622            aggregate_unc_bucket_mcu: value.aggregateUncBucketMcu,
2623            aggregate_unc_bucket_other: value.aggregateUncBucketOther,
2624            threshold_exceeded: value.bThresholdExceeded != 0,
2625        }
2626    }
2627}
2628
2629impl From<sys::nvmlEccSramUniqueUncorrectedErrorEntry_v1_t> for EccSramUniqueUncorrectedErrorEntry {
2630    fn from(value: sys::nvmlEccSramUniqueUncorrectedErrorEntry_v1_t) -> Self {
2631        Self {
2632            unit: value.unit,
2633            location: value.location,
2634            sublocation: value.sublocation,
2635            extlocation: value.extlocation,
2636            address: value.address,
2637            is_parity: value.isParity != 0,
2638            count: value.count,
2639        }
2640    }
2641}
2642
2643impl From<sys::nvmlGpuThermalSettings_t__bindgen_ty_1> for ThermalSensorSetting {
2644    fn from(value: sys::nvmlGpuThermalSettings_t__bindgen_ty_1) -> Self {
2645        Self {
2646            controller: value.controller.into(),
2647            default_min_temp: value.defaultMinTemp,
2648            default_max_temp: value.defaultMaxTemp,
2649            current_temp: value.currentTemp,
2650            target: value.target.into(),
2651        }
2652    }
2653}
2654
2655impl From<sys::nvmlGpuThermalSettings_t> for ThermalSettings {
2656    fn from(value: sys::nvmlGpuThermalSettings_t) -> Self {
2657        Self {
2658            sensors: value.sensor[..value.count as usize]
2659                .iter()
2660                .copied()
2661                .map(Into::into)
2662                .collect(),
2663        }
2664    }
2665}
2666
2667impl From<sys::nvmlClockOffset_t> for ClockOffset {
2668    fn from(value: sys::nvmlClockOffset_t) -> Self {
2669        Self {
2670            kind: value.type_.into(),
2671            pstate: value.pstate.into(),
2672            clock_offset_mhz: value.clockOffsetMHz,
2673            min_clock_offset_mhz: value.minClockOffsetMHz,
2674            max_clock_offset_mhz: value.maxClockOffsetMHz,
2675        }
2676    }
2677}
2678
2679impl From<sys::nvmlNvLinkUtilizationControl_t> for NvLinkUtilizationControl {
2680    fn from(value: sys::nvmlNvLinkUtilizationControl_t) -> Self {
2681        Self {
2682            units: value.units.into(),
2683            packet_filter: NvLinkPacketTypes::from_bits_retain(value.pktfilter as u32),
2684        }
2685    }
2686}
2687
2688impl From<sys::nvmlNvlinkFirmwareVersion_t> for NvLinkFirmwareVersion {
2689    fn from(value: sys::nvmlNvlinkFirmwareVersion_t) -> Self {
2690        Self {
2691            ucode_type: value.ucodeType,
2692            major: value.major,
2693            minor: value.minor,
2694            sub_minor: value.subMinor,
2695        }
2696    }
2697}
2698
2699impl From<sys::nvmlNvLinkInfo_t> for NvLinkInfo {
2700    fn from(value: sys::nvmlNvLinkInfo_t) -> Self {
2701        Self {
2702            nvle_enabled: value.isNvleEnabled != 0,
2703            firmware_versions: value.firmwareInfo.firmwareVersion
2704                [..value.firmwareInfo.numValidEntries as usize]
2705                .iter()
2706                .copied()
2707                .map(Into::into)
2708                .collect(),
2709        }
2710    }
2711}
2712
2713impl From<sys::nvmlNvlinkGetBwMode_t> for NvLinkBwMode {
2714    fn from(value: sys::nvmlNvlinkGetBwMode_t) -> Self {
2715        Self {
2716            is_best: value.bIsBest != 0,
2717            mode: value.bwMode,
2718        }
2719    }
2720}
2721
2722impl From<sys::nvmlNvlinkSupportedBwModes_t> for NvLinkSupportedBwModes {
2723    fn from(value: sys::nvmlNvlinkSupportedBwModes_t) -> Self {
2724        Self {
2725            modes: value.bwModes[..value.totalBwModes as usize].to_vec(),
2726        }
2727    }
2728}
2729
2730impl From<sys::nvmlDevicePowerMizerModes_v1_t> for PowerMizerModes {
2731    fn from(value: sys::nvmlDevicePowerMizerModes_v1_t) -> Self {
2732        Self {
2733            current_mode: value.currentMode,
2734            mode: value.mode,
2735            supported_modes: value.supportedPowerMizerModes,
2736        }
2737    }
2738}
2739
2740impl From<sys::nvmlWorkloadPowerProfileInfo_t> for WorkloadPowerProfileInfo {
2741    fn from(value: sys::nvmlWorkloadPowerProfileInfo_t) -> Self {
2742        Self {
2743            profile_id: value.profileId,
2744            priority: value.priority,
2745            conflicting_profiles: mask255_bits(value.conflictingMask),
2746        }
2747    }
2748}
2749
2750impl From<sys::nvmlWorkloadPowerProfileProfilesInfo_t> for WorkloadPowerProfilesInfo {
2751    fn from(value: sys::nvmlWorkloadPowerProfileProfilesInfo_t) -> Self {
2752        Self {
2753            supported_profiles: mask255_bits(value.perfProfilesMask),
2754            profiles: value.perfProfile.into_iter().map(Into::into).collect(),
2755        }
2756    }
2757}
2758
2759impl From<sys::nvmlWorkloadPowerProfileCurrentProfiles_t> for WorkloadPowerCurrentProfiles {
2760    fn from(value: sys::nvmlWorkloadPowerProfileCurrentProfiles_t) -> Self {
2761        Self {
2762            supported_profiles: mask255_bits(value.perfProfilesMask),
2763            requested_profiles: mask255_bits(value.requestedProfilesMask),
2764            enforced_profiles: mask255_bits(value.enforcedProfilesMask),
2765        }
2766    }
2767}
2768
2769impl From<sys::nvmlDramEncryptionInfo_t> for DramEncryptionInfo {
2770    fn from(value: sys::nvmlDramEncryptionInfo_t) -> Self {
2771        Self {
2772            encryption_state: value.encryptionState.into(),
2773        }
2774    }
2775}
2776
2777impl From<sys::nvmlVgpuTypeBar1Info_t> for VgpuTypeBar1Info {
2778    fn from(value: sys::nvmlVgpuTypeBar1Info_t) -> Self {
2779        Self {
2780            bar1_size: value.bar1Size,
2781        }
2782    }
2783}
2784
2785impl From<sys::nvmlConfComputeSystemCaps_t> for ConfComputeSystemCaps {
2786    fn from(value: sys::nvmlConfComputeSystemCaps_t) -> Self {
2787        Self {
2788            cpu_caps: value.cpuCaps,
2789            gpus_caps: value.gpusCaps,
2790        }
2791    }
2792}
2793
2794impl From<sys::nvmlConfComputeSystemState_t> for ConfComputeSystemState {
2795    fn from(value: sys::nvmlConfComputeSystemState_t) -> Self {
2796        Self {
2797            environment: value.environment,
2798            cc_feature: value.ccFeature,
2799            dev_tools_mode: value.devToolsMode,
2800        }
2801    }
2802}
2803
2804impl From<sys::nvmlSystemConfComputeSettings_t> for ConfComputeSystemSettings {
2805    fn from(value: sys::nvmlSystemConfComputeSettings_t) -> Self {
2806        Self {
2807            environment: value.environment,
2808            cc_feature: value.ccFeature,
2809            dev_tools_mode: value.devToolsMode,
2810            multi_gpu_mode: value.multiGpuMode,
2811        }
2812    }
2813}
2814
2815impl From<sys::nvmlConfComputeMemSizeInfo_t> for ConfComputeMemSizeInfo {
2816    fn from(value: sys::nvmlConfComputeMemSizeInfo_t) -> Self {
2817        Self {
2818            protected_mem_size_kib: value.protectedMemSizeKib,
2819            unprotected_mem_size_kib: value.unprotectedMemSizeKib,
2820        }
2821    }
2822}
2823
2824impl From<sys::nvmlConfComputeGpuCertificate_t> for ConfComputeGpuCertificate {
2825    fn from(value: sys::nvmlConfComputeGpuCertificate_t) -> Self {
2826        Self {
2827            cert_chain: value.certChain[..value.certChainSize as usize].to_vec(),
2828            attestation_cert_chain: value.attestationCertChain
2829                [..value.attestationCertChainSize as usize]
2830                .to_vec(),
2831        }
2832    }
2833}
2834
2835impl From<sys::nvmlConfComputeGpuAttestationReport_t> for ConfComputeGpuAttestationReport {
2836    fn from(value: sys::nvmlConfComputeGpuAttestationReport_t) -> Self {
2837        Self {
2838            cec_attestation_report_present: value.isCecAttestationReportPresent != 0,
2839            nonce: value.nonce,
2840            attestation_report: value.attestationReport[..value.attestationReportSize as usize]
2841                .to_vec(),
2842            cec_attestation_report: value.cecAttestationReport
2843                [..value.cecAttestationReportSize as usize]
2844                .to_vec(),
2845        }
2846    }
2847}
2848
2849impl From<sys::nvmlConfComputeGetKeyRotationThresholdInfo_t> for ConfComputeKeyRotationThreshold {
2850    fn from(value: sys::nvmlConfComputeGetKeyRotationThresholdInfo_t) -> Self {
2851        Self {
2852            attacker_advantage: value.attackerAdvantage,
2853        }
2854    }
2855}
2856
2857impl GpuFabricInfo {
2858    pub(crate) fn from_raw(value: sys::nvmlGpuFabricInfoV_t) -> Result<Self> {
2859        Ok(Self {
2860            cluster_uuid: value.clusterUuid,
2861            status_code: value.status as u32,
2862            clique_id: value.cliqueId,
2863            state: try_from_nvml_enum("gpu fabric state", value.state as u32)?,
2864            health: GpuFabricHealth::from_raw(value.healthMask)?,
2865            health_summary: try_from_nvml_enum(
2866                "gpu fabric health summary",
2867                value.healthSummary as u32,
2868            )?,
2869        })
2870    }
2871}
2872
2873impl From<sys::nvmlGpuDynamicPstatesInfo_t> for DynamicPstatesInfo {
2874    fn from(value: sys::nvmlGpuDynamicPstatesInfo_t) -> Self {
2875        Self {
2876            flags: value.flags,
2877            utilization: value
2878                .utilization
2879                .into_iter()
2880                .enumerate()
2881                .filter(|(_, entry)| entry.bIsPresent != 0)
2882                .map(|(domain, entry)| DynamicPstateInfo {
2883                    domain: domain as u32,
2884                    percentage: entry.percentage,
2885                    increase_threshold: entry.incThreshold,
2886                    decrease_threshold: entry.decThreshold,
2887                })
2888                .collect(),
2889        }
2890    }
2891}
2892
2893impl GpuFabricHealth {
2894    fn from_raw(raw_mask: u32) -> Result<Self> {
2895        Ok(Self {
2896            degraded_bandwidth: decode_fabric_boolean_health(
2897                raw_mask,
2898                sys::NVML_GPU_FABRIC_HEALTH_MASK_SHIFT_DEGRADED_BW,
2899                sys::NVML_GPU_FABRIC_HEALTH_MASK_WIDTH_DEGRADED_BW,
2900            )?,
2901            route_recovery: decode_fabric_boolean_health(
2902                raw_mask,
2903                sys::NVML_GPU_FABRIC_HEALTH_MASK_SHIFT_ROUTE_RECOVERY,
2904                sys::NVML_GPU_FABRIC_HEALTH_MASK_WIDTH_ROUTE_RECOVERY,
2905            )?,
2906            route_unhealthy: decode_fabric_boolean_health(
2907                raw_mask,
2908                sys::NVML_GPU_FABRIC_HEALTH_MASK_SHIFT_ROUTE_UNHEALTHY,
2909                sys::NVML_GPU_FABRIC_HEALTH_MASK_WIDTH_ROUTE_UNHEALTHY,
2910            )?,
2911            access_timeout_recovery: decode_fabric_boolean_health(
2912                raw_mask,
2913                sys::NVML_GPU_FABRIC_HEALTH_MASK_SHIFT_ACCESS_TIMEOUT_RECOVERY,
2914                sys::NVML_GPU_FABRIC_HEALTH_MASK_WIDTH_ACCESS_TIMEOUT_RECOVERY,
2915            )?,
2916            incorrect_configuration: try_from_nvml_enum(
2917                "gpu fabric incorrect configuration",
2918                (raw_mask >> sys::NVML_GPU_FABRIC_HEALTH_MASK_SHIFT_INCORRECT_CONFIGURATION)
2919                    & sys::NVML_GPU_FABRIC_HEALTH_MASK_WIDTH_INCORRECT_CONFIGURATION,
2920            )?,
2921            raw_mask,
2922        })
2923    }
2924}
2925
2926fn decode_fabric_boolean_health(
2927    raw_mask: u32,
2928    shift: u32,
2929    width: u32,
2930) -> Result<GpuFabricBooleanState> {
2931    try_from_nvml_enum("gpu fabric boolean state", (raw_mask >> shift) & width)
2932}
2933
2934impl FieldValue {
2935    pub fn from_raw(value_type: sys::nvmlValueType_t, value: sys::nvmlValue_t) -> Result<Self> {
2936        Ok(match FieldValueType::try_from(u32::from(value_type)) {
2937            Ok(FieldValueType::Double) => Self::Double(unsafe { value.dVal }),
2938            Ok(FieldValueType::UnsignedInt) => Self::UnsignedInt(unsafe { value.uiVal }),
2939            Ok(FieldValueType::UnsignedLong) => Self::UnsignedLong(unsafe { value.ulVal }),
2940            Ok(FieldValueType::UnsignedLongLong) => Self::UnsignedLongLong(unsafe { value.ullVal }),
2941            Ok(FieldValueType::SignedLongLong) => Self::SignedLongLong(unsafe { value.sllVal }),
2942            Ok(FieldValueType::SignedInt) => Self::SignedInt(unsafe { value.siVal }),
2943            Ok(FieldValueType::UnsignedShort) => Self::UnsignedShort(unsafe { value.usVal }),
2944            Err(_) => return Err(Error::UnknownFieldValueType(u32::from(value_type))),
2945        })
2946    }
2947}
2948
2949impl Sample {
2950    pub fn from_raw(value_type: sys::nvmlValueType_t, sample: sys::nvmlSample_t) -> Result<Self> {
2951        Ok(Self {
2952            timestamp: sample.timeStamp,
2953            value: FieldValue::from_raw(value_type, sample.sampleValue)?,
2954        })
2955    }
2956}
2957
2958impl FieldSample {
2959    pub fn from_raw(value: sys::nvmlFieldValue_t) -> Self {
2960        let result = if value.nvmlReturn == sys::nvmlReturn_t::NVML_SUCCESS {
2961            FieldValue::from_raw(value.valueType, value.value)
2962        } else {
2963            Err(value.nvmlReturn.into())
2964        };
2965
2966        Self {
2967            field: FieldId(value.fieldId),
2968            scope_id: value.scopeId,
2969            timestamp: value.timestamp,
2970            latency_usec: value.latencyUsec,
2971            result,
2972        }
2973    }
2974}
2975
2976impl From<sys::nvmlEventData_t> for EventData {
2977    fn from(value: sys::nvmlEventData_t) -> Self {
2978        Self {
2979            device: (!value.device.is_null()).then_some(unsafe { Device::from_raw(value.device) }),
2980            event_types: EventTypes::from_bits_retain(value.eventType),
2981            event_data: value.eventData,
2982            gpu_instance_id: value.gpuInstanceId,
2983            compute_instance_id: value.computeInstanceId,
2984        }
2985    }
2986}
2987
2988impl From<sys::nvmlSystemEventData_v1_t> for SystemEventData {
2989    fn from(value: sys::nvmlSystemEventData_v1_t) -> Self {
2990        Self {
2991            event_types: SystemEventTypes::from_bits_retain(value.eventType),
2992            gpu_id: value.gpuId,
2993        }
2994    }
2995}
2996
2997impl From<sys::nvmlProcessInfo_t> for ProcessInfo {
2998    fn from(value: sys::nvmlProcessInfo_t) -> Self {
2999        Self {
3000            pid: Pid(value.pid),
3001            used_gpu_memory: option_u64_from_not_available(value.usedGpuMemory),
3002            gpu_instance_id: value.gpuInstanceId,
3003            compute_instance_id: value.computeInstanceId,
3004        }
3005    }
3006}
3007
3008impl From<sys::nvmlProcessDetail_v1_t> for ProcessDetail {
3009    fn from(value: sys::nvmlProcessDetail_v1_t) -> Self {
3010        Self {
3011            pid: Pid(value.pid),
3012            used_gpu_memory: option_u64_from_not_available(value.usedGpuMemory),
3013            gpu_instance_id: value.gpuInstanceId,
3014            compute_instance_id: value.computeInstanceId,
3015            used_gpu_cc_protected_memory: option_u64_from_not_available(
3016                value.usedGpuCcProtectedMemory,
3017            ),
3018        }
3019    }
3020}
3021
3022impl From<sys::nvmlProcessUtilizationSample_t> for ProcessUtilizationSample {
3023    fn from(value: sys::nvmlProcessUtilizationSample_t) -> Self {
3024        Self {
3025            pid: Pid(value.pid),
3026            timestamp: value.timeStamp,
3027            sm_utilization: value.smUtil,
3028            memory_utilization: value.memUtil,
3029            encoder_utilization: value.encUtil,
3030            decoder_utilization: value.decUtil,
3031        }
3032    }
3033}
3034
3035impl From<sys::nvmlProcessUtilizationInfo_v1_t> for ProcessUtilizationInfo {
3036    fn from(value: sys::nvmlProcessUtilizationInfo_v1_t) -> Self {
3037        Self {
3038            timestamp: value.timeStamp,
3039            pid: Pid(value.pid),
3040            sm_utilization: value.smUtil,
3041            memory_utilization: value.memUtil,
3042            encoder_utilization: value.encUtil,
3043            decoder_utilization: value.decUtil,
3044            jpg_utilization: value.jpgUtil,
3045            ofa_utilization: value.ofaUtil,
3046        }
3047    }
3048}
3049
3050impl From<sys::nvmlEncoderSessionInfo_t> for EncoderSessionInfo {
3051    fn from(value: sys::nvmlEncoderSessionInfo_t) -> Self {
3052        Self {
3053            session_id: value.sessionId,
3054            pid: Pid(value.pid),
3055            vgpu_instance: value.vgpuInstance,
3056            codec_type: value.codecType.into(),
3057            horizontal_resolution: value.hResolution,
3058            vertical_resolution: value.vResolution,
3059            average_fps: value.averageFps,
3060            average_latency_us: value.averageLatency,
3061        }
3062    }
3063}
3064
3065impl From<sys::nvmlFBCStats_t> for FbcStats {
3066    fn from(value: sys::nvmlFBCStats_t) -> Self {
3067        Self {
3068            session_count: value.sessionsCount,
3069            average_fps: value.averageFPS,
3070            average_latency_us: value.averageLatency,
3071        }
3072    }
3073}
3074
3075impl From<sys::nvmlFBCSessionInfo_t> for FbcSessionInfo {
3076    fn from(value: sys::nvmlFBCSessionInfo_t) -> Self {
3077        Self {
3078            session_id: value.sessionId,
3079            pid: Pid(value.pid),
3080            vgpu_instance: value.vgpuInstance,
3081            display_ordinal: value.displayOrdinal,
3082            session_type: value.sessionType.into(),
3083            session_flags: value.sessionFlags,
3084            max_horizontal_resolution: value.hMaxResolution,
3085            max_vertical_resolution: value.vMaxResolution,
3086            horizontal_resolution: value.hResolution,
3087            vertical_resolution: value.vResolution,
3088            average_fps: value.averageFPS,
3089            average_latency_us: value.averageLatency,
3090        }
3091    }
3092}
singe_nvml/types.rs

singe_nvml/
types.rs
