Trait sim::models::model::Model [−][src]
The Model
trait defines everything required for a model to operate
within the discrete event simulation. These requirements are based
largely on the Discrete Event System Specification (DEVS), but with a
small amount of plumbing (as_any
and id
) and a dedicated status
reporting method status
.
Required methods
fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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Implementors
impl Model for ExclusiveGateway
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for Gate
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for Generator
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
_incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
_incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for LoadBalancer
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for ParallelGateway
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for Processor
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for StochasticGate
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
fn time_advance(&mut self, time_delta: f64)
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fn until_next_event(&self) -> f64
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impl Model for Storage
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fn as_any(&self) -> &dyn Any
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fn id(&self) -> String
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fn status(&self) -> String
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fn events_ext(
&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG,
incoming_message: ModelMessage
) -> Result<Vec<ModelMessage>, SimulationError>
fn events_int(
&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>
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&mut self,
_uniform_rng: &mut UniformRNG
) -> Result<Vec<ModelMessage>, SimulationError>