sdl3_sys/generated/
cpuinfo.rs

1//! CPU feature detection for SDL.
2//!
3//! These functions are largely concerned with reporting if the system has
4//! access to various SIMD instruction sets, but also has other important info
5//! to share, such as system RAM size and number of logical CPU cores.
6//!
7//! CPU instruction set checks, like [`SDL_HasSSE()`] and [`SDL_HasNEON()`], are
8//! available on all platforms, even if they don't make sense (an ARM processor
9//! will never have SSE and an x86 processor will never have NEON, for example,
10//! but these functions still exist and will simply return false in these
11//! cases).
12
13use super::stdinc::*;
14
15/// A guess for the cacheline size used for padding.
16///
17/// Most x86 processors have a 64 byte cache line. The 64-bit PowerPC
18/// processors have a 128 byte cache line. We use the larger value to be
19/// generally safe.
20///
21/// ## Availability
22/// This macro is available since SDL 3.2.0.
23pub const SDL_CACHELINE_SIZE: ::core::primitive::i32 = 128;
24
25unsafe extern "C" {
26    /// Get the number of logical CPU cores available.
27    ///
28    /// ## Return value
29    /// Returns the total number of logical CPU cores. On CPUs that include
30    ///   technologies such as hyperthreading, the number of logical cores
31    ///   may be more than the number of physical cores.
32    ///
33    /// ## Thread safety
34    /// It is safe to call this function from any thread.
35    ///
36    /// ## Availability
37    /// This function is available since SDL 3.2.0.
38    pub fn SDL_GetNumLogicalCPUCores() -> ::core::ffi::c_int;
39}
40
41unsafe extern "C" {
42    /// Determine the L1 cache line size of the CPU.
43    ///
44    /// This is useful for determining multi-threaded structure padding or SIMD
45    /// prefetch sizes.
46    ///
47    /// ## Return value
48    /// Returns the L1 cache line size of the CPU, in bytes.
49    ///
50    /// ## Thread safety
51    /// It is safe to call this function from any thread.
52    ///
53    /// ## Availability
54    /// This function is available since SDL 3.2.0.
55    pub fn SDL_GetCPUCacheLineSize() -> ::core::ffi::c_int;
56}
57
58unsafe extern "C" {
59    /// Determine whether the CPU has AltiVec features.
60    ///
61    /// This always returns false on CPUs that aren't using PowerPC instruction
62    /// sets.
63    ///
64    /// ## Return value
65    /// Returns true if the CPU has AltiVec features or false if not.
66    ///
67    /// ## Thread safety
68    /// It is safe to call this function from any thread.
69    ///
70    /// ## Availability
71    /// This function is available since SDL 3.2.0.
72    pub fn SDL_HasAltiVec() -> ::core::primitive::bool;
73}
74
75unsafe extern "C" {
76    /// Determine whether the CPU has MMX features.
77    ///
78    /// This always returns false on CPUs that aren't using Intel instruction sets.
79    ///
80    /// ## Return value
81    /// Returns true if the CPU has MMX features or false if not.
82    ///
83    /// ## Thread safety
84    /// It is safe to call this function from any thread.
85    ///
86    /// ## Availability
87    /// This function is available since SDL 3.2.0.
88    pub fn SDL_HasMMX() -> ::core::primitive::bool;
89}
90
91unsafe extern "C" {
92    /// Determine whether the CPU has SSE features.
93    ///
94    /// This always returns false on CPUs that aren't using Intel instruction sets.
95    ///
96    /// ## Return value
97    /// Returns true if the CPU has SSE features or false if not.
98    ///
99    /// ## Thread safety
100    /// It is safe to call this function from any thread.
101    ///
102    /// ## Availability
103    /// This function is available since SDL 3.2.0.
104    ///
105    /// ## See also
106    /// - [`SDL_HasSSE2`]
107    /// - [`SDL_HasSSE3`]
108    /// - [`SDL_HasSSE41`]
109    /// - [`SDL_HasSSE42`]
110    pub fn SDL_HasSSE() -> ::core::primitive::bool;
111}
112
113unsafe extern "C" {
114    /// Determine whether the CPU has SSE2 features.
115    ///
116    /// This always returns false on CPUs that aren't using Intel instruction sets.
117    ///
118    /// ## Return value
119    /// Returns true if the CPU has SSE2 features or false if not.
120    ///
121    /// ## Thread safety
122    /// It is safe to call this function from any thread.
123    ///
124    /// ## Availability
125    /// This function is available since SDL 3.2.0.
126    ///
127    /// ## See also
128    /// - [`SDL_HasSSE`]
129    /// - [`SDL_HasSSE3`]
130    /// - [`SDL_HasSSE41`]
131    /// - [`SDL_HasSSE42`]
132    pub fn SDL_HasSSE2() -> ::core::primitive::bool;
133}
134
135unsafe extern "C" {
136    /// Determine whether the CPU has SSE3 features.
137    ///
138    /// This always returns false on CPUs that aren't using Intel instruction sets.
139    ///
140    /// ## Return value
141    /// Returns true if the CPU has SSE3 features or false if not.
142    ///
143    /// ## Thread safety
144    /// It is safe to call this function from any thread.
145    ///
146    /// ## Availability
147    /// This function is available since SDL 3.2.0.
148    ///
149    /// ## See also
150    /// - [`SDL_HasSSE`]
151    /// - [`SDL_HasSSE2`]
152    /// - [`SDL_HasSSE41`]
153    /// - [`SDL_HasSSE42`]
154    pub fn SDL_HasSSE3() -> ::core::primitive::bool;
155}
156
157unsafe extern "C" {
158    /// Determine whether the CPU has SSE4.1 features.
159    ///
160    /// This always returns false on CPUs that aren't using Intel instruction sets.
161    ///
162    /// ## Return value
163    /// Returns true if the CPU has SSE4.1 features or false if not.
164    ///
165    /// ## Thread safety
166    /// It is safe to call this function from any thread.
167    ///
168    /// ## Availability
169    /// This function is available since SDL 3.2.0.
170    ///
171    /// ## See also
172    /// - [`SDL_HasSSE`]
173    /// - [`SDL_HasSSE2`]
174    /// - [`SDL_HasSSE3`]
175    /// - [`SDL_HasSSE42`]
176    pub fn SDL_HasSSE41() -> ::core::primitive::bool;
177}
178
179unsafe extern "C" {
180    /// Determine whether the CPU has SSE4.2 features.
181    ///
182    /// This always returns false on CPUs that aren't using Intel instruction sets.
183    ///
184    /// ## Return value
185    /// Returns true if the CPU has SSE4.2 features or false if not.
186    ///
187    /// ## Thread safety
188    /// It is safe to call this function from any thread.
189    ///
190    /// ## Availability
191    /// This function is available since SDL 3.2.0.
192    ///
193    /// ## See also
194    /// - [`SDL_HasSSE`]
195    /// - [`SDL_HasSSE2`]
196    /// - [`SDL_HasSSE3`]
197    /// - [`SDL_HasSSE41`]
198    pub fn SDL_HasSSE42() -> ::core::primitive::bool;
199}
200
201unsafe extern "C" {
202    /// Determine whether the CPU has AVX features.
203    ///
204    /// This always returns false on CPUs that aren't using Intel instruction sets.
205    ///
206    /// ## Return value
207    /// Returns true if the CPU has AVX features or false if not.
208    ///
209    /// ## Thread safety
210    /// It is safe to call this function from any thread.
211    ///
212    /// ## Availability
213    /// This function is available since SDL 3.2.0.
214    ///
215    /// ## See also
216    /// - [`SDL_HasAVX2`]
217    /// - [`SDL_HasAVX512F`]
218    pub fn SDL_HasAVX() -> ::core::primitive::bool;
219}
220
221unsafe extern "C" {
222    /// Determine whether the CPU has AVX2 features.
223    ///
224    /// This always returns false on CPUs that aren't using Intel instruction sets.
225    ///
226    /// ## Return value
227    /// Returns true if the CPU has AVX2 features or false if not.
228    ///
229    /// ## Thread safety
230    /// It is safe to call this function from any thread.
231    ///
232    /// ## Availability
233    /// This function is available since SDL 3.2.0.
234    ///
235    /// ## See also
236    /// - [`SDL_HasAVX`]
237    /// - [`SDL_HasAVX512F`]
238    pub fn SDL_HasAVX2() -> ::core::primitive::bool;
239}
240
241unsafe extern "C" {
242    /// Determine whether the CPU has AVX-512F (foundation) features.
243    ///
244    /// This always returns false on CPUs that aren't using Intel instruction sets.
245    ///
246    /// ## Return value
247    /// Returns true if the CPU has AVX-512F features or false if not.
248    ///
249    /// ## Thread safety
250    /// It is safe to call this function from any thread.
251    ///
252    /// ## Availability
253    /// This function is available since SDL 3.2.0.
254    ///
255    /// ## See also
256    /// - [`SDL_HasAVX`]
257    /// - [`SDL_HasAVX2`]
258    pub fn SDL_HasAVX512F() -> ::core::primitive::bool;
259}
260
261unsafe extern "C" {
262    /// Determine whether the CPU has ARM SIMD (ARMv6) features.
263    ///
264    /// This is different from ARM NEON, which is a different instruction set.
265    ///
266    /// This always returns false on CPUs that aren't using ARM instruction sets.
267    ///
268    /// ## Return value
269    /// Returns true if the CPU has ARM SIMD features or false if not.
270    ///
271    /// ## Thread safety
272    /// It is safe to call this function from any thread.
273    ///
274    /// ## Availability
275    /// This function is available since SDL 3.2.0.
276    ///
277    /// ## See also
278    /// - [`SDL_HasNEON`]
279    pub fn SDL_HasARMSIMD() -> ::core::primitive::bool;
280}
281
282unsafe extern "C" {
283    /// Determine whether the CPU has NEON (ARM SIMD) features.
284    ///
285    /// This always returns false on CPUs that aren't using ARM instruction sets.
286    ///
287    /// ## Return value
288    /// Returns true if the CPU has ARM NEON features or false if not.
289    ///
290    /// ## Thread safety
291    /// It is safe to call this function from any thread.
292    ///
293    /// ## Availability
294    /// This function is available since SDL 3.2.0.
295    pub fn SDL_HasNEON() -> ::core::primitive::bool;
296}
297
298unsafe extern "C" {
299    /// Determine whether the CPU has LSX (LOONGARCH SIMD) features.
300    ///
301    /// This always returns false on CPUs that aren't using LOONGARCH instruction
302    /// sets.
303    ///
304    /// ## Return value
305    /// Returns true if the CPU has LOONGARCH LSX features or false if not.
306    ///
307    /// ## Thread safety
308    /// It is safe to call this function from any thread.
309    ///
310    /// ## Availability
311    /// This function is available since SDL 3.2.0.
312    pub fn SDL_HasLSX() -> ::core::primitive::bool;
313}
314
315unsafe extern "C" {
316    /// Determine whether the CPU has LASX (LOONGARCH SIMD) features.
317    ///
318    /// This always returns false on CPUs that aren't using LOONGARCH instruction
319    /// sets.
320    ///
321    /// ## Return value
322    /// Returns true if the CPU has LOONGARCH LASX features or false if not.
323    ///
324    /// ## Thread safety
325    /// It is safe to call this function from any thread.
326    ///
327    /// ## Availability
328    /// This function is available since SDL 3.2.0.
329    pub fn SDL_HasLASX() -> ::core::primitive::bool;
330}
331
332unsafe extern "C" {
333    /// Get the amount of RAM configured in the system.
334    ///
335    /// ## Return value
336    /// Returns the amount of RAM configured in the system in MiB.
337    ///
338    /// ## Thread safety
339    /// It is safe to call this function from any thread.
340    ///
341    /// ## Availability
342    /// This function is available since SDL 3.2.0.
343    pub fn SDL_GetSystemRAM() -> ::core::ffi::c_int;
344}
345
346unsafe extern "C" {
347    /// Report the alignment this system needs for SIMD allocations.
348    ///
349    /// This will return the minimum number of bytes to which a pointer must be
350    /// aligned to be compatible with SIMD instructions on the current machine. For
351    /// example, if the machine supports SSE only, it will return 16, but if it
352    /// supports AVX-512F, it'll return 64 (etc). This only reports values for
353    /// instruction sets SDL knows about, so if your SDL build doesn't have
354    /// [`SDL_HasAVX512F()`], then it might return 16 for the SSE support it sees and
355    /// not 64 for the AVX-512 instructions that exist but SDL doesn't know about.
356    /// Plan accordingly.
357    ///
358    /// ## Return value
359    /// Returns the alignment in bytes needed for available, known SIMD
360    ///   instructions.
361    ///
362    /// ## Thread safety
363    /// It is safe to call this function from any thread.
364    ///
365    /// ## Availability
366    /// This function is available since SDL 3.2.0.
367    ///
368    /// ## See also
369    /// - [`SDL_aligned_alloc`]
370    /// - [`SDL_aligned_free`]
371    pub fn SDL_GetSIMDAlignment() -> ::core::primitive::usize;
372}
373
374unsafe extern "C" {
375    /// Report the size of a page of memory.
376    ///
377    /// Different platforms might have different memory page sizes. In current
378    /// times, 4 kilobytes is not unusual, but newer systems are moving to larger
379    /// page sizes, and esoteric platforms might have any unexpected size.
380    ///
381    /// Note that this function can return 0, which means SDL can't determine the
382    /// page size on this platform. It will _not_ set an error string to be
383    /// retrieved with [`SDL_GetError()`] in this case! In this case, defaulting to
384    /// 4096 is often a reasonable option.
385    ///
386    /// ## Return value
387    /// Returns the size of a single page of memory, in bytes, or 0 if SDL can't
388    ///   determine this information.
389    ///
390    /// ## Thread safety
391    /// It is safe to call this function from any thread.
392    ///
393    /// ## Availability
394    /// This function is available since SDL 3.4.0.
395    pub fn SDL_GetSystemPageSize() -> ::core::ffi::c_int;
396}
397
398#[cfg(doc)]
399use crate::everything::*;
sdl3_sys/generated/cpuinfo.rs

sdl3_sys/generated/
cpuinfo.rs
