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SD Card Registers
Register representations can be created from an array of little endian words. Note that the SDMMC protocol transfers the registers in big endian byte order.
PLSS_v7_10: Physical Layer Specification Simplified Specification Version 7.10. March 25, 2020. (C) SD Card Association
Modules§
- common
- emmc
- eMMC-specific extensions to the core SDMMC protocol.
- sd
- SD-specific extensions to the core SDMMC protocol.
- sdio
- spi
Structs§
- Block
Device - Represents a block storage device
- R0
- R1 — Zero response
- R1
- R1 — Normal status response
- R2
- R2 — CID/CSD (136-bit)
- R3
- R3 — OCR (Operating Conditions)
- R4
- R4 — SDIO OCR + capability
- R5
- R5 — SDIO Direct I/O response
- R6
- R6 — Published RCA (SD only)
- R7
- R7 — Interface condition (CMD8)
- R1b
- R1b — R1 + busy on DAT0
Enums§
- BusWidth
- Card
State - MmcError
- Response
Len - Signalling
- The signalling scheme used on the SDMMC bus
Traits§
- Addressable
- Represents either an SD or EMMC card
- Block
Command - Block mode: fixed-size blocks (CMD17/18/24/25, CMD53 block mode)
- Block
Read Command - BlockReadCommand: block-mode read (CMD17, CMD18)
- Block
Write Command - BlockWriteCommand: block-mode write (CMD24, CMD25)
- Byte
Command - Byte mode: arbitrary byte counts (CMD53 byte mode, SPI multi-byte)
- Byte
Read Command - ByteReadCommand: byte-mode read (CMD53 byte read)
- Byte
Write Command - ByteWriteCommand: byte-mode write (CMD53 byte write)
- Command
- Control
Command - ControlCommand: commands with no data transfer (CMD0, CMD8, CMD55, etc.)
- MmcBus
- Response
- Tuning
Op - Bus Tuning Operation