Module gpu_cuda 

CUDA-accelerated sparse graph linear algebra (optional, off-by-default, NVIDIA-only). Compiles to nothing unless the cuda feature is enabled. Optional, off-by-default, NVIDIA-only CUDA acceleration for sparse graph linear algebra — specifically a CSR sparse matrix-vector product (SpMV) on a graph’s adjacency matrix.

This module is compiled only when the cuda feature is enabled. Even then it is runtime-probed: cuda_is_available returns false on any platform without an NVIDIA CUDA device (for example macOS), so callers can compile everywhere and dispatch to the CPU path (crate::compressed::CsrGraph::spmv) when no device is present. Everything here is f64-native — there is no silent f32 downcast at the boundary.

Library-call pattern (vs. custom-kernel pattern)

Like scirs2-interpolate’s CUDA path — and unlike scirs2-symbolic’s, which emits custom kernels through the oxicuda-ptx builder — this module follows the library-call pattern: it hands the sparse matrix-vector multiply off to the pre-built, battle-tested oxicuda-sparse library crate (a pure-Rust cuSPARSE equivalent). No bespoke kernels are authored here; the adjacency-matrix CSR is uploaded and oxicuda_sparse::ops::spmv does the work.

What this accelerates, and where it generalizes

cuda_spmv_csr computes y = A · x, where A is the graph’s adjacency matrix in CSR form (row_offsets / col_indices / values) and x is a dense per-node vector. y = A · x is the fundamental graph-linear-algebra primitive: PageRank is iterated SpMV, and a single BFS / SSSP frontier- expansion step is an SpMV over an appropriate semiring (boolean OR-AND for BFS, min-plus for SSSP). This slice wires the plus-times (numeric) SpMV; the semiring variants are a natural future extension once oxicuda-sparse exposes semiring SpMV.

Functions

cuda_is_available

Returns true only when an NVIDIA CUDA device is present and the driver initialises successfully.

cuda_spmv_csr

Computes the sparse matrix-vector product y = A · x on the GPU, where A is a graph adjacency matrix in CSR (Compressed Sparse Row) form.