[−][src]Struct sam3x8e::hsmci::RegisterBlock

#[repr(C)]

pub struct RegisterBlock {
    pub cr: CR,
    pub mr: MR,
    pub dtor: DTOR,
    pub sdcr: SDCR,
    pub argr: ARGR,
    pub cmdr: CMDR,
    pub blkr: BLKR,
    pub cstor: CSTOR,
    pub rspr: [RSPR; 4],
    pub rdr: RDR,
    pub tdr: TDR,
    pub sr: SR,
    pub ier: IER,
    pub idr: IDR,
    pub imr: IMR,
    pub dma: DMA,
    pub cfg: CFG,
    pub wpmr: WPMR,
    pub wpsr: WPSR,
    pub fifo: [FIFO; 256],
    // some fields omitted
}

Register block

Fields

cr: CR

0x00 - Control Register

mr: MR

0x04 - Mode Register

dtor: DTOR

0x08 - Data Timeout Register

sdcr: SDCR

0x0c - SD/SDIO Card Register

argr: ARGR

0x10 - Argument Register

cmdr: CMDR

0x14 - Command Register

blkr: BLKR

0x18 - Block Register

cstor: CSTOR

0x1c - Completion Signal Timeout Register

rspr: [RSPR; 4]

0x20 - Response Register

rdr: RDR

0x30 - Receive Data Register

tdr: TDR

0x34 - Transmit Data Register

sr: SR

0x40 - Status Register

ier: IER

0x44 - Interrupt Enable Register

idr: IDR

0x48 - Interrupt Disable Register

imr: IMR

0x4c - Interrupt Mask Register

dma: DMA

0x50 - DMA Configuration Register

cfg: CFG

0x54 - Configuration Register

wpmr: WPMR

0xe4 - Write Protection Mode Register

wpsr: WPSR

0xe8 - Write Protection Status Register

fifo: [FIFO; 256]

0x200 - FIFO Memory Aperture0

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