1#![doc = "Peripheral access API for S32K144 microcontrollers (generated using svd2rust v0.21.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.21.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
3#![deny(const_err)]
4#![deny(dead_code)]
5#![deny(improper_ctypes)]
6#![deny(missing_docs)]
7#![deny(no_mangle_generic_items)]
8#![deny(non_shorthand_field_patterns)]
9#![deny(overflowing_literals)]
10#![deny(path_statements)]
11#![deny(patterns_in_fns_without_body)]
12#![deny(private_in_public)]
13#![deny(unconditional_recursion)]
14#![deny(unused_allocation)]
15#![deny(unused_comparisons)]
16#![deny(unused_parens)]
17#![deny(while_true)]
18#![allow(non_camel_case_types)]
19#![allow(non_snake_case)]
20#![no_std]
21use core::marker::PhantomData;
22use core::ops::Deref;
23#[doc = r"Number available in the NVIC for configuring priority"]
24pub const NVIC_PRIO_BITS: u8 = 4;
25#[cfg(feature = "rt")]
26pub use self::Interrupt as interrupt;
27pub use cortex_m::peripheral::Peripherals as CorePeripherals;
28pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
29#[cfg(feature = "rt")]
30pub use cortex_m_rt::interrupt;
31#[allow(unused_imports)]
32use generic::*;
33#[doc = r"Common register and bit access and modify traits"]
34pub mod generic;
35#[cfg(feature = "rt")]
36extern "C" {
37 fn DMA0();
38 fn DMA1();
39 fn DMA2();
40 fn DMA3();
41 fn DMA4();
42 fn DMA5();
43 fn DMA6();
44 fn DMA7();
45 fn DMA8();
46 fn DMA9();
47 fn DMA10();
48 fn DMA11();
49 fn DMA12();
50 fn DMA13();
51 fn DMA14();
52 fn DMA15();
53 fn DMA_ERROR();
54 fn MCM();
55 fn FTFC();
56 fn READ_COLLISION();
57 fn LVD_LVW();
58 fn FTFC_FAULT();
59 fn WDOG_EWM();
60 fn RCM();
61 fn LPI2C0_MASTER();
62 fn LPI2C0_SLAVE();
63 fn LPSPI0();
64 fn LPSPI1();
65 fn LPSPI2();
66 fn LPUART0_RXTX();
67 fn LPUART1_RXTX();
68 fn LPUART2_RXTX();
69 fn ADC0();
70 fn ADC1();
71 fn CMP0();
72 fn ERM_SINGLE_FAULT();
73 fn ERM_DOUBLE_FAULT();
74 fn RTC();
75 fn RTC_SECONDS();
76 fn LPIT0_CH0();
77 fn LPIT0_CH1();
78 fn LPIT0_CH2();
79 fn LPIT0_CH3();
80 fn PDB0();
81 fn SCG();
82 fn LPTMR0();
83 fn PORTA();
84 fn PORTB();
85 fn PORTC();
86 fn PORTD();
87 fn PORTE();
88 fn SWI();
89 fn PDB1();
90 fn FLEXIO();
91 fn CAN0_ORED();
92 fn CAN0_ERROR();
93 fn CAN0_WAKE_UP();
94 fn CAN0_ORED_0_15_MB();
95 fn CAN0_ORED_16_31_MB();
96 fn CAN1_ORED();
97 fn CAN1_ERROR();
98 fn CAN1_ORED_0_15_MB();
99 fn CAN2_ORED();
100 fn CAN2_ERROR();
101 fn CAN2_ORED_0_15_MB();
102 fn FTM0_CH0_CH1();
103 fn FTM0_CH2_CH3();
104 fn FTM0_CH4_CH5();
105 fn FTM0_CH6_CH7();
106 fn FTM0_FAULT();
107 fn FTM0_OVF_RELOAD();
108 fn FTM1_CH0_CH1();
109 fn FTM1_CH2_CH3();
110 fn FTM1_CH4_CH5();
111 fn FTM1_CH6_CH7();
112 fn FTM1_FAULT();
113 fn FTM1_OVF_RELOAD();
114 fn FTM2_CH0_CH1();
115 fn FTM2_CH2_CH3();
116 fn FTM2_CH4_CH5();
117 fn FTM2_CH6_CH7();
118 fn FTM2_FAULT();
119 fn FTM2_OVF_RELOAD();
120 fn FTM3_CH0_CH1();
121 fn FTM3_CH2_CH3();
122 fn FTM3_CH4_CH5();
123 fn FTM3_CH6_CH7();
124 fn FTM3_FAULT();
125 fn FTM3_OVF_RELOAD();
126}
127#[doc(hidden)]
128pub union Vector {
129 _handler: unsafe extern "C" fn(),
130 _reserved: u32,
131}
132#[cfg(feature = "rt")]
133#[doc(hidden)]
134#[link_section = ".vector_table.interrupts"]
135#[no_mangle]
136pub static __INTERRUPTS: [Vector; 123] = [
137 Vector { _handler: DMA0 },
138 Vector { _handler: DMA1 },
139 Vector { _handler: DMA2 },
140 Vector { _handler: DMA3 },
141 Vector { _handler: DMA4 },
142 Vector { _handler: DMA5 },
143 Vector { _handler: DMA6 },
144 Vector { _handler: DMA7 },
145 Vector { _handler: DMA8 },
146 Vector { _handler: DMA9 },
147 Vector { _handler: DMA10 },
148 Vector { _handler: DMA11 },
149 Vector { _handler: DMA12 },
150 Vector { _handler: DMA13 },
151 Vector { _handler: DMA14 },
152 Vector { _handler: DMA15 },
153 Vector {
154 _handler: DMA_ERROR,
155 },
156 Vector { _handler: MCM },
157 Vector { _handler: FTFC },
158 Vector {
159 _handler: READ_COLLISION,
160 },
161 Vector { _handler: LVD_LVW },
162 Vector {
163 _handler: FTFC_FAULT,
164 },
165 Vector { _handler: WDOG_EWM },
166 Vector { _handler: RCM },
167 Vector {
168 _handler: LPI2C0_MASTER,
169 },
170 Vector {
171 _handler: LPI2C0_SLAVE,
172 },
173 Vector { _handler: LPSPI0 },
174 Vector { _handler: LPSPI1 },
175 Vector { _handler: LPSPI2 },
176 Vector { _reserved: 0 },
177 Vector { _reserved: 0 },
178 Vector {
179 _handler: LPUART0_RXTX,
180 },
181 Vector { _reserved: 0 },
182 Vector {
183 _handler: LPUART1_RXTX,
184 },
185 Vector { _reserved: 0 },
186 Vector {
187 _handler: LPUART2_RXTX,
188 },
189 Vector { _reserved: 0 },
190 Vector { _reserved: 0 },
191 Vector { _reserved: 0 },
192 Vector { _handler: ADC0 },
193 Vector { _handler: ADC1 },
194 Vector { _handler: CMP0 },
195 Vector { _reserved: 0 },
196 Vector { _reserved: 0 },
197 Vector {
198 _handler: ERM_SINGLE_FAULT,
199 },
200 Vector {
201 _handler: ERM_DOUBLE_FAULT,
202 },
203 Vector { _handler: RTC },
204 Vector {
205 _handler: RTC_SECONDS,
206 },
207 Vector {
208 _handler: LPIT0_CH0,
209 },
210 Vector {
211 _handler: LPIT0_CH1,
212 },
213 Vector {
214 _handler: LPIT0_CH2,
215 },
216 Vector {
217 _handler: LPIT0_CH3,
218 },
219 Vector { _handler: PDB0 },
220 Vector { _reserved: 0 },
221 Vector { _reserved: 0 },
222 Vector { _reserved: 0 },
223 Vector { _reserved: 0 },
224 Vector { _handler: SCG },
225 Vector { _handler: LPTMR0 },
226 Vector { _handler: PORTA },
227 Vector { _handler: PORTB },
228 Vector { _handler: PORTC },
229 Vector { _handler: PORTD },
230 Vector { _handler: PORTE },
231 Vector { _handler: SWI },
232 Vector { _reserved: 0 },
233 Vector { _reserved: 0 },
234 Vector { _reserved: 0 },
235 Vector { _handler: PDB1 },
236 Vector { _handler: FLEXIO },
237 Vector { _reserved: 0 },
238 Vector { _reserved: 0 },
239 Vector { _reserved: 0 },
240 Vector { _reserved: 0 },
241 Vector { _reserved: 0 },
242 Vector { _reserved: 0 },
243 Vector { _reserved: 0 },
244 Vector { _reserved: 0 },
245 Vector {
246 _handler: CAN0_ORED,
247 },
248 Vector {
249 _handler: CAN0_ERROR,
250 },
251 Vector {
252 _handler: CAN0_WAKE_UP,
253 },
254 Vector {
255 _handler: CAN0_ORED_0_15_MB,
256 },
257 Vector {
258 _handler: CAN0_ORED_16_31_MB,
259 },
260 Vector { _reserved: 0 },
261 Vector { _reserved: 0 },
262 Vector {
263 _handler: CAN1_ORED,
264 },
265 Vector {
266 _handler: CAN1_ERROR,
267 },
268 Vector { _reserved: 0 },
269 Vector {
270 _handler: CAN1_ORED_0_15_MB,
271 },
272 Vector { _reserved: 0 },
273 Vector { _reserved: 0 },
274 Vector { _reserved: 0 },
275 Vector {
276 _handler: CAN2_ORED,
277 },
278 Vector {
279 _handler: CAN2_ERROR,
280 },
281 Vector { _reserved: 0 },
282 Vector {
283 _handler: CAN2_ORED_0_15_MB,
284 },
285 Vector { _reserved: 0 },
286 Vector { _reserved: 0 },
287 Vector { _reserved: 0 },
288 Vector {
289 _handler: FTM0_CH0_CH1,
290 },
291 Vector {
292 _handler: FTM0_CH2_CH3,
293 },
294 Vector {
295 _handler: FTM0_CH4_CH5,
296 },
297 Vector {
298 _handler: FTM0_CH6_CH7,
299 },
300 Vector {
301 _handler: FTM0_FAULT,
302 },
303 Vector {
304 _handler: FTM0_OVF_RELOAD,
305 },
306 Vector {
307 _handler: FTM1_CH0_CH1,
308 },
309 Vector {
310 _handler: FTM1_CH2_CH3,
311 },
312 Vector {
313 _handler: FTM1_CH4_CH5,
314 },
315 Vector {
316 _handler: FTM1_CH6_CH7,
317 },
318 Vector {
319 _handler: FTM1_FAULT,
320 },
321 Vector {
322 _handler: FTM1_OVF_RELOAD,
323 },
324 Vector {
325 _handler: FTM2_CH0_CH1,
326 },
327 Vector {
328 _handler: FTM2_CH2_CH3,
329 },
330 Vector {
331 _handler: FTM2_CH4_CH5,
332 },
333 Vector {
334 _handler: FTM2_CH6_CH7,
335 },
336 Vector {
337 _handler: FTM2_FAULT,
338 },
339 Vector {
340 _handler: FTM2_OVF_RELOAD,
341 },
342 Vector {
343 _handler: FTM3_CH0_CH1,
344 },
345 Vector {
346 _handler: FTM3_CH2_CH3,
347 },
348 Vector {
349 _handler: FTM3_CH4_CH5,
350 },
351 Vector {
352 _handler: FTM3_CH6_CH7,
353 },
354 Vector {
355 _handler: FTM3_FAULT,
356 },
357 Vector {
358 _handler: FTM3_OVF_RELOAD,
359 },
360];
361#[doc = r"Enumeration of all the interrupts."]
362#[derive(Copy, Clone, Debug, PartialEq, Eq)]
363#[repr(u16)]
364pub enum Interrupt {
365 #[doc = "0 - DMA0"]
366 DMA0 = 0,
367 #[doc = "1 - DMA1"]
368 DMA1 = 1,
369 #[doc = "2 - DMA2"]
370 DMA2 = 2,
371 #[doc = "3 - DMA3"]
372 DMA3 = 3,
373 #[doc = "4 - DMA4"]
374 DMA4 = 4,
375 #[doc = "5 - DMA5"]
376 DMA5 = 5,
377 #[doc = "6 - DMA6"]
378 DMA6 = 6,
379 #[doc = "7 - DMA7"]
380 DMA7 = 7,
381 #[doc = "8 - DMA8"]
382 DMA8 = 8,
383 #[doc = "9 - DMA9"]
384 DMA9 = 9,
385 #[doc = "10 - DMA10"]
386 DMA10 = 10,
387 #[doc = "11 - DMA11"]
388 DMA11 = 11,
389 #[doc = "12 - DMA12"]
390 DMA12 = 12,
391 #[doc = "13 - DMA13"]
392 DMA13 = 13,
393 #[doc = "14 - DMA14"]
394 DMA14 = 14,
395 #[doc = "15 - DMA15"]
396 DMA15 = 15,
397 #[doc = "16 - DMA_Error"]
398 DMA_ERROR = 16,
399 #[doc = "17 - MCM"]
400 MCM = 17,
401 #[doc = "18 - FTFC"]
402 FTFC = 18,
403 #[doc = "19 - Read_Collision"]
404 READ_COLLISION = 19,
405 #[doc = "20 - LVD_LVW"]
406 LVD_LVW = 20,
407 #[doc = "21 - FTFC_Fault"]
408 FTFC_FAULT = 21,
409 #[doc = "22 - WDOG_EWM"]
410 WDOG_EWM = 22,
411 #[doc = "23 - RCM"]
412 RCM = 23,
413 #[doc = "24 - LPI2C0_Master"]
414 LPI2C0_MASTER = 24,
415 #[doc = "25 - LPI2C0_Slave"]
416 LPI2C0_SLAVE = 25,
417 #[doc = "26 - LPSPI0"]
418 LPSPI0 = 26,
419 #[doc = "27 - LPSPI1"]
420 LPSPI1 = 27,
421 #[doc = "28 - LPSPI2"]
422 LPSPI2 = 28,
423 #[doc = "31 - LPUART0_RxTx"]
424 LPUART0_RXTX = 31,
425 #[doc = "33 - LPUART1_RxTx"]
426 LPUART1_RXTX = 33,
427 #[doc = "35 - LPUART2_RxTx"]
428 LPUART2_RXTX = 35,
429 #[doc = "39 - ADC0"]
430 ADC0 = 39,
431 #[doc = "40 - ADC1"]
432 ADC1 = 40,
433 #[doc = "41 - CMP0"]
434 CMP0 = 41,
435 #[doc = "44 - ERM_single_fault"]
436 ERM_SINGLE_FAULT = 44,
437 #[doc = "45 - ERM_double_fault"]
438 ERM_DOUBLE_FAULT = 45,
439 #[doc = "46 - RTC"]
440 RTC = 46,
441 #[doc = "47 - RTC_Seconds"]
442 RTC_SECONDS = 47,
443 #[doc = "48 - LPIT0_Ch0"]
444 LPIT0_CH0 = 48,
445 #[doc = "49 - LPIT0_Ch1"]
446 LPIT0_CH1 = 49,
447 #[doc = "50 - LPIT0_Ch2"]
448 LPIT0_CH2 = 50,
449 #[doc = "51 - LPIT0_Ch3"]
450 LPIT0_CH3 = 51,
451 #[doc = "52 - PDB0"]
452 PDB0 = 52,
453 #[doc = "57 - SCG"]
454 SCG = 57,
455 #[doc = "58 - LPTMR0"]
456 LPTMR0 = 58,
457 #[doc = "59 - PORTA"]
458 PORTA = 59,
459 #[doc = "60 - PORTB"]
460 PORTB = 60,
461 #[doc = "61 - PORTC"]
462 PORTC = 61,
463 #[doc = "62 - PORTD"]
464 PORTD = 62,
465 #[doc = "63 - PORTE"]
466 PORTE = 63,
467 #[doc = "64 - SWI"]
468 SWI = 64,
469 #[doc = "68 - PDB1"]
470 PDB1 = 68,
471 #[doc = "69 - FLEXIO"]
472 FLEXIO = 69,
473 #[doc = "78 - CAN0_ORed"]
474 CAN0_ORED = 78,
475 #[doc = "79 - CAN0_Error"]
476 CAN0_ERROR = 79,
477 #[doc = "80 - CAN0_Wake_Up"]
478 CAN0_WAKE_UP = 80,
479 #[doc = "81 - CAN0_ORed_0_15_MB"]
480 CAN0_ORED_0_15_MB = 81,
481 #[doc = "82 - CAN0_ORed_16_31_MB"]
482 CAN0_ORED_16_31_MB = 82,
483 #[doc = "85 - CAN1_ORed"]
484 CAN1_ORED = 85,
485 #[doc = "86 - CAN1_Error"]
486 CAN1_ERROR = 86,
487 #[doc = "88 - CAN1_ORed_0_15_MB"]
488 CAN1_ORED_0_15_MB = 88,
489 #[doc = "92 - CAN2_ORed"]
490 CAN2_ORED = 92,
491 #[doc = "93 - CAN2_Error"]
492 CAN2_ERROR = 93,
493 #[doc = "95 - CAN2_ORed_0_15_MB"]
494 CAN2_ORED_0_15_MB = 95,
495 #[doc = "99 - FTM0_Ch0_Ch1"]
496 FTM0_CH0_CH1 = 99,
497 #[doc = "100 - FTM0_Ch2_Ch3"]
498 FTM0_CH2_CH3 = 100,
499 #[doc = "101 - FTM0_Ch4_Ch5"]
500 FTM0_CH4_CH5 = 101,
501 #[doc = "102 - FTM0_Ch6_Ch7"]
502 FTM0_CH6_CH7 = 102,
503 #[doc = "103 - FTM0_Fault"]
504 FTM0_FAULT = 103,
505 #[doc = "104 - FTM0_Ovf_Reload"]
506 FTM0_OVF_RELOAD = 104,
507 #[doc = "105 - FTM1_Ch0_Ch1"]
508 FTM1_CH0_CH1 = 105,
509 #[doc = "106 - FTM1_Ch2_Ch3"]
510 FTM1_CH2_CH3 = 106,
511 #[doc = "107 - FTM1_Ch4_Ch5"]
512 FTM1_CH4_CH5 = 107,
513 #[doc = "108 - FTM1_Ch6_Ch7"]
514 FTM1_CH6_CH7 = 108,
515 #[doc = "109 - FTM1_Fault"]
516 FTM1_FAULT = 109,
517 #[doc = "110 - FTM1_Ovf_Reload"]
518 FTM1_OVF_RELOAD = 110,
519 #[doc = "111 - FTM2_Ch0_Ch1"]
520 FTM2_CH0_CH1 = 111,
521 #[doc = "112 - FTM2_Ch2_Ch3"]
522 FTM2_CH2_CH3 = 112,
523 #[doc = "113 - FTM2_Ch4_Ch5"]
524 FTM2_CH4_CH5 = 113,
525 #[doc = "114 - FTM2_Ch6_Ch7"]
526 FTM2_CH6_CH7 = 114,
527 #[doc = "115 - FTM2_Fault"]
528 FTM2_FAULT = 115,
529 #[doc = "116 - FTM2_Ovf_Reload"]
530 FTM2_OVF_RELOAD = 116,
531 #[doc = "117 - FTM3_Ch0_Ch1"]
532 FTM3_CH0_CH1 = 117,
533 #[doc = "118 - FTM3_Ch2_Ch3"]
534 FTM3_CH2_CH3 = 118,
535 #[doc = "119 - FTM3_Ch4_Ch5"]
536 FTM3_CH4_CH5 = 119,
537 #[doc = "120 - FTM3_Ch6_Ch7"]
538 FTM3_CH6_CH7 = 120,
539 #[doc = "121 - FTM3_Fault"]
540 FTM3_FAULT = 121,
541 #[doc = "122 - FTM3_Ovf_Reload"]
542 FTM3_OVF_RELOAD = 122,
543}
544unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
545 #[inline(always)]
546 fn number(self) -> u16 {
547 self as u16
548 }
549}
550#[doc = "CSE_PRAM"]
551pub struct CSE_PRAM {
552 _marker: PhantomData<*const ()>,
553}
554unsafe impl Send for CSE_PRAM {}
555impl CSE_PRAM {
556 #[doc = r"Pointer to the register block"]
557 pub const PTR: *const cse_pram::RegisterBlock = 0x1400_1000 as *const _;
558 #[doc = r"Return the pointer to the register block"]
559 #[inline(always)]
560 pub const fn ptr() -> *const cse_pram::RegisterBlock {
561 Self::PTR
562 }
563}
564impl Deref for CSE_PRAM {
565 type Target = cse_pram::RegisterBlock;
566 #[inline(always)]
567 fn deref(&self) -> &Self::Target {
568 unsafe { &*Self::PTR }
569 }
570}
571impl core::fmt::Debug for CSE_PRAM {
572 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
573 f.debug_struct("CSE_PRAM").finish()
574 }
575}
576#[doc = "CSE_PRAM"]
577pub mod cse_pram;
578#[doc = "AIPS-Lite Bridge"]
579pub struct AIPS {
580 _marker: PhantomData<*const ()>,
581}
582unsafe impl Send for AIPS {}
583impl AIPS {
584 #[doc = r"Pointer to the register block"]
585 pub const PTR: *const aips::RegisterBlock = 0x4000_0000 as *const _;
586 #[doc = r"Return the pointer to the register block"]
587 #[inline(always)]
588 pub const fn ptr() -> *const aips::RegisterBlock {
589 Self::PTR
590 }
591}
592impl Deref for AIPS {
593 type Target = aips::RegisterBlock;
594 #[inline(always)]
595 fn deref(&self) -> &Self::Target {
596 unsafe { &*Self::PTR }
597 }
598}
599impl core::fmt::Debug for AIPS {
600 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
601 f.debug_struct("AIPS").finish()
602 }
603}
604#[doc = "AIPS-Lite Bridge"]
605pub mod aips;
606#[doc = "MSCM"]
607pub struct MSCM {
608 _marker: PhantomData<*const ()>,
609}
610unsafe impl Send for MSCM {}
611impl MSCM {
612 #[doc = r"Pointer to the register block"]
613 pub const PTR: *const mscm::RegisterBlock = 0x4000_1000 as *const _;
614 #[doc = r"Return the pointer to the register block"]
615 #[inline(always)]
616 pub const fn ptr() -> *const mscm::RegisterBlock {
617 Self::PTR
618 }
619}
620impl Deref for MSCM {
621 type Target = mscm::RegisterBlock;
622 #[inline(always)]
623 fn deref(&self) -> &Self::Target {
624 unsafe { &*Self::PTR }
625 }
626}
627impl core::fmt::Debug for MSCM {
628 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
629 f.debug_struct("MSCM").finish()
630 }
631}
632#[doc = "MSCM"]
633pub mod mscm;
634#[doc = "Enhanced Direct Memory Access"]
635pub struct DMA {
636 _marker: PhantomData<*const ()>,
637}
638unsafe impl Send for DMA {}
639impl DMA {
640 #[doc = r"Pointer to the register block"]
641 pub const PTR: *const dma::RegisterBlock = 0x4000_8000 as *const _;
642 #[doc = r"Return the pointer to the register block"]
643 #[inline(always)]
644 pub const fn ptr() -> *const dma::RegisterBlock {
645 Self::PTR
646 }
647}
648impl Deref for DMA {
649 type Target = dma::RegisterBlock;
650 #[inline(always)]
651 fn deref(&self) -> &Self::Target {
652 unsafe { &*Self::PTR }
653 }
654}
655impl core::fmt::Debug for DMA {
656 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
657 f.debug_struct("DMA").finish()
658 }
659}
660#[doc = "Enhanced Direct Memory Access"]
661pub mod dma;
662#[doc = "ERM"]
663pub struct ERM {
664 _marker: PhantomData<*const ()>,
665}
666unsafe impl Send for ERM {}
667impl ERM {
668 #[doc = r"Pointer to the register block"]
669 pub const PTR: *const erm::RegisterBlock = 0x4001_8000 as *const _;
670 #[doc = r"Return the pointer to the register block"]
671 #[inline(always)]
672 pub const fn ptr() -> *const erm::RegisterBlock {
673 Self::PTR
674 }
675}
676impl Deref for ERM {
677 type Target = erm::RegisterBlock;
678 #[inline(always)]
679 fn deref(&self) -> &Self::Target {
680 unsafe { &*Self::PTR }
681 }
682}
683impl core::fmt::Debug for ERM {
684 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
685 f.debug_struct("ERM").finish()
686 }
687}
688#[doc = "ERM"]
689pub mod erm;
690#[doc = "Error Injection Module"]
691pub struct EIM {
692 _marker: PhantomData<*const ()>,
693}
694unsafe impl Send for EIM {}
695impl EIM {
696 #[doc = r"Pointer to the register block"]
697 pub const PTR: *const eim::RegisterBlock = 0x4001_9000 as *const _;
698 #[doc = r"Return the pointer to the register block"]
699 #[inline(always)]
700 pub const fn ptr() -> *const eim::RegisterBlock {
701 Self::PTR
702 }
703}
704impl Deref for EIM {
705 type Target = eim::RegisterBlock;
706 #[inline(always)]
707 fn deref(&self) -> &Self::Target {
708 unsafe { &*Self::PTR }
709 }
710}
711impl core::fmt::Debug for EIM {
712 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
713 f.debug_struct("EIM").finish()
714 }
715}
716#[doc = "Error Injection Module"]
717pub mod eim;
718#[doc = "FTFC"]
719pub struct FTFC {
720 _marker: PhantomData<*const ()>,
721}
722unsafe impl Send for FTFC {}
723impl FTFC {
724 #[doc = r"Pointer to the register block"]
725 pub const PTR: *const ftfc::RegisterBlock = 0x4002_0000 as *const _;
726 #[doc = r"Return the pointer to the register block"]
727 #[inline(always)]
728 pub const fn ptr() -> *const ftfc::RegisterBlock {
729 Self::PTR
730 }
731}
732impl Deref for FTFC {
733 type Target = ftfc::RegisterBlock;
734 #[inline(always)]
735 fn deref(&self) -> &Self::Target {
736 unsafe { &*Self::PTR }
737 }
738}
739impl core::fmt::Debug for FTFC {
740 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
741 f.debug_struct("FTFC").finish()
742 }
743}
744#[doc = "FTFC"]
745pub mod ftfc;
746#[doc = "DMA channel multiplexor"]
747pub struct DMAMUX {
748 _marker: PhantomData<*const ()>,
749}
750unsafe impl Send for DMAMUX {}
751impl DMAMUX {
752 #[doc = r"Pointer to the register block"]
753 pub const PTR: *const dmamux::RegisterBlock = 0x4002_1000 as *const _;
754 #[doc = r"Return the pointer to the register block"]
755 #[inline(always)]
756 pub const fn ptr() -> *const dmamux::RegisterBlock {
757 Self::PTR
758 }
759}
760impl Deref for DMAMUX {
761 type Target = dmamux::RegisterBlock;
762 #[inline(always)]
763 fn deref(&self) -> &Self::Target {
764 unsafe { &*Self::PTR }
765 }
766}
767impl core::fmt::Debug for DMAMUX {
768 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
769 f.debug_struct("DMAMUX").finish()
770 }
771}
772#[doc = "DMA channel multiplexor"]
773pub mod dmamux;
774#[doc = "Flex Controller Area Network module"]
775pub struct CAN0 {
776 _marker: PhantomData<*const ()>,
777}
778unsafe impl Send for CAN0 {}
779impl CAN0 {
780 #[doc = r"Pointer to the register block"]
781 pub const PTR: *const can0::RegisterBlock = 0x4002_4000 as *const _;
782 #[doc = r"Return the pointer to the register block"]
783 #[inline(always)]
784 pub const fn ptr() -> *const can0::RegisterBlock {
785 Self::PTR
786 }
787}
788impl Deref for CAN0 {
789 type Target = can0::RegisterBlock;
790 #[inline(always)]
791 fn deref(&self) -> &Self::Target {
792 unsafe { &*Self::PTR }
793 }
794}
795impl core::fmt::Debug for CAN0 {
796 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
797 f.debug_struct("CAN0").finish()
798 }
799}
800#[doc = "Flex Controller Area Network module"]
801pub mod can0;
802#[doc = "Flex Controller Area Network module"]
803pub struct CAN1 {
804 _marker: PhantomData<*const ()>,
805}
806unsafe impl Send for CAN1 {}
807impl CAN1 {
808 #[doc = r"Pointer to the register block"]
809 pub const PTR: *const can1::RegisterBlock = 0x4002_5000 as *const _;
810 #[doc = r"Return the pointer to the register block"]
811 #[inline(always)]
812 pub const fn ptr() -> *const can1::RegisterBlock {
813 Self::PTR
814 }
815}
816impl Deref for CAN1 {
817 type Target = can1::RegisterBlock;
818 #[inline(always)]
819 fn deref(&self) -> &Self::Target {
820 unsafe { &*Self::PTR }
821 }
822}
823impl core::fmt::Debug for CAN1 {
824 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
825 f.debug_struct("CAN1").finish()
826 }
827}
828#[doc = "Flex Controller Area Network module"]
829pub mod can1;
830#[doc = "Flex Controller Area Network module"]
831pub struct CAN2 {
832 _marker: PhantomData<*const ()>,
833}
834unsafe impl Send for CAN2 {}
835impl CAN2 {
836 #[doc = r"Pointer to the register block"]
837 pub const PTR: *const can2::RegisterBlock = 0x4002_b000 as *const _;
838 #[doc = r"Return the pointer to the register block"]
839 #[inline(always)]
840 pub const fn ptr() -> *const can2::RegisterBlock {
841 Self::PTR
842 }
843}
844impl Deref for CAN2 {
845 type Target = can2::RegisterBlock;
846 #[inline(always)]
847 fn deref(&self) -> &Self::Target {
848 unsafe { &*Self::PTR }
849 }
850}
851impl core::fmt::Debug for CAN2 {
852 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
853 f.debug_struct("CAN2").finish()
854 }
855}
856#[doc = "Flex Controller Area Network module"]
857pub mod can2;
858#[doc = "FlexTimer Module"]
859pub struct FTM0 {
860 _marker: PhantomData<*const ()>,
861}
862unsafe impl Send for FTM0 {}
863impl FTM0 {
864 #[doc = r"Pointer to the register block"]
865 pub const PTR: *const ftm0::RegisterBlock = 0x4003_8000 as *const _;
866 #[doc = r"Return the pointer to the register block"]
867 #[inline(always)]
868 pub const fn ptr() -> *const ftm0::RegisterBlock {
869 Self::PTR
870 }
871}
872impl Deref for FTM0 {
873 type Target = ftm0::RegisterBlock;
874 #[inline(always)]
875 fn deref(&self) -> &Self::Target {
876 unsafe { &*Self::PTR }
877 }
878}
879impl core::fmt::Debug for FTM0 {
880 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
881 f.debug_struct("FTM0").finish()
882 }
883}
884#[doc = "FlexTimer Module"]
885pub mod ftm0;
886#[doc = "FlexTimer Module"]
887pub struct FTM1 {
888 _marker: PhantomData<*const ()>,
889}
890unsafe impl Send for FTM1 {}
891impl FTM1 {
892 #[doc = r"Pointer to the register block"]
893 pub const PTR: *const ftm1::RegisterBlock = 0x4003_9000 as *const _;
894 #[doc = r"Return the pointer to the register block"]
895 #[inline(always)]
896 pub const fn ptr() -> *const ftm1::RegisterBlock {
897 Self::PTR
898 }
899}
900impl Deref for FTM1 {
901 type Target = ftm1::RegisterBlock;
902 #[inline(always)]
903 fn deref(&self) -> &Self::Target {
904 unsafe { &*Self::PTR }
905 }
906}
907impl core::fmt::Debug for FTM1 {
908 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
909 f.debug_struct("FTM1").finish()
910 }
911}
912#[doc = "FlexTimer Module"]
913pub mod ftm1;
914#[doc = "FlexTimer Module"]
915pub struct FTM2 {
916 _marker: PhantomData<*const ()>,
917}
918unsafe impl Send for FTM2 {}
919impl FTM2 {
920 #[doc = r"Pointer to the register block"]
921 pub const PTR: *const ftm2::RegisterBlock = 0x4003_a000 as *const _;
922 #[doc = r"Return the pointer to the register block"]
923 #[inline(always)]
924 pub const fn ptr() -> *const ftm2::RegisterBlock {
925 Self::PTR
926 }
927}
928impl Deref for FTM2 {
929 type Target = ftm2::RegisterBlock;
930 #[inline(always)]
931 fn deref(&self) -> &Self::Target {
932 unsafe { &*Self::PTR }
933 }
934}
935impl core::fmt::Debug for FTM2 {
936 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
937 f.debug_struct("FTM2").finish()
938 }
939}
940#[doc = "FlexTimer Module"]
941pub mod ftm2;
942#[doc = "FlexTimer Module"]
943pub struct FTM3 {
944 _marker: PhantomData<*const ()>,
945}
946unsafe impl Send for FTM3 {}
947impl FTM3 {
948 #[doc = r"Pointer to the register block"]
949 pub const PTR: *const ftm3::RegisterBlock = 0x4002_6000 as *const _;
950 #[doc = r"Return the pointer to the register block"]
951 #[inline(always)]
952 pub const fn ptr() -> *const ftm3::RegisterBlock {
953 Self::PTR
954 }
955}
956impl Deref for FTM3 {
957 type Target = ftm3::RegisterBlock;
958 #[inline(always)]
959 fn deref(&self) -> &Self::Target {
960 unsafe { &*Self::PTR }
961 }
962}
963impl core::fmt::Debug for FTM3 {
964 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
965 f.debug_struct("FTM3").finish()
966 }
967}
968#[doc = "FlexTimer Module"]
969pub mod ftm3;
970#[doc = "Analog-to-Digital Converter"]
971pub struct ADC0 {
972 _marker: PhantomData<*const ()>,
973}
974unsafe impl Send for ADC0 {}
975impl ADC0 {
976 #[doc = r"Pointer to the register block"]
977 pub const PTR: *const adc0::RegisterBlock = 0x4003_b000 as *const _;
978 #[doc = r"Return the pointer to the register block"]
979 #[inline(always)]
980 pub const fn ptr() -> *const adc0::RegisterBlock {
981 Self::PTR
982 }
983}
984impl Deref for ADC0 {
985 type Target = adc0::RegisterBlock;
986 #[inline(always)]
987 fn deref(&self) -> &Self::Target {
988 unsafe { &*Self::PTR }
989 }
990}
991impl core::fmt::Debug for ADC0 {
992 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
993 f.debug_struct("ADC0").finish()
994 }
995}
996#[doc = "Analog-to-Digital Converter"]
997pub mod adc0;
998#[doc = "Analog-to-Digital Converter"]
999pub struct ADC1 {
1000 _marker: PhantomData<*const ()>,
1001}
1002unsafe impl Send for ADC1 {}
1003impl ADC1 {
1004 #[doc = r"Pointer to the register block"]
1005 pub const PTR: *const adc1::RegisterBlock = 0x4002_7000 as *const _;
1006 #[doc = r"Return the pointer to the register block"]
1007 #[inline(always)]
1008 pub const fn ptr() -> *const adc1::RegisterBlock {
1009 Self::PTR
1010 }
1011}
1012impl Deref for ADC1 {
1013 type Target = adc1::RegisterBlock;
1014 #[inline(always)]
1015 fn deref(&self) -> &Self::Target {
1016 unsafe { &*Self::PTR }
1017 }
1018}
1019impl core::fmt::Debug for ADC1 {
1020 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1021 f.debug_struct("ADC1").finish()
1022 }
1023}
1024#[doc = "Analog-to-Digital Converter"]
1025pub mod adc1;
1026#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1027pub struct LPSPI0 {
1028 _marker: PhantomData<*const ()>,
1029}
1030unsafe impl Send for LPSPI0 {}
1031impl LPSPI0 {
1032 #[doc = r"Pointer to the register block"]
1033 pub const PTR: *const lpspi0::RegisterBlock = 0x4002_c000 as *const _;
1034 #[doc = r"Return the pointer to the register block"]
1035 #[inline(always)]
1036 pub const fn ptr() -> *const lpspi0::RegisterBlock {
1037 Self::PTR
1038 }
1039}
1040impl Deref for LPSPI0 {
1041 type Target = lpspi0::RegisterBlock;
1042 #[inline(always)]
1043 fn deref(&self) -> &Self::Target {
1044 unsafe { &*Self::PTR }
1045 }
1046}
1047impl core::fmt::Debug for LPSPI0 {
1048 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1049 f.debug_struct("LPSPI0").finish()
1050 }
1051}
1052#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1053pub mod lpspi0;
1054#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1055pub struct LPSPI1 {
1056 _marker: PhantomData<*const ()>,
1057}
1058unsafe impl Send for LPSPI1 {}
1059impl LPSPI1 {
1060 #[doc = r"Pointer to the register block"]
1061 pub const PTR: *const lpspi1::RegisterBlock = 0x4002_d000 as *const _;
1062 #[doc = r"Return the pointer to the register block"]
1063 #[inline(always)]
1064 pub const fn ptr() -> *const lpspi1::RegisterBlock {
1065 Self::PTR
1066 }
1067}
1068impl Deref for LPSPI1 {
1069 type Target = lpspi1::RegisterBlock;
1070 #[inline(always)]
1071 fn deref(&self) -> &Self::Target {
1072 unsafe { &*Self::PTR }
1073 }
1074}
1075impl core::fmt::Debug for LPSPI1 {
1076 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1077 f.debug_struct("LPSPI1").finish()
1078 }
1079}
1080#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1081pub mod lpspi1;
1082#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1083pub struct LPSPI2 {
1084 _marker: PhantomData<*const ()>,
1085}
1086unsafe impl Send for LPSPI2 {}
1087impl LPSPI2 {
1088 #[doc = r"Pointer to the register block"]
1089 pub const PTR: *const lpspi2::RegisterBlock = 0x4002_e000 as *const _;
1090 #[doc = r"Return the pointer to the register block"]
1091 #[inline(always)]
1092 pub const fn ptr() -> *const lpspi2::RegisterBlock {
1093 Self::PTR
1094 }
1095}
1096impl Deref for LPSPI2 {
1097 type Target = lpspi2::RegisterBlock;
1098 #[inline(always)]
1099 fn deref(&self) -> &Self::Target {
1100 unsafe { &*Self::PTR }
1101 }
1102}
1103impl core::fmt::Debug for LPSPI2 {
1104 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1105 f.debug_struct("LPSPI2").finish()
1106 }
1107}
1108#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1109pub mod lpspi2;
1110#[doc = "Programmable Delay Block"]
1111pub struct PDB0 {
1112 _marker: PhantomData<*const ()>,
1113}
1114unsafe impl Send for PDB0 {}
1115impl PDB0 {
1116 #[doc = r"Pointer to the register block"]
1117 pub const PTR: *const pdb0::RegisterBlock = 0x4003_6000 as *const _;
1118 #[doc = r"Return the pointer to the register block"]
1119 #[inline(always)]
1120 pub const fn ptr() -> *const pdb0::RegisterBlock {
1121 Self::PTR
1122 }
1123}
1124impl Deref for PDB0 {
1125 type Target = pdb0::RegisterBlock;
1126 #[inline(always)]
1127 fn deref(&self) -> &Self::Target {
1128 unsafe { &*Self::PTR }
1129 }
1130}
1131impl core::fmt::Debug for PDB0 {
1132 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1133 f.debug_struct("PDB0").finish()
1134 }
1135}
1136#[doc = "Programmable Delay Block"]
1137pub mod pdb0;
1138#[doc = "Programmable Delay Block"]
1139pub struct PDB1 {
1140 _marker: PhantomData<*const ()>,
1141}
1142unsafe impl Send for PDB1 {}
1143impl PDB1 {
1144 #[doc = r"Pointer to the register block"]
1145 pub const PTR: *const pdb1::RegisterBlock = 0x4003_1000 as *const _;
1146 #[doc = r"Return the pointer to the register block"]
1147 #[inline(always)]
1148 pub const fn ptr() -> *const pdb1::RegisterBlock {
1149 Self::PTR
1150 }
1151}
1152impl Deref for PDB1 {
1153 type Target = pdb1::RegisterBlock;
1154 #[inline(always)]
1155 fn deref(&self) -> &Self::Target {
1156 unsafe { &*Self::PTR }
1157 }
1158}
1159impl core::fmt::Debug for PDB1 {
1160 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1161 f.debug_struct("PDB1").finish()
1162 }
1163}
1164#[doc = "Programmable Delay Block"]
1165pub mod pdb1;
1166#[doc = "Cyclic Redundancy Check"]
1167pub struct CRC {
1168 _marker: PhantomData<*const ()>,
1169}
1170unsafe impl Send for CRC {}
1171impl CRC {
1172 #[doc = r"Pointer to the register block"]
1173 pub const PTR: *const crc::RegisterBlock = 0x4003_2000 as *const _;
1174 #[doc = r"Return the pointer to the register block"]
1175 #[inline(always)]
1176 pub const fn ptr() -> *const crc::RegisterBlock {
1177 Self::PTR
1178 }
1179}
1180impl Deref for CRC {
1181 type Target = crc::RegisterBlock;
1182 #[inline(always)]
1183 fn deref(&self) -> &Self::Target {
1184 unsafe { &*Self::PTR }
1185 }
1186}
1187impl core::fmt::Debug for CRC {
1188 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1189 f.debug_struct("CRC").finish()
1190 }
1191}
1192#[doc = "Cyclic Redundancy Check"]
1193pub mod crc;
1194#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
1195pub struct LPIT0 {
1196 _marker: PhantomData<*const ()>,
1197}
1198unsafe impl Send for LPIT0 {}
1199impl LPIT0 {
1200 #[doc = r"Pointer to the register block"]
1201 pub const PTR: *const lpit0::RegisterBlock = 0x4003_7000 as *const _;
1202 #[doc = r"Return the pointer to the register block"]
1203 #[inline(always)]
1204 pub const fn ptr() -> *const lpit0::RegisterBlock {
1205 Self::PTR
1206 }
1207}
1208impl Deref for LPIT0 {
1209 type Target = lpit0::RegisterBlock;
1210 #[inline(always)]
1211 fn deref(&self) -> &Self::Target {
1212 unsafe { &*Self::PTR }
1213 }
1214}
1215impl core::fmt::Debug for LPIT0 {
1216 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1217 f.debug_struct("LPIT0").finish()
1218 }
1219}
1220#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
1221pub mod lpit0;
1222#[doc = "Secure Real Time Clock"]
1223pub struct RTC {
1224 _marker: PhantomData<*const ()>,
1225}
1226unsafe impl Send for RTC {}
1227impl RTC {
1228 #[doc = r"Pointer to the register block"]
1229 pub const PTR: *const rtc::RegisterBlock = 0x4003_d000 as *const _;
1230 #[doc = r"Return the pointer to the register block"]
1231 #[inline(always)]
1232 pub const fn ptr() -> *const rtc::RegisterBlock {
1233 Self::PTR
1234 }
1235}
1236impl Deref for RTC {
1237 type Target = rtc::RegisterBlock;
1238 #[inline(always)]
1239 fn deref(&self) -> &Self::Target {
1240 unsafe { &*Self::PTR }
1241 }
1242}
1243impl core::fmt::Debug for RTC {
1244 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1245 f.debug_struct("RTC").finish()
1246 }
1247}
1248#[doc = "Secure Real Time Clock"]
1249pub mod rtc;
1250#[doc = "Low Power Timer"]
1251pub struct LPTMR0 {
1252 _marker: PhantomData<*const ()>,
1253}
1254unsafe impl Send for LPTMR0 {}
1255impl LPTMR0 {
1256 #[doc = r"Pointer to the register block"]
1257 pub const PTR: *const lptmr0::RegisterBlock = 0x4004_0000 as *const _;
1258 #[doc = r"Return the pointer to the register block"]
1259 #[inline(always)]
1260 pub const fn ptr() -> *const lptmr0::RegisterBlock {
1261 Self::PTR
1262 }
1263}
1264impl Deref for LPTMR0 {
1265 type Target = lptmr0::RegisterBlock;
1266 #[inline(always)]
1267 fn deref(&self) -> &Self::Target {
1268 unsafe { &*Self::PTR }
1269 }
1270}
1271impl core::fmt::Debug for LPTMR0 {
1272 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1273 f.debug_struct("LPTMR0").finish()
1274 }
1275}
1276#[doc = "Low Power Timer"]
1277pub mod lptmr0;
1278#[doc = "System Integration Module"]
1279pub struct SIM {
1280 _marker: PhantomData<*const ()>,
1281}
1282unsafe impl Send for SIM {}
1283impl SIM {
1284 #[doc = r"Pointer to the register block"]
1285 pub const PTR: *const sim::RegisterBlock = 0x4004_8000 as *const _;
1286 #[doc = r"Return the pointer to the register block"]
1287 #[inline(always)]
1288 pub const fn ptr() -> *const sim::RegisterBlock {
1289 Self::PTR
1290 }
1291}
1292impl Deref for SIM {
1293 type Target = sim::RegisterBlock;
1294 #[inline(always)]
1295 fn deref(&self) -> &Self::Target {
1296 unsafe { &*Self::PTR }
1297 }
1298}
1299impl core::fmt::Debug for SIM {
1300 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1301 f.debug_struct("SIM").finish()
1302 }
1303}
1304#[doc = "System Integration Module"]
1305pub mod sim;
1306#[doc = "Pin Control and Interrupts"]
1307pub struct PORTA {
1308 _marker: PhantomData<*const ()>,
1309}
1310unsafe impl Send for PORTA {}
1311impl PORTA {
1312 #[doc = r"Pointer to the register block"]
1313 pub const PTR: *const porta::RegisterBlock = 0x4004_9000 as *const _;
1314 #[doc = r"Return the pointer to the register block"]
1315 #[inline(always)]
1316 pub const fn ptr() -> *const porta::RegisterBlock {
1317 Self::PTR
1318 }
1319}
1320impl Deref for PORTA {
1321 type Target = porta::RegisterBlock;
1322 #[inline(always)]
1323 fn deref(&self) -> &Self::Target {
1324 unsafe { &*Self::PTR }
1325 }
1326}
1327impl core::fmt::Debug for PORTA {
1328 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1329 f.debug_struct("PORTA").finish()
1330 }
1331}
1332#[doc = "Pin Control and Interrupts"]
1333pub mod porta;
1334#[doc = "Pin Control and Interrupts"]
1335pub struct PORTB {
1336 _marker: PhantomData<*const ()>,
1337}
1338unsafe impl Send for PORTB {}
1339impl PORTB {
1340 #[doc = r"Pointer to the register block"]
1341 pub const PTR: *const portb::RegisterBlock = 0x4004_a000 as *const _;
1342 #[doc = r"Return the pointer to the register block"]
1343 #[inline(always)]
1344 pub const fn ptr() -> *const portb::RegisterBlock {
1345 Self::PTR
1346 }
1347}
1348impl Deref for PORTB {
1349 type Target = portb::RegisterBlock;
1350 #[inline(always)]
1351 fn deref(&self) -> &Self::Target {
1352 unsafe { &*Self::PTR }
1353 }
1354}
1355impl core::fmt::Debug for PORTB {
1356 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1357 f.debug_struct("PORTB").finish()
1358 }
1359}
1360#[doc = "Pin Control and Interrupts"]
1361pub mod portb;
1362#[doc = "Pin Control and Interrupts"]
1363pub struct PORTC {
1364 _marker: PhantomData<*const ()>,
1365}
1366unsafe impl Send for PORTC {}
1367impl PORTC {
1368 #[doc = r"Pointer to the register block"]
1369 pub const PTR: *const portc::RegisterBlock = 0x4004_b000 as *const _;
1370 #[doc = r"Return the pointer to the register block"]
1371 #[inline(always)]
1372 pub const fn ptr() -> *const portc::RegisterBlock {
1373 Self::PTR
1374 }
1375}
1376impl Deref for PORTC {
1377 type Target = portc::RegisterBlock;
1378 #[inline(always)]
1379 fn deref(&self) -> &Self::Target {
1380 unsafe { &*Self::PTR }
1381 }
1382}
1383impl core::fmt::Debug for PORTC {
1384 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1385 f.debug_struct("PORTC").finish()
1386 }
1387}
1388#[doc = "Pin Control and Interrupts"]
1389pub mod portc;
1390#[doc = "Pin Control and Interrupts"]
1391pub struct PORTD {
1392 _marker: PhantomData<*const ()>,
1393}
1394unsafe impl Send for PORTD {}
1395impl PORTD {
1396 #[doc = r"Pointer to the register block"]
1397 pub const PTR: *const portd::RegisterBlock = 0x4004_c000 as *const _;
1398 #[doc = r"Return the pointer to the register block"]
1399 #[inline(always)]
1400 pub const fn ptr() -> *const portd::RegisterBlock {
1401 Self::PTR
1402 }
1403}
1404impl Deref for PORTD {
1405 type Target = portd::RegisterBlock;
1406 #[inline(always)]
1407 fn deref(&self) -> &Self::Target {
1408 unsafe { &*Self::PTR }
1409 }
1410}
1411impl core::fmt::Debug for PORTD {
1412 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1413 f.debug_struct("PORTD").finish()
1414 }
1415}
1416#[doc = "Pin Control and Interrupts"]
1417pub mod portd;
1418#[doc = "Pin Control and Interrupts"]
1419pub struct PORTE {
1420 _marker: PhantomData<*const ()>,
1421}
1422unsafe impl Send for PORTE {}
1423impl PORTE {
1424 #[doc = r"Pointer to the register block"]
1425 pub const PTR: *const porte::RegisterBlock = 0x4004_d000 as *const _;
1426 #[doc = r"Return the pointer to the register block"]
1427 #[inline(always)]
1428 pub const fn ptr() -> *const porte::RegisterBlock {
1429 Self::PTR
1430 }
1431}
1432impl Deref for PORTE {
1433 type Target = porte::RegisterBlock;
1434 #[inline(always)]
1435 fn deref(&self) -> &Self::Target {
1436 unsafe { &*Self::PTR }
1437 }
1438}
1439impl core::fmt::Debug for PORTE {
1440 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1441 f.debug_struct("PORTE").finish()
1442 }
1443}
1444#[doc = "Pin Control and Interrupts"]
1445pub mod porte;
1446#[doc = "Watchdog timer"]
1447pub struct WDOG {
1448 _marker: PhantomData<*const ()>,
1449}
1450unsafe impl Send for WDOG {}
1451impl WDOG {
1452 #[doc = r"Pointer to the register block"]
1453 pub const PTR: *const wdog::RegisterBlock = 0x4005_2000 as *const _;
1454 #[doc = r"Return the pointer to the register block"]
1455 #[inline(always)]
1456 pub const fn ptr() -> *const wdog::RegisterBlock {
1457 Self::PTR
1458 }
1459}
1460impl Deref for WDOG {
1461 type Target = wdog::RegisterBlock;
1462 #[inline(always)]
1463 fn deref(&self) -> &Self::Target {
1464 unsafe { &*Self::PTR }
1465 }
1466}
1467impl core::fmt::Debug for WDOG {
1468 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1469 f.debug_struct("WDOG").finish()
1470 }
1471}
1472#[doc = "Watchdog timer"]
1473pub mod wdog;
1474#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1475pub struct FLEXIO {
1476 _marker: PhantomData<*const ()>,
1477}
1478unsafe impl Send for FLEXIO {}
1479impl FLEXIO {
1480 #[doc = r"Pointer to the register block"]
1481 pub const PTR: *const flexio::RegisterBlock = 0x4005_a000 as *const _;
1482 #[doc = r"Return the pointer to the register block"]
1483 #[inline(always)]
1484 pub const fn ptr() -> *const flexio::RegisterBlock {
1485 Self::PTR
1486 }
1487}
1488impl Deref for FLEXIO {
1489 type Target = flexio::RegisterBlock;
1490 #[inline(always)]
1491 fn deref(&self) -> &Self::Target {
1492 unsafe { &*Self::PTR }
1493 }
1494}
1495impl core::fmt::Debug for FLEXIO {
1496 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1497 f.debug_struct("FLEXIO").finish()
1498 }
1499}
1500#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1501pub mod flexio;
1502#[doc = "External Watchdog Monitor"]
1503pub struct EWM {
1504 _marker: PhantomData<*const ()>,
1505}
1506unsafe impl Send for EWM {}
1507impl EWM {
1508 #[doc = r"Pointer to the register block"]
1509 pub const PTR: *const ewm::RegisterBlock = 0x4006_1000 as *const _;
1510 #[doc = r"Return the pointer to the register block"]
1511 #[inline(always)]
1512 pub const fn ptr() -> *const ewm::RegisterBlock {
1513 Self::PTR
1514 }
1515}
1516impl Deref for EWM {
1517 type Target = ewm::RegisterBlock;
1518 #[inline(always)]
1519 fn deref(&self) -> &Self::Target {
1520 unsafe { &*Self::PTR }
1521 }
1522}
1523impl core::fmt::Debug for EWM {
1524 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1525 f.debug_struct("EWM").finish()
1526 }
1527}
1528#[doc = "External Watchdog Monitor"]
1529pub mod ewm;
1530#[doc = "TRGMUX"]
1531pub struct TRGMUX {
1532 _marker: PhantomData<*const ()>,
1533}
1534unsafe impl Send for TRGMUX {}
1535impl TRGMUX {
1536 #[doc = r"Pointer to the register block"]
1537 pub const PTR: *const trgmux::RegisterBlock = 0x4006_3000 as *const _;
1538 #[doc = r"Return the pointer to the register block"]
1539 #[inline(always)]
1540 pub const fn ptr() -> *const trgmux::RegisterBlock {
1541 Self::PTR
1542 }
1543}
1544impl Deref for TRGMUX {
1545 type Target = trgmux::RegisterBlock;
1546 #[inline(always)]
1547 fn deref(&self) -> &Self::Target {
1548 unsafe { &*Self::PTR }
1549 }
1550}
1551impl core::fmt::Debug for TRGMUX {
1552 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1553 f.debug_struct("TRGMUX").finish()
1554 }
1555}
1556#[doc = "TRGMUX"]
1557pub mod trgmux;
1558#[doc = "System Clock Generator"]
1559pub struct SCG {
1560 _marker: PhantomData<*const ()>,
1561}
1562unsafe impl Send for SCG {}
1563impl SCG {
1564 #[doc = r"Pointer to the register block"]
1565 pub const PTR: *const scg::RegisterBlock = 0x4006_4000 as *const _;
1566 #[doc = r"Return the pointer to the register block"]
1567 #[inline(always)]
1568 pub const fn ptr() -> *const scg::RegisterBlock {
1569 Self::PTR
1570 }
1571}
1572impl Deref for SCG {
1573 type Target = scg::RegisterBlock;
1574 #[inline(always)]
1575 fn deref(&self) -> &Self::Target {
1576 unsafe { &*Self::PTR }
1577 }
1578}
1579impl core::fmt::Debug for SCG {
1580 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1581 f.debug_struct("SCG").finish()
1582 }
1583}
1584#[doc = "System Clock Generator"]
1585pub mod scg;
1586#[doc = "PCC"]
1587pub struct PCC {
1588 _marker: PhantomData<*const ()>,
1589}
1590unsafe impl Send for PCC {}
1591impl PCC {
1592 #[doc = r"Pointer to the register block"]
1593 pub const PTR: *const pcc::RegisterBlock = 0x4006_5000 as *const _;
1594 #[doc = r"Return the pointer to the register block"]
1595 #[inline(always)]
1596 pub const fn ptr() -> *const pcc::RegisterBlock {
1597 Self::PTR
1598 }
1599}
1600impl Deref for PCC {
1601 type Target = pcc::RegisterBlock;
1602 #[inline(always)]
1603 fn deref(&self) -> &Self::Target {
1604 unsafe { &*Self::PTR }
1605 }
1606}
1607impl core::fmt::Debug for PCC {
1608 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1609 f.debug_struct("PCC").finish()
1610 }
1611}
1612#[doc = "PCC"]
1613pub mod pcc;
1614#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1615pub struct LPI2C0 {
1616 _marker: PhantomData<*const ()>,
1617}
1618unsafe impl Send for LPI2C0 {}
1619impl LPI2C0 {
1620 #[doc = r"Pointer to the register block"]
1621 pub const PTR: *const lpi2c0::RegisterBlock = 0x4006_6000 as *const _;
1622 #[doc = r"Return the pointer to the register block"]
1623 #[inline(always)]
1624 pub const fn ptr() -> *const lpi2c0::RegisterBlock {
1625 Self::PTR
1626 }
1627}
1628impl Deref for LPI2C0 {
1629 type Target = lpi2c0::RegisterBlock;
1630 #[inline(always)]
1631 fn deref(&self) -> &Self::Target {
1632 unsafe { &*Self::PTR }
1633 }
1634}
1635impl core::fmt::Debug for LPI2C0 {
1636 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1637 f.debug_struct("LPI2C0").finish()
1638 }
1639}
1640#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1641pub mod lpi2c0;
1642#[doc = "Universal Asynchronous Receiver/Transmitter"]
1643pub struct LPUART0 {
1644 _marker: PhantomData<*const ()>,
1645}
1646unsafe impl Send for LPUART0 {}
1647impl LPUART0 {
1648 #[doc = r"Pointer to the register block"]
1649 pub const PTR: *const lpuart0::RegisterBlock = 0x4006_a000 as *const _;
1650 #[doc = r"Return the pointer to the register block"]
1651 #[inline(always)]
1652 pub const fn ptr() -> *const lpuart0::RegisterBlock {
1653 Self::PTR
1654 }
1655}
1656impl Deref for LPUART0 {
1657 type Target = lpuart0::RegisterBlock;
1658 #[inline(always)]
1659 fn deref(&self) -> &Self::Target {
1660 unsafe { &*Self::PTR }
1661 }
1662}
1663impl core::fmt::Debug for LPUART0 {
1664 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1665 f.debug_struct("LPUART0").finish()
1666 }
1667}
1668#[doc = "Universal Asynchronous Receiver/Transmitter"]
1669pub mod lpuart0;
1670#[doc = "Universal Asynchronous Receiver/Transmitter"]
1671pub struct LPUART1 {
1672 _marker: PhantomData<*const ()>,
1673}
1674unsafe impl Send for LPUART1 {}
1675impl LPUART1 {
1676 #[doc = r"Pointer to the register block"]
1677 pub const PTR: *const lpuart1::RegisterBlock = 0x4006_b000 as *const _;
1678 #[doc = r"Return the pointer to the register block"]
1679 #[inline(always)]
1680 pub const fn ptr() -> *const lpuart1::RegisterBlock {
1681 Self::PTR
1682 }
1683}
1684impl Deref for LPUART1 {
1685 type Target = lpuart1::RegisterBlock;
1686 #[inline(always)]
1687 fn deref(&self) -> &Self::Target {
1688 unsafe { &*Self::PTR }
1689 }
1690}
1691impl core::fmt::Debug for LPUART1 {
1692 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1693 f.debug_struct("LPUART1").finish()
1694 }
1695}
1696#[doc = "Universal Asynchronous Receiver/Transmitter"]
1697pub mod lpuart1;
1698#[doc = "Universal Asynchronous Receiver/Transmitter"]
1699pub struct LPUART2 {
1700 _marker: PhantomData<*const ()>,
1701}
1702unsafe impl Send for LPUART2 {}
1703impl LPUART2 {
1704 #[doc = r"Pointer to the register block"]
1705 pub const PTR: *const lpuart2::RegisterBlock = 0x4006_c000 as *const _;
1706 #[doc = r"Return the pointer to the register block"]
1707 #[inline(always)]
1708 pub const fn ptr() -> *const lpuart2::RegisterBlock {
1709 Self::PTR
1710 }
1711}
1712impl Deref for LPUART2 {
1713 type Target = lpuart2::RegisterBlock;
1714 #[inline(always)]
1715 fn deref(&self) -> &Self::Target {
1716 unsafe { &*Self::PTR }
1717 }
1718}
1719impl core::fmt::Debug for LPUART2 {
1720 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1721 f.debug_struct("LPUART2").finish()
1722 }
1723}
1724#[doc = "Universal Asynchronous Receiver/Transmitter"]
1725pub mod lpuart2;
1726#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1727pub struct CMP0 {
1728 _marker: PhantomData<*const ()>,
1729}
1730unsafe impl Send for CMP0 {}
1731impl CMP0 {
1732 #[doc = r"Pointer to the register block"]
1733 pub const PTR: *const cmp0::RegisterBlock = 0x4007_3000 as *const _;
1734 #[doc = r"Return the pointer to the register block"]
1735 #[inline(always)]
1736 pub const fn ptr() -> *const cmp0::RegisterBlock {
1737 Self::PTR
1738 }
1739}
1740impl Deref for CMP0 {
1741 type Target = cmp0::RegisterBlock;
1742 #[inline(always)]
1743 fn deref(&self) -> &Self::Target {
1744 unsafe { &*Self::PTR }
1745 }
1746}
1747impl core::fmt::Debug for CMP0 {
1748 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1749 f.debug_struct("CMP0").finish()
1750 }
1751}
1752#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1753pub mod cmp0;
1754#[doc = "PMC"]
1755pub struct PMC {
1756 _marker: PhantomData<*const ()>,
1757}
1758unsafe impl Send for PMC {}
1759impl PMC {
1760 #[doc = r"Pointer to the register block"]
1761 pub const PTR: *const pmc::RegisterBlock = 0x4007_d000 as *const _;
1762 #[doc = r"Return the pointer to the register block"]
1763 #[inline(always)]
1764 pub const fn ptr() -> *const pmc::RegisterBlock {
1765 Self::PTR
1766 }
1767}
1768impl Deref for PMC {
1769 type Target = pmc::RegisterBlock;
1770 #[inline(always)]
1771 fn deref(&self) -> &Self::Target {
1772 unsafe { &*Self::PTR }
1773 }
1774}
1775impl core::fmt::Debug for PMC {
1776 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1777 f.debug_struct("PMC").finish()
1778 }
1779}
1780#[doc = "PMC"]
1781pub mod pmc;
1782#[doc = "System Mode Controller"]
1783pub struct SMC {
1784 _marker: PhantomData<*const ()>,
1785}
1786unsafe impl Send for SMC {}
1787impl SMC {
1788 #[doc = r"Pointer to the register block"]
1789 pub const PTR: *const smc::RegisterBlock = 0x4007_e000 as *const _;
1790 #[doc = r"Return the pointer to the register block"]
1791 #[inline(always)]
1792 pub const fn ptr() -> *const smc::RegisterBlock {
1793 Self::PTR
1794 }
1795}
1796impl Deref for SMC {
1797 type Target = smc::RegisterBlock;
1798 #[inline(always)]
1799 fn deref(&self) -> &Self::Target {
1800 unsafe { &*Self::PTR }
1801 }
1802}
1803impl core::fmt::Debug for SMC {
1804 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1805 f.debug_struct("SMC").finish()
1806 }
1807}
1808#[doc = "System Mode Controller"]
1809pub mod smc;
1810#[doc = "Reset Control Module"]
1811pub struct RCM {
1812 _marker: PhantomData<*const ()>,
1813}
1814unsafe impl Send for RCM {}
1815impl RCM {
1816 #[doc = r"Pointer to the register block"]
1817 pub const PTR: *const rcm::RegisterBlock = 0x4007_f000 as *const _;
1818 #[doc = r"Return the pointer to the register block"]
1819 #[inline(always)]
1820 pub const fn ptr() -> *const rcm::RegisterBlock {
1821 Self::PTR
1822 }
1823}
1824impl Deref for RCM {
1825 type Target = rcm::RegisterBlock;
1826 #[inline(always)]
1827 fn deref(&self) -> &Self::Target {
1828 unsafe { &*Self::PTR }
1829 }
1830}
1831impl core::fmt::Debug for RCM {
1832 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1833 f.debug_struct("RCM").finish()
1834 }
1835}
1836#[doc = "Reset Control Module"]
1837pub mod rcm;
1838#[doc = "General Purpose Input/Output"]
1839pub struct PTA {
1840 _marker: PhantomData<*const ()>,
1841}
1842unsafe impl Send for PTA {}
1843impl PTA {
1844 #[doc = r"Pointer to the register block"]
1845 pub const PTR: *const pta::RegisterBlock = 0x400f_f000 as *const _;
1846 #[doc = r"Return the pointer to the register block"]
1847 #[inline(always)]
1848 pub const fn ptr() -> *const pta::RegisterBlock {
1849 Self::PTR
1850 }
1851}
1852impl Deref for PTA {
1853 type Target = pta::RegisterBlock;
1854 #[inline(always)]
1855 fn deref(&self) -> &Self::Target {
1856 unsafe { &*Self::PTR }
1857 }
1858}
1859impl core::fmt::Debug for PTA {
1860 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1861 f.debug_struct("PTA").finish()
1862 }
1863}
1864#[doc = "General Purpose Input/Output"]
1865pub mod pta;
1866#[doc = "General Purpose Input/Output"]
1867pub struct PTB {
1868 _marker: PhantomData<*const ()>,
1869}
1870unsafe impl Send for PTB {}
1871impl PTB {
1872 #[doc = r"Pointer to the register block"]
1873 pub const PTR: *const ptb::RegisterBlock = 0x400f_f040 as *const _;
1874 #[doc = r"Return the pointer to the register block"]
1875 #[inline(always)]
1876 pub const fn ptr() -> *const ptb::RegisterBlock {
1877 Self::PTR
1878 }
1879}
1880impl Deref for PTB {
1881 type Target = ptb::RegisterBlock;
1882 #[inline(always)]
1883 fn deref(&self) -> &Self::Target {
1884 unsafe { &*Self::PTR }
1885 }
1886}
1887impl core::fmt::Debug for PTB {
1888 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1889 f.debug_struct("PTB").finish()
1890 }
1891}
1892#[doc = "General Purpose Input/Output"]
1893pub mod ptb;
1894#[doc = "General Purpose Input/Output"]
1895pub struct PTC {
1896 _marker: PhantomData<*const ()>,
1897}
1898unsafe impl Send for PTC {}
1899impl PTC {
1900 #[doc = r"Pointer to the register block"]
1901 pub const PTR: *const ptc::RegisterBlock = 0x400f_f080 as *const _;
1902 #[doc = r"Return the pointer to the register block"]
1903 #[inline(always)]
1904 pub const fn ptr() -> *const ptc::RegisterBlock {
1905 Self::PTR
1906 }
1907}
1908impl Deref for PTC {
1909 type Target = ptc::RegisterBlock;
1910 #[inline(always)]
1911 fn deref(&self) -> &Self::Target {
1912 unsafe { &*Self::PTR }
1913 }
1914}
1915impl core::fmt::Debug for PTC {
1916 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1917 f.debug_struct("PTC").finish()
1918 }
1919}
1920#[doc = "General Purpose Input/Output"]
1921pub mod ptc;
1922#[doc = "General Purpose Input/Output"]
1923pub struct PTD {
1924 _marker: PhantomData<*const ()>,
1925}
1926unsafe impl Send for PTD {}
1927impl PTD {
1928 #[doc = r"Pointer to the register block"]
1929 pub const PTR: *const ptd::RegisterBlock = 0x400f_f0c0 as *const _;
1930 #[doc = r"Return the pointer to the register block"]
1931 #[inline(always)]
1932 pub const fn ptr() -> *const ptd::RegisterBlock {
1933 Self::PTR
1934 }
1935}
1936impl Deref for PTD {
1937 type Target = ptd::RegisterBlock;
1938 #[inline(always)]
1939 fn deref(&self) -> &Self::Target {
1940 unsafe { &*Self::PTR }
1941 }
1942}
1943impl core::fmt::Debug for PTD {
1944 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1945 f.debug_struct("PTD").finish()
1946 }
1947}
1948#[doc = "General Purpose Input/Output"]
1949pub mod ptd;
1950#[doc = "General Purpose Input/Output"]
1951pub struct PTE {
1952 _marker: PhantomData<*const ()>,
1953}
1954unsafe impl Send for PTE {}
1955impl PTE {
1956 #[doc = r"Pointer to the register block"]
1957 pub const PTR: *const pte::RegisterBlock = 0x400f_f100 as *const _;
1958 #[doc = r"Return the pointer to the register block"]
1959 #[inline(always)]
1960 pub const fn ptr() -> *const pte::RegisterBlock {
1961 Self::PTR
1962 }
1963}
1964impl Deref for PTE {
1965 type Target = pte::RegisterBlock;
1966 #[inline(always)]
1967 fn deref(&self) -> &Self::Target {
1968 unsafe { &*Self::PTR }
1969 }
1970}
1971impl core::fmt::Debug for PTE {
1972 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1973 f.debug_struct("PTE").finish()
1974 }
1975}
1976#[doc = "General Purpose Input/Output"]
1977pub mod pte;
1978#[doc = "System Control Registers"]
1979pub struct S32_SCB {
1980 _marker: PhantomData<*const ()>,
1981}
1982unsafe impl Send for S32_SCB {}
1983impl S32_SCB {
1984 #[doc = r"Pointer to the register block"]
1985 pub const PTR: *const s32_scb::RegisterBlock = 0xe000_e000 as *const _;
1986 #[doc = r"Return the pointer to the register block"]
1987 #[inline(always)]
1988 pub const fn ptr() -> *const s32_scb::RegisterBlock {
1989 Self::PTR
1990 }
1991}
1992impl Deref for S32_SCB {
1993 type Target = s32_scb::RegisterBlock;
1994 #[inline(always)]
1995 fn deref(&self) -> &Self::Target {
1996 unsafe { &*Self::PTR }
1997 }
1998}
1999impl core::fmt::Debug for S32_SCB {
2000 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2001 f.debug_struct("S32_SCB").finish()
2002 }
2003}
2004#[doc = "System Control Registers"]
2005pub mod s32_scb;
2006#[doc = "System timer"]
2007pub struct S32_SYSTICK {
2008 _marker: PhantomData<*const ()>,
2009}
2010unsafe impl Send for S32_SYSTICK {}
2011impl S32_SYSTICK {
2012 #[doc = r"Pointer to the register block"]
2013 pub const PTR: *const s32_sys_tick::RegisterBlock = 0xe000_e010 as *const _;
2014 #[doc = r"Return the pointer to the register block"]
2015 #[inline(always)]
2016 pub const fn ptr() -> *const s32_sys_tick::RegisterBlock {
2017 Self::PTR
2018 }
2019}
2020impl Deref for S32_SYSTICK {
2021 type Target = s32_sys_tick::RegisterBlock;
2022 #[inline(always)]
2023 fn deref(&self) -> &Self::Target {
2024 unsafe { &*Self::PTR }
2025 }
2026}
2027impl core::fmt::Debug for S32_SYSTICK {
2028 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2029 f.debug_struct("S32_SYSTICK").finish()
2030 }
2031}
2032#[doc = "System timer"]
2033pub mod s32_sys_tick;
2034#[doc = "Nested Vectored Interrupt Controller"]
2035pub struct S32_NVIC {
2036 _marker: PhantomData<*const ()>,
2037}
2038unsafe impl Send for S32_NVIC {}
2039impl S32_NVIC {
2040 #[doc = r"Pointer to the register block"]
2041 pub const PTR: *const s32_nvic::RegisterBlock = 0xe000_e100 as *const _;
2042 #[doc = r"Return the pointer to the register block"]
2043 #[inline(always)]
2044 pub const fn ptr() -> *const s32_nvic::RegisterBlock {
2045 Self::PTR
2046 }
2047}
2048impl Deref for S32_NVIC {
2049 type Target = s32_nvic::RegisterBlock;
2050 #[inline(always)]
2051 fn deref(&self) -> &Self::Target {
2052 unsafe { &*Self::PTR }
2053 }
2054}
2055impl core::fmt::Debug for S32_NVIC {
2056 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2057 f.debug_struct("S32_NVIC").finish()
2058 }
2059}
2060#[doc = "Nested Vectored Interrupt Controller"]
2061pub mod s32_nvic;
2062#[doc = "Core Platform Miscellaneous Control Module"]
2063pub struct MCM {
2064 _marker: PhantomData<*const ()>,
2065}
2066unsafe impl Send for MCM {}
2067impl MCM {
2068 #[doc = r"Pointer to the register block"]
2069 pub const PTR: *const mcm::RegisterBlock = 0xe008_0000 as *const _;
2070 #[doc = r"Return the pointer to the register block"]
2071 #[inline(always)]
2072 pub const fn ptr() -> *const mcm::RegisterBlock {
2073 Self::PTR
2074 }
2075}
2076impl Deref for MCM {
2077 type Target = mcm::RegisterBlock;
2078 #[inline(always)]
2079 fn deref(&self) -> &Self::Target {
2080 unsafe { &*Self::PTR }
2081 }
2082}
2083impl core::fmt::Debug for MCM {
2084 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2085 f.debug_struct("MCM").finish()
2086 }
2087}
2088#[doc = "Core Platform Miscellaneous Control Module"]
2089pub mod mcm;
2090#[doc = "Local Memory Controller"]
2091pub struct LMEM {
2092 _marker: PhantomData<*const ()>,
2093}
2094unsafe impl Send for LMEM {}
2095impl LMEM {
2096 #[doc = r"Pointer to the register block"]
2097 pub const PTR: *const lmem::RegisterBlock = 0xe008_2000 as *const _;
2098 #[doc = r"Return the pointer to the register block"]
2099 #[inline(always)]
2100 pub const fn ptr() -> *const lmem::RegisterBlock {
2101 Self::PTR
2102 }
2103}
2104impl Deref for LMEM {
2105 type Target = lmem::RegisterBlock;
2106 #[inline(always)]
2107 fn deref(&self) -> &Self::Target {
2108 unsafe { &*Self::PTR }
2109 }
2110}
2111impl core::fmt::Debug for LMEM {
2112 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2113 f.debug_struct("LMEM").finish()
2114 }
2115}
2116#[doc = "Local Memory Controller"]
2117pub mod lmem;
2118#[no_mangle]
2119static mut DEVICE_PERIPHERALS: bool = false;
2120#[doc = r"All the peripherals"]
2121#[allow(non_snake_case)]
2122pub struct Peripherals {
2123 #[doc = "CSE_PRAM"]
2124 pub CSE_PRAM: CSE_PRAM,
2125 #[doc = "AIPS"]
2126 pub AIPS: AIPS,
2127 #[doc = "MSCM"]
2128 pub MSCM: MSCM,
2129 #[doc = "DMA"]
2130 pub DMA: DMA,
2131 #[doc = "ERM"]
2132 pub ERM: ERM,
2133 #[doc = "EIM"]
2134 pub EIM: EIM,
2135 #[doc = "FTFC"]
2136 pub FTFC: FTFC,
2137 #[doc = "DMAMUX"]
2138 pub DMAMUX: DMAMUX,
2139 #[doc = "CAN0"]
2140 pub CAN0: CAN0,
2141 #[doc = "CAN1"]
2142 pub CAN1: CAN1,
2143 #[doc = "CAN2"]
2144 pub CAN2: CAN2,
2145 #[doc = "FTM0"]
2146 pub FTM0: FTM0,
2147 #[doc = "FTM1"]
2148 pub FTM1: FTM1,
2149 #[doc = "FTM2"]
2150 pub FTM2: FTM2,
2151 #[doc = "FTM3"]
2152 pub FTM3: FTM3,
2153 #[doc = "ADC0"]
2154 pub ADC0: ADC0,
2155 #[doc = "ADC1"]
2156 pub ADC1: ADC1,
2157 #[doc = "LPSPI0"]
2158 pub LPSPI0: LPSPI0,
2159 #[doc = "LPSPI1"]
2160 pub LPSPI1: LPSPI1,
2161 #[doc = "LPSPI2"]
2162 pub LPSPI2: LPSPI2,
2163 #[doc = "PDB0"]
2164 pub PDB0: PDB0,
2165 #[doc = "PDB1"]
2166 pub PDB1: PDB1,
2167 #[doc = "CRC"]
2168 pub CRC: CRC,
2169 #[doc = "LPIT0"]
2170 pub LPIT0: LPIT0,
2171 #[doc = "RTC"]
2172 pub RTC: RTC,
2173 #[doc = "LPTMR0"]
2174 pub LPTMR0: LPTMR0,
2175 #[doc = "SIM"]
2176 pub SIM: SIM,
2177 #[doc = "PORTA"]
2178 pub PORTA: PORTA,
2179 #[doc = "PORTB"]
2180 pub PORTB: PORTB,
2181 #[doc = "PORTC"]
2182 pub PORTC: PORTC,
2183 #[doc = "PORTD"]
2184 pub PORTD: PORTD,
2185 #[doc = "PORTE"]
2186 pub PORTE: PORTE,
2187 #[doc = "WDOG"]
2188 pub WDOG: WDOG,
2189 #[doc = "FLEXIO"]
2190 pub FLEXIO: FLEXIO,
2191 #[doc = "EWM"]
2192 pub EWM: EWM,
2193 #[doc = "TRGMUX"]
2194 pub TRGMUX: TRGMUX,
2195 #[doc = "SCG"]
2196 pub SCG: SCG,
2197 #[doc = "PCC"]
2198 pub PCC: PCC,
2199 #[doc = "LPI2C0"]
2200 pub LPI2C0: LPI2C0,
2201 #[doc = "LPUART0"]
2202 pub LPUART0: LPUART0,
2203 #[doc = "LPUART1"]
2204 pub LPUART1: LPUART1,
2205 #[doc = "LPUART2"]
2206 pub LPUART2: LPUART2,
2207 #[doc = "CMP0"]
2208 pub CMP0: CMP0,
2209 #[doc = "PMC"]
2210 pub PMC: PMC,
2211 #[doc = "SMC"]
2212 pub SMC: SMC,
2213 #[doc = "RCM"]
2214 pub RCM: RCM,
2215 #[doc = "PTA"]
2216 pub PTA: PTA,
2217 #[doc = "PTB"]
2218 pub PTB: PTB,
2219 #[doc = "PTC"]
2220 pub PTC: PTC,
2221 #[doc = "PTD"]
2222 pub PTD: PTD,
2223 #[doc = "PTE"]
2224 pub PTE: PTE,
2225 #[doc = "S32_SCB"]
2226 pub S32_SCB: S32_SCB,
2227 #[doc = "S32_SYSTICK"]
2228 pub S32_SYSTICK: S32_SYSTICK,
2229 #[doc = "S32_NVIC"]
2230 pub S32_NVIC: S32_NVIC,
2231 #[doc = "MCM"]
2232 pub MCM: MCM,
2233 #[doc = "LMEM"]
2234 pub LMEM: LMEM,
2235}
2236impl Peripherals {
2237 #[doc = r"Returns all the peripherals *once*"]
2238 #[inline]
2239 pub fn take() -> Option<Self> {
2240 cortex_m::interrupt::free(|_| {
2241 if unsafe { DEVICE_PERIPHERALS } {
2242 None
2243 } else {
2244 Some(unsafe { Peripherals::steal() })
2245 }
2246 })
2247 }
2248 #[doc = r"Unchecked version of `Peripherals::take`"]
2249 #[inline]
2250 pub unsafe fn steal() -> Self {
2251 DEVICE_PERIPHERALS = true;
2252 Peripherals {
2253 CSE_PRAM: CSE_PRAM {
2254 _marker: PhantomData,
2255 },
2256 AIPS: AIPS {
2257 _marker: PhantomData,
2258 },
2259 MSCM: MSCM {
2260 _marker: PhantomData,
2261 },
2262 DMA: DMA {
2263 _marker: PhantomData,
2264 },
2265 ERM: ERM {
2266 _marker: PhantomData,
2267 },
2268 EIM: EIM {
2269 _marker: PhantomData,
2270 },
2271 FTFC: FTFC {
2272 _marker: PhantomData,
2273 },
2274 DMAMUX: DMAMUX {
2275 _marker: PhantomData,
2276 },
2277 CAN0: CAN0 {
2278 _marker: PhantomData,
2279 },
2280 CAN1: CAN1 {
2281 _marker: PhantomData,
2282 },
2283 CAN2: CAN2 {
2284 _marker: PhantomData,
2285 },
2286 FTM0: FTM0 {
2287 _marker: PhantomData,
2288 },
2289 FTM1: FTM1 {
2290 _marker: PhantomData,
2291 },
2292 FTM2: FTM2 {
2293 _marker: PhantomData,
2294 },
2295 FTM3: FTM3 {
2296 _marker: PhantomData,
2297 },
2298 ADC0: ADC0 {
2299 _marker: PhantomData,
2300 },
2301 ADC1: ADC1 {
2302 _marker: PhantomData,
2303 },
2304 LPSPI0: LPSPI0 {
2305 _marker: PhantomData,
2306 },
2307 LPSPI1: LPSPI1 {
2308 _marker: PhantomData,
2309 },
2310 LPSPI2: LPSPI2 {
2311 _marker: PhantomData,
2312 },
2313 PDB0: PDB0 {
2314 _marker: PhantomData,
2315 },
2316 PDB1: PDB1 {
2317 _marker: PhantomData,
2318 },
2319 CRC: CRC {
2320 _marker: PhantomData,
2321 },
2322 LPIT0: LPIT0 {
2323 _marker: PhantomData,
2324 },
2325 RTC: RTC {
2326 _marker: PhantomData,
2327 },
2328 LPTMR0: LPTMR0 {
2329 _marker: PhantomData,
2330 },
2331 SIM: SIM {
2332 _marker: PhantomData,
2333 },
2334 PORTA: PORTA {
2335 _marker: PhantomData,
2336 },
2337 PORTB: PORTB {
2338 _marker: PhantomData,
2339 },
2340 PORTC: PORTC {
2341 _marker: PhantomData,
2342 },
2343 PORTD: PORTD {
2344 _marker: PhantomData,
2345 },
2346 PORTE: PORTE {
2347 _marker: PhantomData,
2348 },
2349 WDOG: WDOG {
2350 _marker: PhantomData,
2351 },
2352 FLEXIO: FLEXIO {
2353 _marker: PhantomData,
2354 },
2355 EWM: EWM {
2356 _marker: PhantomData,
2357 },
2358 TRGMUX: TRGMUX {
2359 _marker: PhantomData,
2360 },
2361 SCG: SCG {
2362 _marker: PhantomData,
2363 },
2364 PCC: PCC {
2365 _marker: PhantomData,
2366 },
2367 LPI2C0: LPI2C0 {
2368 _marker: PhantomData,
2369 },
2370 LPUART0: LPUART0 {
2371 _marker: PhantomData,
2372 },
2373 LPUART1: LPUART1 {
2374 _marker: PhantomData,
2375 },
2376 LPUART2: LPUART2 {
2377 _marker: PhantomData,
2378 },
2379 CMP0: CMP0 {
2380 _marker: PhantomData,
2381 },
2382 PMC: PMC {
2383 _marker: PhantomData,
2384 },
2385 SMC: SMC {
2386 _marker: PhantomData,
2387 },
2388 RCM: RCM {
2389 _marker: PhantomData,
2390 },
2391 PTA: PTA {
2392 _marker: PhantomData,
2393 },
2394 PTB: PTB {
2395 _marker: PhantomData,
2396 },
2397 PTC: PTC {
2398 _marker: PhantomData,
2399 },
2400 PTD: PTD {
2401 _marker: PhantomData,
2402 },
2403 PTE: PTE {
2404 _marker: PhantomData,
2405 },
2406 S32_SCB: S32_SCB {
2407 _marker: PhantomData,
2408 },
2409 S32_SYSTICK: S32_SYSTICK {
2410 _marker: PhantomData,
2411 },
2412 S32_NVIC: S32_NVIC {
2413 _marker: PhantomData,
2414 },
2415 MCM: MCM {
2416 _marker: PhantomData,
2417 },
2418 LMEM: LMEM {
2419 _marker: PhantomData,
2420 },
2421 }
2422 }
2423}