1#[doc = "Register `COMBINE` reader"]
2pub struct R(crate::R<COMBINE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<COMBINE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<COMBINE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<COMBINE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `COMBINE` writer"]
17pub struct W(crate::W<COMBINE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<COMBINE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<COMBINE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<COMBINE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `COMBINE0` reader - Combine Channels For n = 0"]
38pub struct COMBINE0_R(crate::FieldReader<bool, bool>);
39impl COMBINE0_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: bool) -> Self {
42 COMBINE0_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for COMBINE0_R {
46 type Target = crate::FieldReader<bool, bool>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `COMBINE0` writer - Combine Channels For n = 0"]
53pub struct COMBINE0_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> COMBINE0_W<'a> {
57 #[doc = r"Sets the field bit"]
58 #[inline(always)]
59 pub fn set_bit(self) -> &'a mut W {
60 self.bit(true)
61 }
62 #[doc = r"Clears the field bit"]
63 #[inline(always)]
64 pub fn clear_bit(self) -> &'a mut W {
65 self.bit(false)
66 }
67 #[doc = r"Writes raw bits to the field"]
68 #[inline(always)]
69 pub fn bit(self, value: bool) -> &'a mut W {
70 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71 self.w
72 }
73}
74#[doc = "Complement Of Channel (n) For n = 0\n\nValue on reset: 0"]
75#[derive(Clone, Copy, Debug, PartialEq)]
76pub enum COMP0_A {
77 #[doc = "0: The channel (n+1) output is the same as the channel (n) output."]
78 _0 = 0,
79 #[doc = "1: The channel (n+1) output is the complement of the channel (n) output."]
80 _1 = 1,
81}
82impl From<COMP0_A> for bool {
83 #[inline(always)]
84 fn from(variant: COMP0_A) -> Self {
85 variant as u8 != 0
86 }
87}
88#[doc = "Field `COMP0` reader - Complement Of Channel (n) For n = 0"]
89pub struct COMP0_R(crate::FieldReader<bool, COMP0_A>);
90impl COMP0_R {
91 #[inline(always)]
92 pub(crate) fn new(bits: bool) -> Self {
93 COMP0_R(crate::FieldReader::new(bits))
94 }
95 #[doc = r"Get enumerated values variant"]
96 #[inline(always)]
97 pub fn variant(&self) -> COMP0_A {
98 match self.bits {
99 false => COMP0_A::_0,
100 true => COMP0_A::_1,
101 }
102 }
103 #[doc = "Checks if the value of the field is `_0`"]
104 #[inline(always)]
105 pub fn is_0(&self) -> bool {
106 **self == COMP0_A::_0
107 }
108 #[doc = "Checks if the value of the field is `_1`"]
109 #[inline(always)]
110 pub fn is_1(&self) -> bool {
111 **self == COMP0_A::_1
112 }
113}
114impl core::ops::Deref for COMP0_R {
115 type Target = crate::FieldReader<bool, COMP0_A>;
116 #[inline(always)]
117 fn deref(&self) -> &Self::Target {
118 &self.0
119 }
120}
121#[doc = "Field `COMP0` writer - Complement Of Channel (n) For n = 0"]
122pub struct COMP0_W<'a> {
123 w: &'a mut W,
124}
125impl<'a> COMP0_W<'a> {
126 #[doc = r"Writes `variant` to the field"]
127 #[inline(always)]
128 pub fn variant(self, variant: COMP0_A) -> &'a mut W {
129 self.bit(variant.into())
130 }
131 #[doc = "The channel (n+1) output is the same as the channel (n) output."]
132 #[inline(always)]
133 pub fn _0(self) -> &'a mut W {
134 self.variant(COMP0_A::_0)
135 }
136 #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
137 #[inline(always)]
138 pub fn _1(self) -> &'a mut W {
139 self.variant(COMP0_A::_1)
140 }
141 #[doc = r"Sets the field bit"]
142 #[inline(always)]
143 pub fn set_bit(self) -> &'a mut W {
144 self.bit(true)
145 }
146 #[doc = r"Clears the field bit"]
147 #[inline(always)]
148 pub fn clear_bit(self) -> &'a mut W {
149 self.bit(false)
150 }
151 #[doc = r"Writes raw bits to the field"]
152 #[inline(always)]
153 pub fn bit(self, value: bool) -> &'a mut W {
154 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
155 self.w
156 }
157}
158#[doc = "Field `DECAPEN0` reader - Dual Edge Capture Mode Enable For n = 0"]
159pub struct DECAPEN0_R(crate::FieldReader<bool, bool>);
160impl DECAPEN0_R {
161 #[inline(always)]
162 pub(crate) fn new(bits: bool) -> Self {
163 DECAPEN0_R(crate::FieldReader::new(bits))
164 }
165}
166impl core::ops::Deref for DECAPEN0_R {
167 type Target = crate::FieldReader<bool, bool>;
168 #[inline(always)]
169 fn deref(&self) -> &Self::Target {
170 &self.0
171 }
172}
173#[doc = "Field `DECAPEN0` writer - Dual Edge Capture Mode Enable For n = 0"]
174pub struct DECAPEN0_W<'a> {
175 w: &'a mut W,
176}
177impl<'a> DECAPEN0_W<'a> {
178 #[doc = r"Sets the field bit"]
179 #[inline(always)]
180 pub fn set_bit(self) -> &'a mut W {
181 self.bit(true)
182 }
183 #[doc = r"Clears the field bit"]
184 #[inline(always)]
185 pub fn clear_bit(self) -> &'a mut W {
186 self.bit(false)
187 }
188 #[doc = r"Writes raw bits to the field"]
189 #[inline(always)]
190 pub fn bit(self, value: bool) -> &'a mut W {
191 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
192 self.w
193 }
194}
195#[doc = "Dual Edge Capture Mode Captures For n = 0\n\nValue on reset: 0"]
196#[derive(Clone, Copy, Debug, PartialEq)]
197pub enum DECAP0_A {
198 #[doc = "0: The dual edge captures are inactive."]
199 _0 = 0,
200 #[doc = "1: The dual edge captures are active."]
201 _1 = 1,
202}
203impl From<DECAP0_A> for bool {
204 #[inline(always)]
205 fn from(variant: DECAP0_A) -> Self {
206 variant as u8 != 0
207 }
208}
209#[doc = "Field `DECAP0` reader - Dual Edge Capture Mode Captures For n = 0"]
210pub struct DECAP0_R(crate::FieldReader<bool, DECAP0_A>);
211impl DECAP0_R {
212 #[inline(always)]
213 pub(crate) fn new(bits: bool) -> Self {
214 DECAP0_R(crate::FieldReader::new(bits))
215 }
216 #[doc = r"Get enumerated values variant"]
217 #[inline(always)]
218 pub fn variant(&self) -> DECAP0_A {
219 match self.bits {
220 false => DECAP0_A::_0,
221 true => DECAP0_A::_1,
222 }
223 }
224 #[doc = "Checks if the value of the field is `_0`"]
225 #[inline(always)]
226 pub fn is_0(&self) -> bool {
227 **self == DECAP0_A::_0
228 }
229 #[doc = "Checks if the value of the field is `_1`"]
230 #[inline(always)]
231 pub fn is_1(&self) -> bool {
232 **self == DECAP0_A::_1
233 }
234}
235impl core::ops::Deref for DECAP0_R {
236 type Target = crate::FieldReader<bool, DECAP0_A>;
237 #[inline(always)]
238 fn deref(&self) -> &Self::Target {
239 &self.0
240 }
241}
242#[doc = "Field `DECAP0` writer - Dual Edge Capture Mode Captures For n = 0"]
243pub struct DECAP0_W<'a> {
244 w: &'a mut W,
245}
246impl<'a> DECAP0_W<'a> {
247 #[doc = r"Writes `variant` to the field"]
248 #[inline(always)]
249 pub fn variant(self, variant: DECAP0_A) -> &'a mut W {
250 self.bit(variant.into())
251 }
252 #[doc = "The dual edge captures are inactive."]
253 #[inline(always)]
254 pub fn _0(self) -> &'a mut W {
255 self.variant(DECAP0_A::_0)
256 }
257 #[doc = "The dual edge captures are active."]
258 #[inline(always)]
259 pub fn _1(self) -> &'a mut W {
260 self.variant(DECAP0_A::_1)
261 }
262 #[doc = r"Sets the field bit"]
263 #[inline(always)]
264 pub fn set_bit(self) -> &'a mut W {
265 self.bit(true)
266 }
267 #[doc = r"Clears the field bit"]
268 #[inline(always)]
269 pub fn clear_bit(self) -> &'a mut W {
270 self.bit(false)
271 }
272 #[doc = r"Writes raw bits to the field"]
273 #[inline(always)]
274 pub fn bit(self, value: bool) -> &'a mut W {
275 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
276 self.w
277 }
278}
279#[doc = "Deadtime Enable For n = 0\n\nValue on reset: 0"]
280#[derive(Clone, Copy, Debug, PartialEq)]
281pub enum DTEN0_A {
282 #[doc = "0: The deadtime insertion in this pair of channels is disabled."]
283 _0 = 0,
284 #[doc = "1: The deadtime insertion in this pair of channels is enabled."]
285 _1 = 1,
286}
287impl From<DTEN0_A> for bool {
288 #[inline(always)]
289 fn from(variant: DTEN0_A) -> Self {
290 variant as u8 != 0
291 }
292}
293#[doc = "Field `DTEN0` reader - Deadtime Enable For n = 0"]
294pub struct DTEN0_R(crate::FieldReader<bool, DTEN0_A>);
295impl DTEN0_R {
296 #[inline(always)]
297 pub(crate) fn new(bits: bool) -> Self {
298 DTEN0_R(crate::FieldReader::new(bits))
299 }
300 #[doc = r"Get enumerated values variant"]
301 #[inline(always)]
302 pub fn variant(&self) -> DTEN0_A {
303 match self.bits {
304 false => DTEN0_A::_0,
305 true => DTEN0_A::_1,
306 }
307 }
308 #[doc = "Checks if the value of the field is `_0`"]
309 #[inline(always)]
310 pub fn is_0(&self) -> bool {
311 **self == DTEN0_A::_0
312 }
313 #[doc = "Checks if the value of the field is `_1`"]
314 #[inline(always)]
315 pub fn is_1(&self) -> bool {
316 **self == DTEN0_A::_1
317 }
318}
319impl core::ops::Deref for DTEN0_R {
320 type Target = crate::FieldReader<bool, DTEN0_A>;
321 #[inline(always)]
322 fn deref(&self) -> &Self::Target {
323 &self.0
324 }
325}
326#[doc = "Field `DTEN0` writer - Deadtime Enable For n = 0"]
327pub struct DTEN0_W<'a> {
328 w: &'a mut W,
329}
330impl<'a> DTEN0_W<'a> {
331 #[doc = r"Writes `variant` to the field"]
332 #[inline(always)]
333 pub fn variant(self, variant: DTEN0_A) -> &'a mut W {
334 self.bit(variant.into())
335 }
336 #[doc = "The deadtime insertion in this pair of channels is disabled."]
337 #[inline(always)]
338 pub fn _0(self) -> &'a mut W {
339 self.variant(DTEN0_A::_0)
340 }
341 #[doc = "The deadtime insertion in this pair of channels is enabled."]
342 #[inline(always)]
343 pub fn _1(self) -> &'a mut W {
344 self.variant(DTEN0_A::_1)
345 }
346 #[doc = r"Sets the field bit"]
347 #[inline(always)]
348 pub fn set_bit(self) -> &'a mut W {
349 self.bit(true)
350 }
351 #[doc = r"Clears the field bit"]
352 #[inline(always)]
353 pub fn clear_bit(self) -> &'a mut W {
354 self.bit(false)
355 }
356 #[doc = r"Writes raw bits to the field"]
357 #[inline(always)]
358 pub fn bit(self, value: bool) -> &'a mut W {
359 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
360 self.w
361 }
362}
363#[doc = "Synchronization Enable For n = 0\n\nValue on reset: 0"]
364#[derive(Clone, Copy, Debug, PartialEq)]
365pub enum SYNCEN0_A {
366 #[doc = "0: The PWM synchronization in this pair of channels is disabled."]
367 _0 = 0,
368 #[doc = "1: The PWM synchronization in this pair of channels is enabled."]
369 _1 = 1,
370}
371impl From<SYNCEN0_A> for bool {
372 #[inline(always)]
373 fn from(variant: SYNCEN0_A) -> Self {
374 variant as u8 != 0
375 }
376}
377#[doc = "Field `SYNCEN0` reader - Synchronization Enable For n = 0"]
378pub struct SYNCEN0_R(crate::FieldReader<bool, SYNCEN0_A>);
379impl SYNCEN0_R {
380 #[inline(always)]
381 pub(crate) fn new(bits: bool) -> Self {
382 SYNCEN0_R(crate::FieldReader::new(bits))
383 }
384 #[doc = r"Get enumerated values variant"]
385 #[inline(always)]
386 pub fn variant(&self) -> SYNCEN0_A {
387 match self.bits {
388 false => SYNCEN0_A::_0,
389 true => SYNCEN0_A::_1,
390 }
391 }
392 #[doc = "Checks if the value of the field is `_0`"]
393 #[inline(always)]
394 pub fn is_0(&self) -> bool {
395 **self == SYNCEN0_A::_0
396 }
397 #[doc = "Checks if the value of the field is `_1`"]
398 #[inline(always)]
399 pub fn is_1(&self) -> bool {
400 **self == SYNCEN0_A::_1
401 }
402}
403impl core::ops::Deref for SYNCEN0_R {
404 type Target = crate::FieldReader<bool, SYNCEN0_A>;
405 #[inline(always)]
406 fn deref(&self) -> &Self::Target {
407 &self.0
408 }
409}
410#[doc = "Field `SYNCEN0` writer - Synchronization Enable For n = 0"]
411pub struct SYNCEN0_W<'a> {
412 w: &'a mut W,
413}
414impl<'a> SYNCEN0_W<'a> {
415 #[doc = r"Writes `variant` to the field"]
416 #[inline(always)]
417 pub fn variant(self, variant: SYNCEN0_A) -> &'a mut W {
418 self.bit(variant.into())
419 }
420 #[doc = "The PWM synchronization in this pair of channels is disabled."]
421 #[inline(always)]
422 pub fn _0(self) -> &'a mut W {
423 self.variant(SYNCEN0_A::_0)
424 }
425 #[doc = "The PWM synchronization in this pair of channels is enabled."]
426 #[inline(always)]
427 pub fn _1(self) -> &'a mut W {
428 self.variant(SYNCEN0_A::_1)
429 }
430 #[doc = r"Sets the field bit"]
431 #[inline(always)]
432 pub fn set_bit(self) -> &'a mut W {
433 self.bit(true)
434 }
435 #[doc = r"Clears the field bit"]
436 #[inline(always)]
437 pub fn clear_bit(self) -> &'a mut W {
438 self.bit(false)
439 }
440 #[doc = r"Writes raw bits to the field"]
441 #[inline(always)]
442 pub fn bit(self, value: bool) -> &'a mut W {
443 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
444 self.w
445 }
446}
447#[doc = "Fault Control Enable For n = 0\n\nValue on reset: 0"]
448#[derive(Clone, Copy, Debug, PartialEq)]
449pub enum FAULTEN0_A {
450 #[doc = "0: The fault control in this pair of channels is disabled."]
451 _0 = 0,
452 #[doc = "1: The fault control in this pair of channels is enabled."]
453 _1 = 1,
454}
455impl From<FAULTEN0_A> for bool {
456 #[inline(always)]
457 fn from(variant: FAULTEN0_A) -> Self {
458 variant as u8 != 0
459 }
460}
461#[doc = "Field `FAULTEN0` reader - Fault Control Enable For n = 0"]
462pub struct FAULTEN0_R(crate::FieldReader<bool, FAULTEN0_A>);
463impl FAULTEN0_R {
464 #[inline(always)]
465 pub(crate) fn new(bits: bool) -> Self {
466 FAULTEN0_R(crate::FieldReader::new(bits))
467 }
468 #[doc = r"Get enumerated values variant"]
469 #[inline(always)]
470 pub fn variant(&self) -> FAULTEN0_A {
471 match self.bits {
472 false => FAULTEN0_A::_0,
473 true => FAULTEN0_A::_1,
474 }
475 }
476 #[doc = "Checks if the value of the field is `_0`"]
477 #[inline(always)]
478 pub fn is_0(&self) -> bool {
479 **self == FAULTEN0_A::_0
480 }
481 #[doc = "Checks if the value of the field is `_1`"]
482 #[inline(always)]
483 pub fn is_1(&self) -> bool {
484 **self == FAULTEN0_A::_1
485 }
486}
487impl core::ops::Deref for FAULTEN0_R {
488 type Target = crate::FieldReader<bool, FAULTEN0_A>;
489 #[inline(always)]
490 fn deref(&self) -> &Self::Target {
491 &self.0
492 }
493}
494#[doc = "Field `FAULTEN0` writer - Fault Control Enable For n = 0"]
495pub struct FAULTEN0_W<'a> {
496 w: &'a mut W,
497}
498impl<'a> FAULTEN0_W<'a> {
499 #[doc = r"Writes `variant` to the field"]
500 #[inline(always)]
501 pub fn variant(self, variant: FAULTEN0_A) -> &'a mut W {
502 self.bit(variant.into())
503 }
504 #[doc = "The fault control in this pair of channels is disabled."]
505 #[inline(always)]
506 pub fn _0(self) -> &'a mut W {
507 self.variant(FAULTEN0_A::_0)
508 }
509 #[doc = "The fault control in this pair of channels is enabled."]
510 #[inline(always)]
511 pub fn _1(self) -> &'a mut W {
512 self.variant(FAULTEN0_A::_1)
513 }
514 #[doc = r"Sets the field bit"]
515 #[inline(always)]
516 pub fn set_bit(self) -> &'a mut W {
517 self.bit(true)
518 }
519 #[doc = r"Clears the field bit"]
520 #[inline(always)]
521 pub fn clear_bit(self) -> &'a mut W {
522 self.bit(false)
523 }
524 #[doc = r"Writes raw bits to the field"]
525 #[inline(always)]
526 pub fn bit(self, value: bool) -> &'a mut W {
527 self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
528 self.w
529 }
530}
531#[doc = "Field `MCOMBINE0` reader - Modified Combine Mode For n = 0"]
532pub struct MCOMBINE0_R(crate::FieldReader<bool, bool>);
533impl MCOMBINE0_R {
534 #[inline(always)]
535 pub(crate) fn new(bits: bool) -> Self {
536 MCOMBINE0_R(crate::FieldReader::new(bits))
537 }
538}
539impl core::ops::Deref for MCOMBINE0_R {
540 type Target = crate::FieldReader<bool, bool>;
541 #[inline(always)]
542 fn deref(&self) -> &Self::Target {
543 &self.0
544 }
545}
546#[doc = "Field `MCOMBINE0` writer - Modified Combine Mode For n = 0"]
547pub struct MCOMBINE0_W<'a> {
548 w: &'a mut W,
549}
550impl<'a> MCOMBINE0_W<'a> {
551 #[doc = r"Sets the field bit"]
552 #[inline(always)]
553 pub fn set_bit(self) -> &'a mut W {
554 self.bit(true)
555 }
556 #[doc = r"Clears the field bit"]
557 #[inline(always)]
558 pub fn clear_bit(self) -> &'a mut W {
559 self.bit(false)
560 }
561 #[doc = r"Writes raw bits to the field"]
562 #[inline(always)]
563 pub fn bit(self, value: bool) -> &'a mut W {
564 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
565 self.w
566 }
567}
568#[doc = "Field `COMBINE1` reader - Combine Channels For n = 2"]
569pub struct COMBINE1_R(crate::FieldReader<bool, bool>);
570impl COMBINE1_R {
571 #[inline(always)]
572 pub(crate) fn new(bits: bool) -> Self {
573 COMBINE1_R(crate::FieldReader::new(bits))
574 }
575}
576impl core::ops::Deref for COMBINE1_R {
577 type Target = crate::FieldReader<bool, bool>;
578 #[inline(always)]
579 fn deref(&self) -> &Self::Target {
580 &self.0
581 }
582}
583#[doc = "Field `COMBINE1` writer - Combine Channels For n = 2"]
584pub struct COMBINE1_W<'a> {
585 w: &'a mut W,
586}
587impl<'a> COMBINE1_W<'a> {
588 #[doc = r"Sets the field bit"]
589 #[inline(always)]
590 pub fn set_bit(self) -> &'a mut W {
591 self.bit(true)
592 }
593 #[doc = r"Clears the field bit"]
594 #[inline(always)]
595 pub fn clear_bit(self) -> &'a mut W {
596 self.bit(false)
597 }
598 #[doc = r"Writes raw bits to the field"]
599 #[inline(always)]
600 pub fn bit(self, value: bool) -> &'a mut W {
601 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
602 self.w
603 }
604}
605#[doc = "Complement Of Channel (n) For n = 2\n\nValue on reset: 0"]
606#[derive(Clone, Copy, Debug, PartialEq)]
607pub enum COMP1_A {
608 #[doc = "0: The channel (n+1) output is the same as the channel (n) output."]
609 _0 = 0,
610 #[doc = "1: The channel (n+1) output is the complement of the channel (n) output."]
611 _1 = 1,
612}
613impl From<COMP1_A> for bool {
614 #[inline(always)]
615 fn from(variant: COMP1_A) -> Self {
616 variant as u8 != 0
617 }
618}
619#[doc = "Field `COMP1` reader - Complement Of Channel (n) For n = 2"]
620pub struct COMP1_R(crate::FieldReader<bool, COMP1_A>);
621impl COMP1_R {
622 #[inline(always)]
623 pub(crate) fn new(bits: bool) -> Self {
624 COMP1_R(crate::FieldReader::new(bits))
625 }
626 #[doc = r"Get enumerated values variant"]
627 #[inline(always)]
628 pub fn variant(&self) -> COMP1_A {
629 match self.bits {
630 false => COMP1_A::_0,
631 true => COMP1_A::_1,
632 }
633 }
634 #[doc = "Checks if the value of the field is `_0`"]
635 #[inline(always)]
636 pub fn is_0(&self) -> bool {
637 **self == COMP1_A::_0
638 }
639 #[doc = "Checks if the value of the field is `_1`"]
640 #[inline(always)]
641 pub fn is_1(&self) -> bool {
642 **self == COMP1_A::_1
643 }
644}
645impl core::ops::Deref for COMP1_R {
646 type Target = crate::FieldReader<bool, COMP1_A>;
647 #[inline(always)]
648 fn deref(&self) -> &Self::Target {
649 &self.0
650 }
651}
652#[doc = "Field `COMP1` writer - Complement Of Channel (n) For n = 2"]
653pub struct COMP1_W<'a> {
654 w: &'a mut W,
655}
656impl<'a> COMP1_W<'a> {
657 #[doc = r"Writes `variant` to the field"]
658 #[inline(always)]
659 pub fn variant(self, variant: COMP1_A) -> &'a mut W {
660 self.bit(variant.into())
661 }
662 #[doc = "The channel (n+1) output is the same as the channel (n) output."]
663 #[inline(always)]
664 pub fn _0(self) -> &'a mut W {
665 self.variant(COMP1_A::_0)
666 }
667 #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
668 #[inline(always)]
669 pub fn _1(self) -> &'a mut W {
670 self.variant(COMP1_A::_1)
671 }
672 #[doc = r"Sets the field bit"]
673 #[inline(always)]
674 pub fn set_bit(self) -> &'a mut W {
675 self.bit(true)
676 }
677 #[doc = r"Clears the field bit"]
678 #[inline(always)]
679 pub fn clear_bit(self) -> &'a mut W {
680 self.bit(false)
681 }
682 #[doc = r"Writes raw bits to the field"]
683 #[inline(always)]
684 pub fn bit(self, value: bool) -> &'a mut W {
685 self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
686 self.w
687 }
688}
689#[doc = "Field `DECAPEN1` reader - Dual Edge Capture Mode Enable For n = 2"]
690pub struct DECAPEN1_R(crate::FieldReader<bool, bool>);
691impl DECAPEN1_R {
692 #[inline(always)]
693 pub(crate) fn new(bits: bool) -> Self {
694 DECAPEN1_R(crate::FieldReader::new(bits))
695 }
696}
697impl core::ops::Deref for DECAPEN1_R {
698 type Target = crate::FieldReader<bool, bool>;
699 #[inline(always)]
700 fn deref(&self) -> &Self::Target {
701 &self.0
702 }
703}
704#[doc = "Field `DECAPEN1` writer - Dual Edge Capture Mode Enable For n = 2"]
705pub struct DECAPEN1_W<'a> {
706 w: &'a mut W,
707}
708impl<'a> DECAPEN1_W<'a> {
709 #[doc = r"Sets the field bit"]
710 #[inline(always)]
711 pub fn set_bit(self) -> &'a mut W {
712 self.bit(true)
713 }
714 #[doc = r"Clears the field bit"]
715 #[inline(always)]
716 pub fn clear_bit(self) -> &'a mut W {
717 self.bit(false)
718 }
719 #[doc = r"Writes raw bits to the field"]
720 #[inline(always)]
721 pub fn bit(self, value: bool) -> &'a mut W {
722 self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
723 self.w
724 }
725}
726#[doc = "Dual Edge Capture Mode Captures For n = 2\n\nValue on reset: 0"]
727#[derive(Clone, Copy, Debug, PartialEq)]
728pub enum DECAP1_A {
729 #[doc = "0: The dual edge captures are inactive."]
730 _0 = 0,
731 #[doc = "1: The dual edge captures are active."]
732 _1 = 1,
733}
734impl From<DECAP1_A> for bool {
735 #[inline(always)]
736 fn from(variant: DECAP1_A) -> Self {
737 variant as u8 != 0
738 }
739}
740#[doc = "Field `DECAP1` reader - Dual Edge Capture Mode Captures For n = 2"]
741pub struct DECAP1_R(crate::FieldReader<bool, DECAP1_A>);
742impl DECAP1_R {
743 #[inline(always)]
744 pub(crate) fn new(bits: bool) -> Self {
745 DECAP1_R(crate::FieldReader::new(bits))
746 }
747 #[doc = r"Get enumerated values variant"]
748 #[inline(always)]
749 pub fn variant(&self) -> DECAP1_A {
750 match self.bits {
751 false => DECAP1_A::_0,
752 true => DECAP1_A::_1,
753 }
754 }
755 #[doc = "Checks if the value of the field is `_0`"]
756 #[inline(always)]
757 pub fn is_0(&self) -> bool {
758 **self == DECAP1_A::_0
759 }
760 #[doc = "Checks if the value of the field is `_1`"]
761 #[inline(always)]
762 pub fn is_1(&self) -> bool {
763 **self == DECAP1_A::_1
764 }
765}
766impl core::ops::Deref for DECAP1_R {
767 type Target = crate::FieldReader<bool, DECAP1_A>;
768 #[inline(always)]
769 fn deref(&self) -> &Self::Target {
770 &self.0
771 }
772}
773#[doc = "Field `DECAP1` writer - Dual Edge Capture Mode Captures For n = 2"]
774pub struct DECAP1_W<'a> {
775 w: &'a mut W,
776}
777impl<'a> DECAP1_W<'a> {
778 #[doc = r"Writes `variant` to the field"]
779 #[inline(always)]
780 pub fn variant(self, variant: DECAP1_A) -> &'a mut W {
781 self.bit(variant.into())
782 }
783 #[doc = "The dual edge captures are inactive."]
784 #[inline(always)]
785 pub fn _0(self) -> &'a mut W {
786 self.variant(DECAP1_A::_0)
787 }
788 #[doc = "The dual edge captures are active."]
789 #[inline(always)]
790 pub fn _1(self) -> &'a mut W {
791 self.variant(DECAP1_A::_1)
792 }
793 #[doc = r"Sets the field bit"]
794 #[inline(always)]
795 pub fn set_bit(self) -> &'a mut W {
796 self.bit(true)
797 }
798 #[doc = r"Clears the field bit"]
799 #[inline(always)]
800 pub fn clear_bit(self) -> &'a mut W {
801 self.bit(false)
802 }
803 #[doc = r"Writes raw bits to the field"]
804 #[inline(always)]
805 pub fn bit(self, value: bool) -> &'a mut W {
806 self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
807 self.w
808 }
809}
810#[doc = "Deadtime Enable For n = 2\n\nValue on reset: 0"]
811#[derive(Clone, Copy, Debug, PartialEq)]
812pub enum DTEN1_A {
813 #[doc = "0: The deadtime insertion in this pair of channels is disabled."]
814 _0 = 0,
815 #[doc = "1: The deadtime insertion in this pair of channels is enabled."]
816 _1 = 1,
817}
818impl From<DTEN1_A> for bool {
819 #[inline(always)]
820 fn from(variant: DTEN1_A) -> Self {
821 variant as u8 != 0
822 }
823}
824#[doc = "Field `DTEN1` reader - Deadtime Enable For n = 2"]
825pub struct DTEN1_R(crate::FieldReader<bool, DTEN1_A>);
826impl DTEN1_R {
827 #[inline(always)]
828 pub(crate) fn new(bits: bool) -> Self {
829 DTEN1_R(crate::FieldReader::new(bits))
830 }
831 #[doc = r"Get enumerated values variant"]
832 #[inline(always)]
833 pub fn variant(&self) -> DTEN1_A {
834 match self.bits {
835 false => DTEN1_A::_0,
836 true => DTEN1_A::_1,
837 }
838 }
839 #[doc = "Checks if the value of the field is `_0`"]
840 #[inline(always)]
841 pub fn is_0(&self) -> bool {
842 **self == DTEN1_A::_0
843 }
844 #[doc = "Checks if the value of the field is `_1`"]
845 #[inline(always)]
846 pub fn is_1(&self) -> bool {
847 **self == DTEN1_A::_1
848 }
849}
850impl core::ops::Deref for DTEN1_R {
851 type Target = crate::FieldReader<bool, DTEN1_A>;
852 #[inline(always)]
853 fn deref(&self) -> &Self::Target {
854 &self.0
855 }
856}
857#[doc = "Field `DTEN1` writer - Deadtime Enable For n = 2"]
858pub struct DTEN1_W<'a> {
859 w: &'a mut W,
860}
861impl<'a> DTEN1_W<'a> {
862 #[doc = r"Writes `variant` to the field"]
863 #[inline(always)]
864 pub fn variant(self, variant: DTEN1_A) -> &'a mut W {
865 self.bit(variant.into())
866 }
867 #[doc = "The deadtime insertion in this pair of channels is disabled."]
868 #[inline(always)]
869 pub fn _0(self) -> &'a mut W {
870 self.variant(DTEN1_A::_0)
871 }
872 #[doc = "The deadtime insertion in this pair of channels is enabled."]
873 #[inline(always)]
874 pub fn _1(self) -> &'a mut W {
875 self.variant(DTEN1_A::_1)
876 }
877 #[doc = r"Sets the field bit"]
878 #[inline(always)]
879 pub fn set_bit(self) -> &'a mut W {
880 self.bit(true)
881 }
882 #[doc = r"Clears the field bit"]
883 #[inline(always)]
884 pub fn clear_bit(self) -> &'a mut W {
885 self.bit(false)
886 }
887 #[doc = r"Writes raw bits to the field"]
888 #[inline(always)]
889 pub fn bit(self, value: bool) -> &'a mut W {
890 self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
891 self.w
892 }
893}
894#[doc = "Synchronization Enable For n = 2\n\nValue on reset: 0"]
895#[derive(Clone, Copy, Debug, PartialEq)]
896pub enum SYNCEN1_A {
897 #[doc = "0: The PWM synchronization in this pair of channels is disabled."]
898 _0 = 0,
899 #[doc = "1: The PWM synchronization in this pair of channels is enabled."]
900 _1 = 1,
901}
902impl From<SYNCEN1_A> for bool {
903 #[inline(always)]
904 fn from(variant: SYNCEN1_A) -> Self {
905 variant as u8 != 0
906 }
907}
908#[doc = "Field `SYNCEN1` reader - Synchronization Enable For n = 2"]
909pub struct SYNCEN1_R(crate::FieldReader<bool, SYNCEN1_A>);
910impl SYNCEN1_R {
911 #[inline(always)]
912 pub(crate) fn new(bits: bool) -> Self {
913 SYNCEN1_R(crate::FieldReader::new(bits))
914 }
915 #[doc = r"Get enumerated values variant"]
916 #[inline(always)]
917 pub fn variant(&self) -> SYNCEN1_A {
918 match self.bits {
919 false => SYNCEN1_A::_0,
920 true => SYNCEN1_A::_1,
921 }
922 }
923 #[doc = "Checks if the value of the field is `_0`"]
924 #[inline(always)]
925 pub fn is_0(&self) -> bool {
926 **self == SYNCEN1_A::_0
927 }
928 #[doc = "Checks if the value of the field is `_1`"]
929 #[inline(always)]
930 pub fn is_1(&self) -> bool {
931 **self == SYNCEN1_A::_1
932 }
933}
934impl core::ops::Deref for SYNCEN1_R {
935 type Target = crate::FieldReader<bool, SYNCEN1_A>;
936 #[inline(always)]
937 fn deref(&self) -> &Self::Target {
938 &self.0
939 }
940}
941#[doc = "Field `SYNCEN1` writer - Synchronization Enable For n = 2"]
942pub struct SYNCEN1_W<'a> {
943 w: &'a mut W,
944}
945impl<'a> SYNCEN1_W<'a> {
946 #[doc = r"Writes `variant` to the field"]
947 #[inline(always)]
948 pub fn variant(self, variant: SYNCEN1_A) -> &'a mut W {
949 self.bit(variant.into())
950 }
951 #[doc = "The PWM synchronization in this pair of channels is disabled."]
952 #[inline(always)]
953 pub fn _0(self) -> &'a mut W {
954 self.variant(SYNCEN1_A::_0)
955 }
956 #[doc = "The PWM synchronization in this pair of channels is enabled."]
957 #[inline(always)]
958 pub fn _1(self) -> &'a mut W {
959 self.variant(SYNCEN1_A::_1)
960 }
961 #[doc = r"Sets the field bit"]
962 #[inline(always)]
963 pub fn set_bit(self) -> &'a mut W {
964 self.bit(true)
965 }
966 #[doc = r"Clears the field bit"]
967 #[inline(always)]
968 pub fn clear_bit(self) -> &'a mut W {
969 self.bit(false)
970 }
971 #[doc = r"Writes raw bits to the field"]
972 #[inline(always)]
973 pub fn bit(self, value: bool) -> &'a mut W {
974 self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
975 self.w
976 }
977}
978#[doc = "Fault Control Enable For n = 2\n\nValue on reset: 0"]
979#[derive(Clone, Copy, Debug, PartialEq)]
980pub enum FAULTEN1_A {
981 #[doc = "0: The fault control in this pair of channels is disabled."]
982 _0 = 0,
983 #[doc = "1: The fault control in this pair of channels is enabled."]
984 _1 = 1,
985}
986impl From<FAULTEN1_A> for bool {
987 #[inline(always)]
988 fn from(variant: FAULTEN1_A) -> Self {
989 variant as u8 != 0
990 }
991}
992#[doc = "Field `FAULTEN1` reader - Fault Control Enable For n = 2"]
993pub struct FAULTEN1_R(crate::FieldReader<bool, FAULTEN1_A>);
994impl FAULTEN1_R {
995 #[inline(always)]
996 pub(crate) fn new(bits: bool) -> Self {
997 FAULTEN1_R(crate::FieldReader::new(bits))
998 }
999 #[doc = r"Get enumerated values variant"]
1000 #[inline(always)]
1001 pub fn variant(&self) -> FAULTEN1_A {
1002 match self.bits {
1003 false => FAULTEN1_A::_0,
1004 true => FAULTEN1_A::_1,
1005 }
1006 }
1007 #[doc = "Checks if the value of the field is `_0`"]
1008 #[inline(always)]
1009 pub fn is_0(&self) -> bool {
1010 **self == FAULTEN1_A::_0
1011 }
1012 #[doc = "Checks if the value of the field is `_1`"]
1013 #[inline(always)]
1014 pub fn is_1(&self) -> bool {
1015 **self == FAULTEN1_A::_1
1016 }
1017}
1018impl core::ops::Deref for FAULTEN1_R {
1019 type Target = crate::FieldReader<bool, FAULTEN1_A>;
1020 #[inline(always)]
1021 fn deref(&self) -> &Self::Target {
1022 &self.0
1023 }
1024}
1025#[doc = "Field `FAULTEN1` writer - Fault Control Enable For n = 2"]
1026pub struct FAULTEN1_W<'a> {
1027 w: &'a mut W,
1028}
1029impl<'a> FAULTEN1_W<'a> {
1030 #[doc = r"Writes `variant` to the field"]
1031 #[inline(always)]
1032 pub fn variant(self, variant: FAULTEN1_A) -> &'a mut W {
1033 self.bit(variant.into())
1034 }
1035 #[doc = "The fault control in this pair of channels is disabled."]
1036 #[inline(always)]
1037 pub fn _0(self) -> &'a mut W {
1038 self.variant(FAULTEN1_A::_0)
1039 }
1040 #[doc = "The fault control in this pair of channels is enabled."]
1041 #[inline(always)]
1042 pub fn _1(self) -> &'a mut W {
1043 self.variant(FAULTEN1_A::_1)
1044 }
1045 #[doc = r"Sets the field bit"]
1046 #[inline(always)]
1047 pub fn set_bit(self) -> &'a mut W {
1048 self.bit(true)
1049 }
1050 #[doc = r"Clears the field bit"]
1051 #[inline(always)]
1052 pub fn clear_bit(self) -> &'a mut W {
1053 self.bit(false)
1054 }
1055 #[doc = r"Writes raw bits to the field"]
1056 #[inline(always)]
1057 pub fn bit(self, value: bool) -> &'a mut W {
1058 self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
1059 self.w
1060 }
1061}
1062#[doc = "Field `MCOMBINE1` reader - Modified Combine Mode For n = 2"]
1063pub struct MCOMBINE1_R(crate::FieldReader<bool, bool>);
1064impl MCOMBINE1_R {
1065 #[inline(always)]
1066 pub(crate) fn new(bits: bool) -> Self {
1067 MCOMBINE1_R(crate::FieldReader::new(bits))
1068 }
1069}
1070impl core::ops::Deref for MCOMBINE1_R {
1071 type Target = crate::FieldReader<bool, bool>;
1072 #[inline(always)]
1073 fn deref(&self) -> &Self::Target {
1074 &self.0
1075 }
1076}
1077#[doc = "Field `MCOMBINE1` writer - Modified Combine Mode For n = 2"]
1078pub struct MCOMBINE1_W<'a> {
1079 w: &'a mut W,
1080}
1081impl<'a> MCOMBINE1_W<'a> {
1082 #[doc = r"Sets the field bit"]
1083 #[inline(always)]
1084 pub fn set_bit(self) -> &'a mut W {
1085 self.bit(true)
1086 }
1087 #[doc = r"Clears the field bit"]
1088 #[inline(always)]
1089 pub fn clear_bit(self) -> &'a mut W {
1090 self.bit(false)
1091 }
1092 #[doc = r"Writes raw bits to the field"]
1093 #[inline(always)]
1094 pub fn bit(self, value: bool) -> &'a mut W {
1095 self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
1096 self.w
1097 }
1098}
1099#[doc = "Field `COMBINE2` reader - Combine Channels For n = 4"]
1100pub struct COMBINE2_R(crate::FieldReader<bool, bool>);
1101impl COMBINE2_R {
1102 #[inline(always)]
1103 pub(crate) fn new(bits: bool) -> Self {
1104 COMBINE2_R(crate::FieldReader::new(bits))
1105 }
1106}
1107impl core::ops::Deref for COMBINE2_R {
1108 type Target = crate::FieldReader<bool, bool>;
1109 #[inline(always)]
1110 fn deref(&self) -> &Self::Target {
1111 &self.0
1112 }
1113}
1114#[doc = "Field `COMBINE2` writer - Combine Channels For n = 4"]
1115pub struct COMBINE2_W<'a> {
1116 w: &'a mut W,
1117}
1118impl<'a> COMBINE2_W<'a> {
1119 #[doc = r"Sets the field bit"]
1120 #[inline(always)]
1121 pub fn set_bit(self) -> &'a mut W {
1122 self.bit(true)
1123 }
1124 #[doc = r"Clears the field bit"]
1125 #[inline(always)]
1126 pub fn clear_bit(self) -> &'a mut W {
1127 self.bit(false)
1128 }
1129 #[doc = r"Writes raw bits to the field"]
1130 #[inline(always)]
1131 pub fn bit(self, value: bool) -> &'a mut W {
1132 self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
1133 self.w
1134 }
1135}
1136#[doc = "Complement Of Channel (n) For n = 4\n\nValue on reset: 0"]
1137#[derive(Clone, Copy, Debug, PartialEq)]
1138pub enum COMP2_A {
1139 #[doc = "0: The channel (n+1) output is the same as the channel (n) output."]
1140 _0 = 0,
1141 #[doc = "1: The channel (n+1) output is the complement of the channel (n) output."]
1142 _1 = 1,
1143}
1144impl From<COMP2_A> for bool {
1145 #[inline(always)]
1146 fn from(variant: COMP2_A) -> Self {
1147 variant as u8 != 0
1148 }
1149}
1150#[doc = "Field `COMP2` reader - Complement Of Channel (n) For n = 4"]
1151pub struct COMP2_R(crate::FieldReader<bool, COMP2_A>);
1152impl COMP2_R {
1153 #[inline(always)]
1154 pub(crate) fn new(bits: bool) -> Self {
1155 COMP2_R(crate::FieldReader::new(bits))
1156 }
1157 #[doc = r"Get enumerated values variant"]
1158 #[inline(always)]
1159 pub fn variant(&self) -> COMP2_A {
1160 match self.bits {
1161 false => COMP2_A::_0,
1162 true => COMP2_A::_1,
1163 }
1164 }
1165 #[doc = "Checks if the value of the field is `_0`"]
1166 #[inline(always)]
1167 pub fn is_0(&self) -> bool {
1168 **self == COMP2_A::_0
1169 }
1170 #[doc = "Checks if the value of the field is `_1`"]
1171 #[inline(always)]
1172 pub fn is_1(&self) -> bool {
1173 **self == COMP2_A::_1
1174 }
1175}
1176impl core::ops::Deref for COMP2_R {
1177 type Target = crate::FieldReader<bool, COMP2_A>;
1178 #[inline(always)]
1179 fn deref(&self) -> &Self::Target {
1180 &self.0
1181 }
1182}
1183#[doc = "Field `COMP2` writer - Complement Of Channel (n) For n = 4"]
1184pub struct COMP2_W<'a> {
1185 w: &'a mut W,
1186}
1187impl<'a> COMP2_W<'a> {
1188 #[doc = r"Writes `variant` to the field"]
1189 #[inline(always)]
1190 pub fn variant(self, variant: COMP2_A) -> &'a mut W {
1191 self.bit(variant.into())
1192 }
1193 #[doc = "The channel (n+1) output is the same as the channel (n) output."]
1194 #[inline(always)]
1195 pub fn _0(self) -> &'a mut W {
1196 self.variant(COMP2_A::_0)
1197 }
1198 #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
1199 #[inline(always)]
1200 pub fn _1(self) -> &'a mut W {
1201 self.variant(COMP2_A::_1)
1202 }
1203 #[doc = r"Sets the field bit"]
1204 #[inline(always)]
1205 pub fn set_bit(self) -> &'a mut W {
1206 self.bit(true)
1207 }
1208 #[doc = r"Clears the field bit"]
1209 #[inline(always)]
1210 pub fn clear_bit(self) -> &'a mut W {
1211 self.bit(false)
1212 }
1213 #[doc = r"Writes raw bits to the field"]
1214 #[inline(always)]
1215 pub fn bit(self, value: bool) -> &'a mut W {
1216 self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
1217 self.w
1218 }
1219}
1220#[doc = "Field `DECAPEN2` reader - Dual Edge Capture Mode Enable For n = 4"]
1221pub struct DECAPEN2_R(crate::FieldReader<bool, bool>);
1222impl DECAPEN2_R {
1223 #[inline(always)]
1224 pub(crate) fn new(bits: bool) -> Self {
1225 DECAPEN2_R(crate::FieldReader::new(bits))
1226 }
1227}
1228impl core::ops::Deref for DECAPEN2_R {
1229 type Target = crate::FieldReader<bool, bool>;
1230 #[inline(always)]
1231 fn deref(&self) -> &Self::Target {
1232 &self.0
1233 }
1234}
1235#[doc = "Field `DECAPEN2` writer - Dual Edge Capture Mode Enable For n = 4"]
1236pub struct DECAPEN2_W<'a> {
1237 w: &'a mut W,
1238}
1239impl<'a> DECAPEN2_W<'a> {
1240 #[doc = r"Sets the field bit"]
1241 #[inline(always)]
1242 pub fn set_bit(self) -> &'a mut W {
1243 self.bit(true)
1244 }
1245 #[doc = r"Clears the field bit"]
1246 #[inline(always)]
1247 pub fn clear_bit(self) -> &'a mut W {
1248 self.bit(false)
1249 }
1250 #[doc = r"Writes raw bits to the field"]
1251 #[inline(always)]
1252 pub fn bit(self, value: bool) -> &'a mut W {
1253 self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
1254 self.w
1255 }
1256}
1257#[doc = "Dual Edge Capture Mode Captures For n = 4\n\nValue on reset: 0"]
1258#[derive(Clone, Copy, Debug, PartialEq)]
1259pub enum DECAP2_A {
1260 #[doc = "0: The dual edge captures are inactive."]
1261 _0 = 0,
1262 #[doc = "1: The dual edge captures are active."]
1263 _1 = 1,
1264}
1265impl From<DECAP2_A> for bool {
1266 #[inline(always)]
1267 fn from(variant: DECAP2_A) -> Self {
1268 variant as u8 != 0
1269 }
1270}
1271#[doc = "Field `DECAP2` reader - Dual Edge Capture Mode Captures For n = 4"]
1272pub struct DECAP2_R(crate::FieldReader<bool, DECAP2_A>);
1273impl DECAP2_R {
1274 #[inline(always)]
1275 pub(crate) fn new(bits: bool) -> Self {
1276 DECAP2_R(crate::FieldReader::new(bits))
1277 }
1278 #[doc = r"Get enumerated values variant"]
1279 #[inline(always)]
1280 pub fn variant(&self) -> DECAP2_A {
1281 match self.bits {
1282 false => DECAP2_A::_0,
1283 true => DECAP2_A::_1,
1284 }
1285 }
1286 #[doc = "Checks if the value of the field is `_0`"]
1287 #[inline(always)]
1288 pub fn is_0(&self) -> bool {
1289 **self == DECAP2_A::_0
1290 }
1291 #[doc = "Checks if the value of the field is `_1`"]
1292 #[inline(always)]
1293 pub fn is_1(&self) -> bool {
1294 **self == DECAP2_A::_1
1295 }
1296}
1297impl core::ops::Deref for DECAP2_R {
1298 type Target = crate::FieldReader<bool, DECAP2_A>;
1299 #[inline(always)]
1300 fn deref(&self) -> &Self::Target {
1301 &self.0
1302 }
1303}
1304#[doc = "Field `DECAP2` writer - Dual Edge Capture Mode Captures For n = 4"]
1305pub struct DECAP2_W<'a> {
1306 w: &'a mut W,
1307}
1308impl<'a> DECAP2_W<'a> {
1309 #[doc = r"Writes `variant` to the field"]
1310 #[inline(always)]
1311 pub fn variant(self, variant: DECAP2_A) -> &'a mut W {
1312 self.bit(variant.into())
1313 }
1314 #[doc = "The dual edge captures are inactive."]
1315 #[inline(always)]
1316 pub fn _0(self) -> &'a mut W {
1317 self.variant(DECAP2_A::_0)
1318 }
1319 #[doc = "The dual edge captures are active."]
1320 #[inline(always)]
1321 pub fn _1(self) -> &'a mut W {
1322 self.variant(DECAP2_A::_1)
1323 }
1324 #[doc = r"Sets the field bit"]
1325 #[inline(always)]
1326 pub fn set_bit(self) -> &'a mut W {
1327 self.bit(true)
1328 }
1329 #[doc = r"Clears the field bit"]
1330 #[inline(always)]
1331 pub fn clear_bit(self) -> &'a mut W {
1332 self.bit(false)
1333 }
1334 #[doc = r"Writes raw bits to the field"]
1335 #[inline(always)]
1336 pub fn bit(self, value: bool) -> &'a mut W {
1337 self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
1338 self.w
1339 }
1340}
1341#[doc = "Deadtime Enable For n = 4\n\nValue on reset: 0"]
1342#[derive(Clone, Copy, Debug, PartialEq)]
1343pub enum DTEN2_A {
1344 #[doc = "0: The deadtime insertion in this pair of channels is disabled."]
1345 _0 = 0,
1346 #[doc = "1: The deadtime insertion in this pair of channels is enabled."]
1347 _1 = 1,
1348}
1349impl From<DTEN2_A> for bool {
1350 #[inline(always)]
1351 fn from(variant: DTEN2_A) -> Self {
1352 variant as u8 != 0
1353 }
1354}
1355#[doc = "Field `DTEN2` reader - Deadtime Enable For n = 4"]
1356pub struct DTEN2_R(crate::FieldReader<bool, DTEN2_A>);
1357impl DTEN2_R {
1358 #[inline(always)]
1359 pub(crate) fn new(bits: bool) -> Self {
1360 DTEN2_R(crate::FieldReader::new(bits))
1361 }
1362 #[doc = r"Get enumerated values variant"]
1363 #[inline(always)]
1364 pub fn variant(&self) -> DTEN2_A {
1365 match self.bits {
1366 false => DTEN2_A::_0,
1367 true => DTEN2_A::_1,
1368 }
1369 }
1370 #[doc = "Checks if the value of the field is `_0`"]
1371 #[inline(always)]
1372 pub fn is_0(&self) -> bool {
1373 **self == DTEN2_A::_0
1374 }
1375 #[doc = "Checks if the value of the field is `_1`"]
1376 #[inline(always)]
1377 pub fn is_1(&self) -> bool {
1378 **self == DTEN2_A::_1
1379 }
1380}
1381impl core::ops::Deref for DTEN2_R {
1382 type Target = crate::FieldReader<bool, DTEN2_A>;
1383 #[inline(always)]
1384 fn deref(&self) -> &Self::Target {
1385 &self.0
1386 }
1387}
1388#[doc = "Field `DTEN2` writer - Deadtime Enable For n = 4"]
1389pub struct DTEN2_W<'a> {
1390 w: &'a mut W,
1391}
1392impl<'a> DTEN2_W<'a> {
1393 #[doc = r"Writes `variant` to the field"]
1394 #[inline(always)]
1395 pub fn variant(self, variant: DTEN2_A) -> &'a mut W {
1396 self.bit(variant.into())
1397 }
1398 #[doc = "The deadtime insertion in this pair of channels is disabled."]
1399 #[inline(always)]
1400 pub fn _0(self) -> &'a mut W {
1401 self.variant(DTEN2_A::_0)
1402 }
1403 #[doc = "The deadtime insertion in this pair of channels is enabled."]
1404 #[inline(always)]
1405 pub fn _1(self) -> &'a mut W {
1406 self.variant(DTEN2_A::_1)
1407 }
1408 #[doc = r"Sets the field bit"]
1409 #[inline(always)]
1410 pub fn set_bit(self) -> &'a mut W {
1411 self.bit(true)
1412 }
1413 #[doc = r"Clears the field bit"]
1414 #[inline(always)]
1415 pub fn clear_bit(self) -> &'a mut W {
1416 self.bit(false)
1417 }
1418 #[doc = r"Writes raw bits to the field"]
1419 #[inline(always)]
1420 pub fn bit(self, value: bool) -> &'a mut W {
1421 self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
1422 self.w
1423 }
1424}
1425#[doc = "Synchronization Enable For n = 4\n\nValue on reset: 0"]
1426#[derive(Clone, Copy, Debug, PartialEq)]
1427pub enum SYNCEN2_A {
1428 #[doc = "0: The PWM synchronization in this pair of channels is disabled."]
1429 _0 = 0,
1430 #[doc = "1: The PWM synchronization in this pair of channels is enabled."]
1431 _1 = 1,
1432}
1433impl From<SYNCEN2_A> for bool {
1434 #[inline(always)]
1435 fn from(variant: SYNCEN2_A) -> Self {
1436 variant as u8 != 0
1437 }
1438}
1439#[doc = "Field `SYNCEN2` reader - Synchronization Enable For n = 4"]
1440pub struct SYNCEN2_R(crate::FieldReader<bool, SYNCEN2_A>);
1441impl SYNCEN2_R {
1442 #[inline(always)]
1443 pub(crate) fn new(bits: bool) -> Self {
1444 SYNCEN2_R(crate::FieldReader::new(bits))
1445 }
1446 #[doc = r"Get enumerated values variant"]
1447 #[inline(always)]
1448 pub fn variant(&self) -> SYNCEN2_A {
1449 match self.bits {
1450 false => SYNCEN2_A::_0,
1451 true => SYNCEN2_A::_1,
1452 }
1453 }
1454 #[doc = "Checks if the value of the field is `_0`"]
1455 #[inline(always)]
1456 pub fn is_0(&self) -> bool {
1457 **self == SYNCEN2_A::_0
1458 }
1459 #[doc = "Checks if the value of the field is `_1`"]
1460 #[inline(always)]
1461 pub fn is_1(&self) -> bool {
1462 **self == SYNCEN2_A::_1
1463 }
1464}
1465impl core::ops::Deref for SYNCEN2_R {
1466 type Target = crate::FieldReader<bool, SYNCEN2_A>;
1467 #[inline(always)]
1468 fn deref(&self) -> &Self::Target {
1469 &self.0
1470 }
1471}
1472#[doc = "Field `SYNCEN2` writer - Synchronization Enable For n = 4"]
1473pub struct SYNCEN2_W<'a> {
1474 w: &'a mut W,
1475}
1476impl<'a> SYNCEN2_W<'a> {
1477 #[doc = r"Writes `variant` to the field"]
1478 #[inline(always)]
1479 pub fn variant(self, variant: SYNCEN2_A) -> &'a mut W {
1480 self.bit(variant.into())
1481 }
1482 #[doc = "The PWM synchronization in this pair of channels is disabled."]
1483 #[inline(always)]
1484 pub fn _0(self) -> &'a mut W {
1485 self.variant(SYNCEN2_A::_0)
1486 }
1487 #[doc = "The PWM synchronization in this pair of channels is enabled."]
1488 #[inline(always)]
1489 pub fn _1(self) -> &'a mut W {
1490 self.variant(SYNCEN2_A::_1)
1491 }
1492 #[doc = r"Sets the field bit"]
1493 #[inline(always)]
1494 pub fn set_bit(self) -> &'a mut W {
1495 self.bit(true)
1496 }
1497 #[doc = r"Clears the field bit"]
1498 #[inline(always)]
1499 pub fn clear_bit(self) -> &'a mut W {
1500 self.bit(false)
1501 }
1502 #[doc = r"Writes raw bits to the field"]
1503 #[inline(always)]
1504 pub fn bit(self, value: bool) -> &'a mut W {
1505 self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
1506 self.w
1507 }
1508}
1509#[doc = "Fault Control Enable For n = 4\n\nValue on reset: 0"]
1510#[derive(Clone, Copy, Debug, PartialEq)]
1511pub enum FAULTEN2_A {
1512 #[doc = "0: The fault control in this pair of channels is disabled."]
1513 _0 = 0,
1514 #[doc = "1: The fault control in this pair of channels is enabled."]
1515 _1 = 1,
1516}
1517impl From<FAULTEN2_A> for bool {
1518 #[inline(always)]
1519 fn from(variant: FAULTEN2_A) -> Self {
1520 variant as u8 != 0
1521 }
1522}
1523#[doc = "Field `FAULTEN2` reader - Fault Control Enable For n = 4"]
1524pub struct FAULTEN2_R(crate::FieldReader<bool, FAULTEN2_A>);
1525impl FAULTEN2_R {
1526 #[inline(always)]
1527 pub(crate) fn new(bits: bool) -> Self {
1528 FAULTEN2_R(crate::FieldReader::new(bits))
1529 }
1530 #[doc = r"Get enumerated values variant"]
1531 #[inline(always)]
1532 pub fn variant(&self) -> FAULTEN2_A {
1533 match self.bits {
1534 false => FAULTEN2_A::_0,
1535 true => FAULTEN2_A::_1,
1536 }
1537 }
1538 #[doc = "Checks if the value of the field is `_0`"]
1539 #[inline(always)]
1540 pub fn is_0(&self) -> bool {
1541 **self == FAULTEN2_A::_0
1542 }
1543 #[doc = "Checks if the value of the field is `_1`"]
1544 #[inline(always)]
1545 pub fn is_1(&self) -> bool {
1546 **self == FAULTEN2_A::_1
1547 }
1548}
1549impl core::ops::Deref for FAULTEN2_R {
1550 type Target = crate::FieldReader<bool, FAULTEN2_A>;
1551 #[inline(always)]
1552 fn deref(&self) -> &Self::Target {
1553 &self.0
1554 }
1555}
1556#[doc = "Field `FAULTEN2` writer - Fault Control Enable For n = 4"]
1557pub struct FAULTEN2_W<'a> {
1558 w: &'a mut W,
1559}
1560impl<'a> FAULTEN2_W<'a> {
1561 #[doc = r"Writes `variant` to the field"]
1562 #[inline(always)]
1563 pub fn variant(self, variant: FAULTEN2_A) -> &'a mut W {
1564 self.bit(variant.into())
1565 }
1566 #[doc = "The fault control in this pair of channels is disabled."]
1567 #[inline(always)]
1568 pub fn _0(self) -> &'a mut W {
1569 self.variant(FAULTEN2_A::_0)
1570 }
1571 #[doc = "The fault control in this pair of channels is enabled."]
1572 #[inline(always)]
1573 pub fn _1(self) -> &'a mut W {
1574 self.variant(FAULTEN2_A::_1)
1575 }
1576 #[doc = r"Sets the field bit"]
1577 #[inline(always)]
1578 pub fn set_bit(self) -> &'a mut W {
1579 self.bit(true)
1580 }
1581 #[doc = r"Clears the field bit"]
1582 #[inline(always)]
1583 pub fn clear_bit(self) -> &'a mut W {
1584 self.bit(false)
1585 }
1586 #[doc = r"Writes raw bits to the field"]
1587 #[inline(always)]
1588 pub fn bit(self, value: bool) -> &'a mut W {
1589 self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
1590 self.w
1591 }
1592}
1593#[doc = "Field `MCOMBINE2` reader - Modified Combine Mode For n = 4"]
1594pub struct MCOMBINE2_R(crate::FieldReader<bool, bool>);
1595impl MCOMBINE2_R {
1596 #[inline(always)]
1597 pub(crate) fn new(bits: bool) -> Self {
1598 MCOMBINE2_R(crate::FieldReader::new(bits))
1599 }
1600}
1601impl core::ops::Deref for MCOMBINE2_R {
1602 type Target = crate::FieldReader<bool, bool>;
1603 #[inline(always)]
1604 fn deref(&self) -> &Self::Target {
1605 &self.0
1606 }
1607}
1608#[doc = "Field `MCOMBINE2` writer - Modified Combine Mode For n = 4"]
1609pub struct MCOMBINE2_W<'a> {
1610 w: &'a mut W,
1611}
1612impl<'a> MCOMBINE2_W<'a> {
1613 #[doc = r"Sets the field bit"]
1614 #[inline(always)]
1615 pub fn set_bit(self) -> &'a mut W {
1616 self.bit(true)
1617 }
1618 #[doc = r"Clears the field bit"]
1619 #[inline(always)]
1620 pub fn clear_bit(self) -> &'a mut W {
1621 self.bit(false)
1622 }
1623 #[doc = r"Writes raw bits to the field"]
1624 #[inline(always)]
1625 pub fn bit(self, value: bool) -> &'a mut W {
1626 self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
1627 self.w
1628 }
1629}
1630#[doc = "Field `COMBINE3` reader - Combine Channels For n = 6"]
1631pub struct COMBINE3_R(crate::FieldReader<bool, bool>);
1632impl COMBINE3_R {
1633 #[inline(always)]
1634 pub(crate) fn new(bits: bool) -> Self {
1635 COMBINE3_R(crate::FieldReader::new(bits))
1636 }
1637}
1638impl core::ops::Deref for COMBINE3_R {
1639 type Target = crate::FieldReader<bool, bool>;
1640 #[inline(always)]
1641 fn deref(&self) -> &Self::Target {
1642 &self.0
1643 }
1644}
1645#[doc = "Field `COMBINE3` writer - Combine Channels For n = 6"]
1646pub struct COMBINE3_W<'a> {
1647 w: &'a mut W,
1648}
1649impl<'a> COMBINE3_W<'a> {
1650 #[doc = r"Sets the field bit"]
1651 #[inline(always)]
1652 pub fn set_bit(self) -> &'a mut W {
1653 self.bit(true)
1654 }
1655 #[doc = r"Clears the field bit"]
1656 #[inline(always)]
1657 pub fn clear_bit(self) -> &'a mut W {
1658 self.bit(false)
1659 }
1660 #[doc = r"Writes raw bits to the field"]
1661 #[inline(always)]
1662 pub fn bit(self, value: bool) -> &'a mut W {
1663 self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
1664 self.w
1665 }
1666}
1667#[doc = "Complement Of Channel (n) for n = 6\n\nValue on reset: 0"]
1668#[derive(Clone, Copy, Debug, PartialEq)]
1669pub enum COMP3_A {
1670 #[doc = "0: The channel (n+1) output is the same as the channel (n) output."]
1671 _0 = 0,
1672 #[doc = "1: The channel (n+1) output is the complement of the channel (n) output."]
1673 _1 = 1,
1674}
1675impl From<COMP3_A> for bool {
1676 #[inline(always)]
1677 fn from(variant: COMP3_A) -> Self {
1678 variant as u8 != 0
1679 }
1680}
1681#[doc = "Field `COMP3` reader - Complement Of Channel (n) for n = 6"]
1682pub struct COMP3_R(crate::FieldReader<bool, COMP3_A>);
1683impl COMP3_R {
1684 #[inline(always)]
1685 pub(crate) fn new(bits: bool) -> Self {
1686 COMP3_R(crate::FieldReader::new(bits))
1687 }
1688 #[doc = r"Get enumerated values variant"]
1689 #[inline(always)]
1690 pub fn variant(&self) -> COMP3_A {
1691 match self.bits {
1692 false => COMP3_A::_0,
1693 true => COMP3_A::_1,
1694 }
1695 }
1696 #[doc = "Checks if the value of the field is `_0`"]
1697 #[inline(always)]
1698 pub fn is_0(&self) -> bool {
1699 **self == COMP3_A::_0
1700 }
1701 #[doc = "Checks if the value of the field is `_1`"]
1702 #[inline(always)]
1703 pub fn is_1(&self) -> bool {
1704 **self == COMP3_A::_1
1705 }
1706}
1707impl core::ops::Deref for COMP3_R {
1708 type Target = crate::FieldReader<bool, COMP3_A>;
1709 #[inline(always)]
1710 fn deref(&self) -> &Self::Target {
1711 &self.0
1712 }
1713}
1714#[doc = "Field `COMP3` writer - Complement Of Channel (n) for n = 6"]
1715pub struct COMP3_W<'a> {
1716 w: &'a mut W,
1717}
1718impl<'a> COMP3_W<'a> {
1719 #[doc = r"Writes `variant` to the field"]
1720 #[inline(always)]
1721 pub fn variant(self, variant: COMP3_A) -> &'a mut W {
1722 self.bit(variant.into())
1723 }
1724 #[doc = "The channel (n+1) output is the same as the channel (n) output."]
1725 #[inline(always)]
1726 pub fn _0(self) -> &'a mut W {
1727 self.variant(COMP3_A::_0)
1728 }
1729 #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
1730 #[inline(always)]
1731 pub fn _1(self) -> &'a mut W {
1732 self.variant(COMP3_A::_1)
1733 }
1734 #[doc = r"Sets the field bit"]
1735 #[inline(always)]
1736 pub fn set_bit(self) -> &'a mut W {
1737 self.bit(true)
1738 }
1739 #[doc = r"Clears the field bit"]
1740 #[inline(always)]
1741 pub fn clear_bit(self) -> &'a mut W {
1742 self.bit(false)
1743 }
1744 #[doc = r"Writes raw bits to the field"]
1745 #[inline(always)]
1746 pub fn bit(self, value: bool) -> &'a mut W {
1747 self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
1748 self.w
1749 }
1750}
1751#[doc = "Field `DECAPEN3` reader - Dual Edge Capture Mode Enable For n = 6"]
1752pub struct DECAPEN3_R(crate::FieldReader<bool, bool>);
1753impl DECAPEN3_R {
1754 #[inline(always)]
1755 pub(crate) fn new(bits: bool) -> Self {
1756 DECAPEN3_R(crate::FieldReader::new(bits))
1757 }
1758}
1759impl core::ops::Deref for DECAPEN3_R {
1760 type Target = crate::FieldReader<bool, bool>;
1761 #[inline(always)]
1762 fn deref(&self) -> &Self::Target {
1763 &self.0
1764 }
1765}
1766#[doc = "Field `DECAPEN3` writer - Dual Edge Capture Mode Enable For n = 6"]
1767pub struct DECAPEN3_W<'a> {
1768 w: &'a mut W,
1769}
1770impl<'a> DECAPEN3_W<'a> {
1771 #[doc = r"Sets the field bit"]
1772 #[inline(always)]
1773 pub fn set_bit(self) -> &'a mut W {
1774 self.bit(true)
1775 }
1776 #[doc = r"Clears the field bit"]
1777 #[inline(always)]
1778 pub fn clear_bit(self) -> &'a mut W {
1779 self.bit(false)
1780 }
1781 #[doc = r"Writes raw bits to the field"]
1782 #[inline(always)]
1783 pub fn bit(self, value: bool) -> &'a mut W {
1784 self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
1785 self.w
1786 }
1787}
1788#[doc = "Dual Edge Capture Mode Captures For n = 6\n\nValue on reset: 0"]
1789#[derive(Clone, Copy, Debug, PartialEq)]
1790pub enum DECAP3_A {
1791 #[doc = "0: The dual edge captures are inactive."]
1792 _0 = 0,
1793 #[doc = "1: The dual edge captures are active."]
1794 _1 = 1,
1795}
1796impl From<DECAP3_A> for bool {
1797 #[inline(always)]
1798 fn from(variant: DECAP3_A) -> Self {
1799 variant as u8 != 0
1800 }
1801}
1802#[doc = "Field `DECAP3` reader - Dual Edge Capture Mode Captures For n = 6"]
1803pub struct DECAP3_R(crate::FieldReader<bool, DECAP3_A>);
1804impl DECAP3_R {
1805 #[inline(always)]
1806 pub(crate) fn new(bits: bool) -> Self {
1807 DECAP3_R(crate::FieldReader::new(bits))
1808 }
1809 #[doc = r"Get enumerated values variant"]
1810 #[inline(always)]
1811 pub fn variant(&self) -> DECAP3_A {
1812 match self.bits {
1813 false => DECAP3_A::_0,
1814 true => DECAP3_A::_1,
1815 }
1816 }
1817 #[doc = "Checks if the value of the field is `_0`"]
1818 #[inline(always)]
1819 pub fn is_0(&self) -> bool {
1820 **self == DECAP3_A::_0
1821 }
1822 #[doc = "Checks if the value of the field is `_1`"]
1823 #[inline(always)]
1824 pub fn is_1(&self) -> bool {
1825 **self == DECAP3_A::_1
1826 }
1827}
1828impl core::ops::Deref for DECAP3_R {
1829 type Target = crate::FieldReader<bool, DECAP3_A>;
1830 #[inline(always)]
1831 fn deref(&self) -> &Self::Target {
1832 &self.0
1833 }
1834}
1835#[doc = "Field `DECAP3` writer - Dual Edge Capture Mode Captures For n = 6"]
1836pub struct DECAP3_W<'a> {
1837 w: &'a mut W,
1838}
1839impl<'a> DECAP3_W<'a> {
1840 #[doc = r"Writes `variant` to the field"]
1841 #[inline(always)]
1842 pub fn variant(self, variant: DECAP3_A) -> &'a mut W {
1843 self.bit(variant.into())
1844 }
1845 #[doc = "The dual edge captures are inactive."]
1846 #[inline(always)]
1847 pub fn _0(self) -> &'a mut W {
1848 self.variant(DECAP3_A::_0)
1849 }
1850 #[doc = "The dual edge captures are active."]
1851 #[inline(always)]
1852 pub fn _1(self) -> &'a mut W {
1853 self.variant(DECAP3_A::_1)
1854 }
1855 #[doc = r"Sets the field bit"]
1856 #[inline(always)]
1857 pub fn set_bit(self) -> &'a mut W {
1858 self.bit(true)
1859 }
1860 #[doc = r"Clears the field bit"]
1861 #[inline(always)]
1862 pub fn clear_bit(self) -> &'a mut W {
1863 self.bit(false)
1864 }
1865 #[doc = r"Writes raw bits to the field"]
1866 #[inline(always)]
1867 pub fn bit(self, value: bool) -> &'a mut W {
1868 self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
1869 self.w
1870 }
1871}
1872#[doc = "Deadtime Enable For n = 6\n\nValue on reset: 0"]
1873#[derive(Clone, Copy, Debug, PartialEq)]
1874pub enum DTEN3_A {
1875 #[doc = "0: The deadtime insertion in this pair of channels is disabled."]
1876 _0 = 0,
1877 #[doc = "1: The deadtime insertion in this pair of channels is enabled."]
1878 _1 = 1,
1879}
1880impl From<DTEN3_A> for bool {
1881 #[inline(always)]
1882 fn from(variant: DTEN3_A) -> Self {
1883 variant as u8 != 0
1884 }
1885}
1886#[doc = "Field `DTEN3` reader - Deadtime Enable For n = 6"]
1887pub struct DTEN3_R(crate::FieldReader<bool, DTEN3_A>);
1888impl DTEN3_R {
1889 #[inline(always)]
1890 pub(crate) fn new(bits: bool) -> Self {
1891 DTEN3_R(crate::FieldReader::new(bits))
1892 }
1893 #[doc = r"Get enumerated values variant"]
1894 #[inline(always)]
1895 pub fn variant(&self) -> DTEN3_A {
1896 match self.bits {
1897 false => DTEN3_A::_0,
1898 true => DTEN3_A::_1,
1899 }
1900 }
1901 #[doc = "Checks if the value of the field is `_0`"]
1902 #[inline(always)]
1903 pub fn is_0(&self) -> bool {
1904 **self == DTEN3_A::_0
1905 }
1906 #[doc = "Checks if the value of the field is `_1`"]
1907 #[inline(always)]
1908 pub fn is_1(&self) -> bool {
1909 **self == DTEN3_A::_1
1910 }
1911}
1912impl core::ops::Deref for DTEN3_R {
1913 type Target = crate::FieldReader<bool, DTEN3_A>;
1914 #[inline(always)]
1915 fn deref(&self) -> &Self::Target {
1916 &self.0
1917 }
1918}
1919#[doc = "Field `DTEN3` writer - Deadtime Enable For n = 6"]
1920pub struct DTEN3_W<'a> {
1921 w: &'a mut W,
1922}
1923impl<'a> DTEN3_W<'a> {
1924 #[doc = r"Writes `variant` to the field"]
1925 #[inline(always)]
1926 pub fn variant(self, variant: DTEN3_A) -> &'a mut W {
1927 self.bit(variant.into())
1928 }
1929 #[doc = "The deadtime insertion in this pair of channels is disabled."]
1930 #[inline(always)]
1931 pub fn _0(self) -> &'a mut W {
1932 self.variant(DTEN3_A::_0)
1933 }
1934 #[doc = "The deadtime insertion in this pair of channels is enabled."]
1935 #[inline(always)]
1936 pub fn _1(self) -> &'a mut W {
1937 self.variant(DTEN3_A::_1)
1938 }
1939 #[doc = r"Sets the field bit"]
1940 #[inline(always)]
1941 pub fn set_bit(self) -> &'a mut W {
1942 self.bit(true)
1943 }
1944 #[doc = r"Clears the field bit"]
1945 #[inline(always)]
1946 pub fn clear_bit(self) -> &'a mut W {
1947 self.bit(false)
1948 }
1949 #[doc = r"Writes raw bits to the field"]
1950 #[inline(always)]
1951 pub fn bit(self, value: bool) -> &'a mut W {
1952 self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
1953 self.w
1954 }
1955}
1956#[doc = "Synchronization Enable For n = 6\n\nValue on reset: 0"]
1957#[derive(Clone, Copy, Debug, PartialEq)]
1958pub enum SYNCEN3_A {
1959 #[doc = "0: The PWM synchronization in this pair of channels is disabled."]
1960 _0 = 0,
1961 #[doc = "1: The PWM synchronization in this pair of channels is enabled."]
1962 _1 = 1,
1963}
1964impl From<SYNCEN3_A> for bool {
1965 #[inline(always)]
1966 fn from(variant: SYNCEN3_A) -> Self {
1967 variant as u8 != 0
1968 }
1969}
1970#[doc = "Field `SYNCEN3` reader - Synchronization Enable For n = 6"]
1971pub struct SYNCEN3_R(crate::FieldReader<bool, SYNCEN3_A>);
1972impl SYNCEN3_R {
1973 #[inline(always)]
1974 pub(crate) fn new(bits: bool) -> Self {
1975 SYNCEN3_R(crate::FieldReader::new(bits))
1976 }
1977 #[doc = r"Get enumerated values variant"]
1978 #[inline(always)]
1979 pub fn variant(&self) -> SYNCEN3_A {
1980 match self.bits {
1981 false => SYNCEN3_A::_0,
1982 true => SYNCEN3_A::_1,
1983 }
1984 }
1985 #[doc = "Checks if the value of the field is `_0`"]
1986 #[inline(always)]
1987 pub fn is_0(&self) -> bool {
1988 **self == SYNCEN3_A::_0
1989 }
1990 #[doc = "Checks if the value of the field is `_1`"]
1991 #[inline(always)]
1992 pub fn is_1(&self) -> bool {
1993 **self == SYNCEN3_A::_1
1994 }
1995}
1996impl core::ops::Deref for SYNCEN3_R {
1997 type Target = crate::FieldReader<bool, SYNCEN3_A>;
1998 #[inline(always)]
1999 fn deref(&self) -> &Self::Target {
2000 &self.0
2001 }
2002}
2003#[doc = "Field `SYNCEN3` writer - Synchronization Enable For n = 6"]
2004pub struct SYNCEN3_W<'a> {
2005 w: &'a mut W,
2006}
2007impl<'a> SYNCEN3_W<'a> {
2008 #[doc = r"Writes `variant` to the field"]
2009 #[inline(always)]
2010 pub fn variant(self, variant: SYNCEN3_A) -> &'a mut W {
2011 self.bit(variant.into())
2012 }
2013 #[doc = "The PWM synchronization in this pair of channels is disabled."]
2014 #[inline(always)]
2015 pub fn _0(self) -> &'a mut W {
2016 self.variant(SYNCEN3_A::_0)
2017 }
2018 #[doc = "The PWM synchronization in this pair of channels is enabled."]
2019 #[inline(always)]
2020 pub fn _1(self) -> &'a mut W {
2021 self.variant(SYNCEN3_A::_1)
2022 }
2023 #[doc = r"Sets the field bit"]
2024 #[inline(always)]
2025 pub fn set_bit(self) -> &'a mut W {
2026 self.bit(true)
2027 }
2028 #[doc = r"Clears the field bit"]
2029 #[inline(always)]
2030 pub fn clear_bit(self) -> &'a mut W {
2031 self.bit(false)
2032 }
2033 #[doc = r"Writes raw bits to the field"]
2034 #[inline(always)]
2035 pub fn bit(self, value: bool) -> &'a mut W {
2036 self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
2037 self.w
2038 }
2039}
2040#[doc = "Fault Control Enable For n = 6\n\nValue on reset: 0"]
2041#[derive(Clone, Copy, Debug, PartialEq)]
2042pub enum FAULTEN3_A {
2043 #[doc = "0: The fault control in this pair of channels is disabled."]
2044 _0 = 0,
2045 #[doc = "1: The fault control in this pair of channels is enabled."]
2046 _1 = 1,
2047}
2048impl From<FAULTEN3_A> for bool {
2049 #[inline(always)]
2050 fn from(variant: FAULTEN3_A) -> Self {
2051 variant as u8 != 0
2052 }
2053}
2054#[doc = "Field `FAULTEN3` reader - Fault Control Enable For n = 6"]
2055pub struct FAULTEN3_R(crate::FieldReader<bool, FAULTEN3_A>);
2056impl FAULTEN3_R {
2057 #[inline(always)]
2058 pub(crate) fn new(bits: bool) -> Self {
2059 FAULTEN3_R(crate::FieldReader::new(bits))
2060 }
2061 #[doc = r"Get enumerated values variant"]
2062 #[inline(always)]
2063 pub fn variant(&self) -> FAULTEN3_A {
2064 match self.bits {
2065 false => FAULTEN3_A::_0,
2066 true => FAULTEN3_A::_1,
2067 }
2068 }
2069 #[doc = "Checks if the value of the field is `_0`"]
2070 #[inline(always)]
2071 pub fn is_0(&self) -> bool {
2072 **self == FAULTEN3_A::_0
2073 }
2074 #[doc = "Checks if the value of the field is `_1`"]
2075 #[inline(always)]
2076 pub fn is_1(&self) -> bool {
2077 **self == FAULTEN3_A::_1
2078 }
2079}
2080impl core::ops::Deref for FAULTEN3_R {
2081 type Target = crate::FieldReader<bool, FAULTEN3_A>;
2082 #[inline(always)]
2083 fn deref(&self) -> &Self::Target {
2084 &self.0
2085 }
2086}
2087#[doc = "Field `FAULTEN3` writer - Fault Control Enable For n = 6"]
2088pub struct FAULTEN3_W<'a> {
2089 w: &'a mut W,
2090}
2091impl<'a> FAULTEN3_W<'a> {
2092 #[doc = r"Writes `variant` to the field"]
2093 #[inline(always)]
2094 pub fn variant(self, variant: FAULTEN3_A) -> &'a mut W {
2095 self.bit(variant.into())
2096 }
2097 #[doc = "The fault control in this pair of channels is disabled."]
2098 #[inline(always)]
2099 pub fn _0(self) -> &'a mut W {
2100 self.variant(FAULTEN3_A::_0)
2101 }
2102 #[doc = "The fault control in this pair of channels is enabled."]
2103 #[inline(always)]
2104 pub fn _1(self) -> &'a mut W {
2105 self.variant(FAULTEN3_A::_1)
2106 }
2107 #[doc = r"Sets the field bit"]
2108 #[inline(always)]
2109 pub fn set_bit(self) -> &'a mut W {
2110 self.bit(true)
2111 }
2112 #[doc = r"Clears the field bit"]
2113 #[inline(always)]
2114 pub fn clear_bit(self) -> &'a mut W {
2115 self.bit(false)
2116 }
2117 #[doc = r"Writes raw bits to the field"]
2118 #[inline(always)]
2119 pub fn bit(self, value: bool) -> &'a mut W {
2120 self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
2121 self.w
2122 }
2123}
2124#[doc = "Field `MCOMBINE3` reader - Modified Combine Mode For n = 6"]
2125pub struct MCOMBINE3_R(crate::FieldReader<bool, bool>);
2126impl MCOMBINE3_R {
2127 #[inline(always)]
2128 pub(crate) fn new(bits: bool) -> Self {
2129 MCOMBINE3_R(crate::FieldReader::new(bits))
2130 }
2131}
2132impl core::ops::Deref for MCOMBINE3_R {
2133 type Target = crate::FieldReader<bool, bool>;
2134 #[inline(always)]
2135 fn deref(&self) -> &Self::Target {
2136 &self.0
2137 }
2138}
2139#[doc = "Field `MCOMBINE3` writer - Modified Combine Mode For n = 6"]
2140pub struct MCOMBINE3_W<'a> {
2141 w: &'a mut W,
2142}
2143impl<'a> MCOMBINE3_W<'a> {
2144 #[doc = r"Sets the field bit"]
2145 #[inline(always)]
2146 pub fn set_bit(self) -> &'a mut W {
2147 self.bit(true)
2148 }
2149 #[doc = r"Clears the field bit"]
2150 #[inline(always)]
2151 pub fn clear_bit(self) -> &'a mut W {
2152 self.bit(false)
2153 }
2154 #[doc = r"Writes raw bits to the field"]
2155 #[inline(always)]
2156 pub fn bit(self, value: bool) -> &'a mut W {
2157 self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
2158 self.w
2159 }
2160}
2161impl R {
2162 #[doc = "Bit 0 - Combine Channels For n = 0"]
2163 #[inline(always)]
2164 pub fn combine0(&self) -> COMBINE0_R {
2165 COMBINE0_R::new((self.bits & 0x01) != 0)
2166 }
2167 #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
2168 #[inline(always)]
2169 pub fn comp0(&self) -> COMP0_R {
2170 COMP0_R::new(((self.bits >> 1) & 0x01) != 0)
2171 }
2172 #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
2173 #[inline(always)]
2174 pub fn decapen0(&self) -> DECAPEN0_R {
2175 DECAPEN0_R::new(((self.bits >> 2) & 0x01) != 0)
2176 }
2177 #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
2178 #[inline(always)]
2179 pub fn decap0(&self) -> DECAP0_R {
2180 DECAP0_R::new(((self.bits >> 3) & 0x01) != 0)
2181 }
2182 #[doc = "Bit 4 - Deadtime Enable For n = 0"]
2183 #[inline(always)]
2184 pub fn dten0(&self) -> DTEN0_R {
2185 DTEN0_R::new(((self.bits >> 4) & 0x01) != 0)
2186 }
2187 #[doc = "Bit 5 - Synchronization Enable For n = 0"]
2188 #[inline(always)]
2189 pub fn syncen0(&self) -> SYNCEN0_R {
2190 SYNCEN0_R::new(((self.bits >> 5) & 0x01) != 0)
2191 }
2192 #[doc = "Bit 6 - Fault Control Enable For n = 0"]
2193 #[inline(always)]
2194 pub fn faulten0(&self) -> FAULTEN0_R {
2195 FAULTEN0_R::new(((self.bits >> 6) & 0x01) != 0)
2196 }
2197 #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
2198 #[inline(always)]
2199 pub fn mcombine0(&self) -> MCOMBINE0_R {
2200 MCOMBINE0_R::new(((self.bits >> 7) & 0x01) != 0)
2201 }
2202 #[doc = "Bit 8 - Combine Channels For n = 2"]
2203 #[inline(always)]
2204 pub fn combine1(&self) -> COMBINE1_R {
2205 COMBINE1_R::new(((self.bits >> 8) & 0x01) != 0)
2206 }
2207 #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
2208 #[inline(always)]
2209 pub fn comp1(&self) -> COMP1_R {
2210 COMP1_R::new(((self.bits >> 9) & 0x01) != 0)
2211 }
2212 #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
2213 #[inline(always)]
2214 pub fn decapen1(&self) -> DECAPEN1_R {
2215 DECAPEN1_R::new(((self.bits >> 10) & 0x01) != 0)
2216 }
2217 #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
2218 #[inline(always)]
2219 pub fn decap1(&self) -> DECAP1_R {
2220 DECAP1_R::new(((self.bits >> 11) & 0x01) != 0)
2221 }
2222 #[doc = "Bit 12 - Deadtime Enable For n = 2"]
2223 #[inline(always)]
2224 pub fn dten1(&self) -> DTEN1_R {
2225 DTEN1_R::new(((self.bits >> 12) & 0x01) != 0)
2226 }
2227 #[doc = "Bit 13 - Synchronization Enable For n = 2"]
2228 #[inline(always)]
2229 pub fn syncen1(&self) -> SYNCEN1_R {
2230 SYNCEN1_R::new(((self.bits >> 13) & 0x01) != 0)
2231 }
2232 #[doc = "Bit 14 - Fault Control Enable For n = 2"]
2233 #[inline(always)]
2234 pub fn faulten1(&self) -> FAULTEN1_R {
2235 FAULTEN1_R::new(((self.bits >> 14) & 0x01) != 0)
2236 }
2237 #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
2238 #[inline(always)]
2239 pub fn mcombine1(&self) -> MCOMBINE1_R {
2240 MCOMBINE1_R::new(((self.bits >> 15) & 0x01) != 0)
2241 }
2242 #[doc = "Bit 16 - Combine Channels For n = 4"]
2243 #[inline(always)]
2244 pub fn combine2(&self) -> COMBINE2_R {
2245 COMBINE2_R::new(((self.bits >> 16) & 0x01) != 0)
2246 }
2247 #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
2248 #[inline(always)]
2249 pub fn comp2(&self) -> COMP2_R {
2250 COMP2_R::new(((self.bits >> 17) & 0x01) != 0)
2251 }
2252 #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
2253 #[inline(always)]
2254 pub fn decapen2(&self) -> DECAPEN2_R {
2255 DECAPEN2_R::new(((self.bits >> 18) & 0x01) != 0)
2256 }
2257 #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
2258 #[inline(always)]
2259 pub fn decap2(&self) -> DECAP2_R {
2260 DECAP2_R::new(((self.bits >> 19) & 0x01) != 0)
2261 }
2262 #[doc = "Bit 20 - Deadtime Enable For n = 4"]
2263 #[inline(always)]
2264 pub fn dten2(&self) -> DTEN2_R {
2265 DTEN2_R::new(((self.bits >> 20) & 0x01) != 0)
2266 }
2267 #[doc = "Bit 21 - Synchronization Enable For n = 4"]
2268 #[inline(always)]
2269 pub fn syncen2(&self) -> SYNCEN2_R {
2270 SYNCEN2_R::new(((self.bits >> 21) & 0x01) != 0)
2271 }
2272 #[doc = "Bit 22 - Fault Control Enable For n = 4"]
2273 #[inline(always)]
2274 pub fn faulten2(&self) -> FAULTEN2_R {
2275 FAULTEN2_R::new(((self.bits >> 22) & 0x01) != 0)
2276 }
2277 #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
2278 #[inline(always)]
2279 pub fn mcombine2(&self) -> MCOMBINE2_R {
2280 MCOMBINE2_R::new(((self.bits >> 23) & 0x01) != 0)
2281 }
2282 #[doc = "Bit 24 - Combine Channels For n = 6"]
2283 #[inline(always)]
2284 pub fn combine3(&self) -> COMBINE3_R {
2285 COMBINE3_R::new(((self.bits >> 24) & 0x01) != 0)
2286 }
2287 #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
2288 #[inline(always)]
2289 pub fn comp3(&self) -> COMP3_R {
2290 COMP3_R::new(((self.bits >> 25) & 0x01) != 0)
2291 }
2292 #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
2293 #[inline(always)]
2294 pub fn decapen3(&self) -> DECAPEN3_R {
2295 DECAPEN3_R::new(((self.bits >> 26) & 0x01) != 0)
2296 }
2297 #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
2298 #[inline(always)]
2299 pub fn decap3(&self) -> DECAP3_R {
2300 DECAP3_R::new(((self.bits >> 27) & 0x01) != 0)
2301 }
2302 #[doc = "Bit 28 - Deadtime Enable For n = 6"]
2303 #[inline(always)]
2304 pub fn dten3(&self) -> DTEN3_R {
2305 DTEN3_R::new(((self.bits >> 28) & 0x01) != 0)
2306 }
2307 #[doc = "Bit 29 - Synchronization Enable For n = 6"]
2308 #[inline(always)]
2309 pub fn syncen3(&self) -> SYNCEN3_R {
2310 SYNCEN3_R::new(((self.bits >> 29) & 0x01) != 0)
2311 }
2312 #[doc = "Bit 30 - Fault Control Enable For n = 6"]
2313 #[inline(always)]
2314 pub fn faulten3(&self) -> FAULTEN3_R {
2315 FAULTEN3_R::new(((self.bits >> 30) & 0x01) != 0)
2316 }
2317 #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
2318 #[inline(always)]
2319 pub fn mcombine3(&self) -> MCOMBINE3_R {
2320 MCOMBINE3_R::new(((self.bits >> 31) & 0x01) != 0)
2321 }
2322}
2323impl W {
2324 #[doc = "Bit 0 - Combine Channels For n = 0"]
2325 #[inline(always)]
2326 pub fn combine0(&mut self) -> COMBINE0_W {
2327 COMBINE0_W { w: self }
2328 }
2329 #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
2330 #[inline(always)]
2331 pub fn comp0(&mut self) -> COMP0_W {
2332 COMP0_W { w: self }
2333 }
2334 #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
2335 #[inline(always)]
2336 pub fn decapen0(&mut self) -> DECAPEN0_W {
2337 DECAPEN0_W { w: self }
2338 }
2339 #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
2340 #[inline(always)]
2341 pub fn decap0(&mut self) -> DECAP0_W {
2342 DECAP0_W { w: self }
2343 }
2344 #[doc = "Bit 4 - Deadtime Enable For n = 0"]
2345 #[inline(always)]
2346 pub fn dten0(&mut self) -> DTEN0_W {
2347 DTEN0_W { w: self }
2348 }
2349 #[doc = "Bit 5 - Synchronization Enable For n = 0"]
2350 #[inline(always)]
2351 pub fn syncen0(&mut self) -> SYNCEN0_W {
2352 SYNCEN0_W { w: self }
2353 }
2354 #[doc = "Bit 6 - Fault Control Enable For n = 0"]
2355 #[inline(always)]
2356 pub fn faulten0(&mut self) -> FAULTEN0_W {
2357 FAULTEN0_W { w: self }
2358 }
2359 #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
2360 #[inline(always)]
2361 pub fn mcombine0(&mut self) -> MCOMBINE0_W {
2362 MCOMBINE0_W { w: self }
2363 }
2364 #[doc = "Bit 8 - Combine Channels For n = 2"]
2365 #[inline(always)]
2366 pub fn combine1(&mut self) -> COMBINE1_W {
2367 COMBINE1_W { w: self }
2368 }
2369 #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
2370 #[inline(always)]
2371 pub fn comp1(&mut self) -> COMP1_W {
2372 COMP1_W { w: self }
2373 }
2374 #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
2375 #[inline(always)]
2376 pub fn decapen1(&mut self) -> DECAPEN1_W {
2377 DECAPEN1_W { w: self }
2378 }
2379 #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
2380 #[inline(always)]
2381 pub fn decap1(&mut self) -> DECAP1_W {
2382 DECAP1_W { w: self }
2383 }
2384 #[doc = "Bit 12 - Deadtime Enable For n = 2"]
2385 #[inline(always)]
2386 pub fn dten1(&mut self) -> DTEN1_W {
2387 DTEN1_W { w: self }
2388 }
2389 #[doc = "Bit 13 - Synchronization Enable For n = 2"]
2390 #[inline(always)]
2391 pub fn syncen1(&mut self) -> SYNCEN1_W {
2392 SYNCEN1_W { w: self }
2393 }
2394 #[doc = "Bit 14 - Fault Control Enable For n = 2"]
2395 #[inline(always)]
2396 pub fn faulten1(&mut self) -> FAULTEN1_W {
2397 FAULTEN1_W { w: self }
2398 }
2399 #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
2400 #[inline(always)]
2401 pub fn mcombine1(&mut self) -> MCOMBINE1_W {
2402 MCOMBINE1_W { w: self }
2403 }
2404 #[doc = "Bit 16 - Combine Channels For n = 4"]
2405 #[inline(always)]
2406 pub fn combine2(&mut self) -> COMBINE2_W {
2407 COMBINE2_W { w: self }
2408 }
2409 #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
2410 #[inline(always)]
2411 pub fn comp2(&mut self) -> COMP2_W {
2412 COMP2_W { w: self }
2413 }
2414 #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
2415 #[inline(always)]
2416 pub fn decapen2(&mut self) -> DECAPEN2_W {
2417 DECAPEN2_W { w: self }
2418 }
2419 #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
2420 #[inline(always)]
2421 pub fn decap2(&mut self) -> DECAP2_W {
2422 DECAP2_W { w: self }
2423 }
2424 #[doc = "Bit 20 - Deadtime Enable For n = 4"]
2425 #[inline(always)]
2426 pub fn dten2(&mut self) -> DTEN2_W {
2427 DTEN2_W { w: self }
2428 }
2429 #[doc = "Bit 21 - Synchronization Enable For n = 4"]
2430 #[inline(always)]
2431 pub fn syncen2(&mut self) -> SYNCEN2_W {
2432 SYNCEN2_W { w: self }
2433 }
2434 #[doc = "Bit 22 - Fault Control Enable For n = 4"]
2435 #[inline(always)]
2436 pub fn faulten2(&mut self) -> FAULTEN2_W {
2437 FAULTEN2_W { w: self }
2438 }
2439 #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
2440 #[inline(always)]
2441 pub fn mcombine2(&mut self) -> MCOMBINE2_W {
2442 MCOMBINE2_W { w: self }
2443 }
2444 #[doc = "Bit 24 - Combine Channels For n = 6"]
2445 #[inline(always)]
2446 pub fn combine3(&mut self) -> COMBINE3_W {
2447 COMBINE3_W { w: self }
2448 }
2449 #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
2450 #[inline(always)]
2451 pub fn comp3(&mut self) -> COMP3_W {
2452 COMP3_W { w: self }
2453 }
2454 #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
2455 #[inline(always)]
2456 pub fn decapen3(&mut self) -> DECAPEN3_W {
2457 DECAPEN3_W { w: self }
2458 }
2459 #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
2460 #[inline(always)]
2461 pub fn decap3(&mut self) -> DECAP3_W {
2462 DECAP3_W { w: self }
2463 }
2464 #[doc = "Bit 28 - Deadtime Enable For n = 6"]
2465 #[inline(always)]
2466 pub fn dten3(&mut self) -> DTEN3_W {
2467 DTEN3_W { w: self }
2468 }
2469 #[doc = "Bit 29 - Synchronization Enable For n = 6"]
2470 #[inline(always)]
2471 pub fn syncen3(&mut self) -> SYNCEN3_W {
2472 SYNCEN3_W { w: self }
2473 }
2474 #[doc = "Bit 30 - Fault Control Enable For n = 6"]
2475 #[inline(always)]
2476 pub fn faulten3(&mut self) -> FAULTEN3_W {
2477 FAULTEN3_W { w: self }
2478 }
2479 #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
2480 #[inline(always)]
2481 pub fn mcombine3(&mut self) -> MCOMBINE3_W {
2482 MCOMBINE3_W { w: self }
2483 }
2484 #[doc = "Writes raw bits to the register."]
2485 #[inline(always)]
2486 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2487 self.0.bits(bits);
2488 self
2489 }
2490}
2491#[doc = "Function For Linked Channels\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [combine](index.html) module"]
2492pub struct COMBINE_SPEC;
2493impl crate::RegisterSpec for COMBINE_SPEC {
2494 type Ux = u32;
2495}
2496#[doc = "`read()` method returns [combine::R](R) reader structure"]
2497impl crate::Readable for COMBINE_SPEC {
2498 type Reader = R;
2499}
2500#[doc = "`write(|w| ..)` method takes [combine::W](W) writer structure"]
2501impl crate::Writable for COMBINE_SPEC {
2502 type Writer = W;
2503}
2504#[doc = "`reset()` method sets COMBINE to value 0"]
2505impl crate::Resettable for COMBINE_SPEC {
2506 #[inline(always)]
2507 fn reset_value() -> Self::Ux {
2508 0
2509 }
2510}