s32k142w_pac/rcm/
rpc.rs

1#[doc = "Register `RPC` reader"]
2pub struct R(crate::R<RPC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RPC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RPC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RPC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `RPC` writer"]
17pub struct W(crate::W<RPC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RPC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RPC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RPC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Reset Pin Filter Select in Run and Wait Modes\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum RSTFLTSRW_A {
41    #[doc = "0: All filtering disabled"]
42    RSTFLTSRW_0 = 0,
43    #[doc = "1: Bus clock filter enabled for normal operation"]
44    RSTFLTSRW_1 = 1,
45    #[doc = "2: LPO clock filter enabled for normal operation"]
46    RSTFLTSRW_2 = 2,
47}
48impl From<RSTFLTSRW_A> for u8 {
49    #[inline(always)]
50    fn from(variant: RSTFLTSRW_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `RSTFLTSRW` reader - Reset Pin Filter Select in Run and Wait Modes"]
55pub struct RSTFLTSRW_R(crate::FieldReader<u8, RSTFLTSRW_A>);
56impl RSTFLTSRW_R {
57    #[inline(always)]
58    pub(crate) fn new(bits: u8) -> Self {
59        RSTFLTSRW_R(crate::FieldReader::new(bits))
60    }
61    #[doc = r"Get enumerated values variant"]
62    #[inline(always)]
63    pub fn variant(&self) -> Option<RSTFLTSRW_A> {
64        match self.bits {
65            0 => Some(RSTFLTSRW_A::RSTFLTSRW_0),
66            1 => Some(RSTFLTSRW_A::RSTFLTSRW_1),
67            2 => Some(RSTFLTSRW_A::RSTFLTSRW_2),
68            _ => None,
69        }
70    }
71    #[doc = "Checks if the value of the field is `RSTFLTSRW_0`"]
72    #[inline(always)]
73    pub fn is_rstfltsrw_0(&self) -> bool {
74        **self == RSTFLTSRW_A::RSTFLTSRW_0
75    }
76    #[doc = "Checks if the value of the field is `RSTFLTSRW_1`"]
77    #[inline(always)]
78    pub fn is_rstfltsrw_1(&self) -> bool {
79        **self == RSTFLTSRW_A::RSTFLTSRW_1
80    }
81    #[doc = "Checks if the value of the field is `RSTFLTSRW_2`"]
82    #[inline(always)]
83    pub fn is_rstfltsrw_2(&self) -> bool {
84        **self == RSTFLTSRW_A::RSTFLTSRW_2
85    }
86}
87impl core::ops::Deref for RSTFLTSRW_R {
88    type Target = crate::FieldReader<u8, RSTFLTSRW_A>;
89    #[inline(always)]
90    fn deref(&self) -> &Self::Target {
91        &self.0
92    }
93}
94#[doc = "Field `RSTFLTSRW` writer - Reset Pin Filter Select in Run and Wait Modes"]
95pub struct RSTFLTSRW_W<'a> {
96    w: &'a mut W,
97}
98impl<'a> RSTFLTSRW_W<'a> {
99    #[doc = r"Writes `variant` to the field"]
100    #[inline(always)]
101    pub fn variant(self, variant: RSTFLTSRW_A) -> &'a mut W {
102        unsafe { self.bits(variant.into()) }
103    }
104    #[doc = "All filtering disabled"]
105    #[inline(always)]
106    pub fn rstfltsrw_0(self) -> &'a mut W {
107        self.variant(RSTFLTSRW_A::RSTFLTSRW_0)
108    }
109    #[doc = "Bus clock filter enabled for normal operation"]
110    #[inline(always)]
111    pub fn rstfltsrw_1(self) -> &'a mut W {
112        self.variant(RSTFLTSRW_A::RSTFLTSRW_1)
113    }
114    #[doc = "LPO clock filter enabled for normal operation"]
115    #[inline(always)]
116    pub fn rstfltsrw_2(self) -> &'a mut W {
117        self.variant(RSTFLTSRW_A::RSTFLTSRW_2)
118    }
119    #[doc = r"Writes raw bits to the field"]
120    #[inline(always)]
121    pub unsafe fn bits(self, value: u8) -> &'a mut W {
122        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
123        self.w
124    }
125}
126#[doc = "Reset Pin Filter Select in Stop Mode\n\nValue on reset: 0"]
127#[derive(Clone, Copy, Debug, PartialEq)]
128pub enum RSTFLTSS_A {
129    #[doc = "0: All filtering disabled"]
130    RSTFLTSS_0 = 0,
131    #[doc = "1: LPO clock filter enabled"]
132    RSTFLTSS_1 = 1,
133}
134impl From<RSTFLTSS_A> for bool {
135    #[inline(always)]
136    fn from(variant: RSTFLTSS_A) -> Self {
137        variant as u8 != 0
138    }
139}
140#[doc = "Field `RSTFLTSS` reader - Reset Pin Filter Select in Stop Mode"]
141pub struct RSTFLTSS_R(crate::FieldReader<bool, RSTFLTSS_A>);
142impl RSTFLTSS_R {
143    #[inline(always)]
144    pub(crate) fn new(bits: bool) -> Self {
145        RSTFLTSS_R(crate::FieldReader::new(bits))
146    }
147    #[doc = r"Get enumerated values variant"]
148    #[inline(always)]
149    pub fn variant(&self) -> RSTFLTSS_A {
150        match self.bits {
151            false => RSTFLTSS_A::RSTFLTSS_0,
152            true => RSTFLTSS_A::RSTFLTSS_1,
153        }
154    }
155    #[doc = "Checks if the value of the field is `RSTFLTSS_0`"]
156    #[inline(always)]
157    pub fn is_rstfltss_0(&self) -> bool {
158        **self == RSTFLTSS_A::RSTFLTSS_0
159    }
160    #[doc = "Checks if the value of the field is `RSTFLTSS_1`"]
161    #[inline(always)]
162    pub fn is_rstfltss_1(&self) -> bool {
163        **self == RSTFLTSS_A::RSTFLTSS_1
164    }
165}
166impl core::ops::Deref for RSTFLTSS_R {
167    type Target = crate::FieldReader<bool, RSTFLTSS_A>;
168    #[inline(always)]
169    fn deref(&self) -> &Self::Target {
170        &self.0
171    }
172}
173#[doc = "Field `RSTFLTSS` writer - Reset Pin Filter Select in Stop Mode"]
174pub struct RSTFLTSS_W<'a> {
175    w: &'a mut W,
176}
177impl<'a> RSTFLTSS_W<'a> {
178    #[doc = r"Writes `variant` to the field"]
179    #[inline(always)]
180    pub fn variant(self, variant: RSTFLTSS_A) -> &'a mut W {
181        self.bit(variant.into())
182    }
183    #[doc = "All filtering disabled"]
184    #[inline(always)]
185    pub fn rstfltss_0(self) -> &'a mut W {
186        self.variant(RSTFLTSS_A::RSTFLTSS_0)
187    }
188    #[doc = "LPO clock filter enabled"]
189    #[inline(always)]
190    pub fn rstfltss_1(self) -> &'a mut W {
191        self.variant(RSTFLTSS_A::RSTFLTSS_1)
192    }
193    #[doc = r"Sets the field bit"]
194    #[inline(always)]
195    pub fn set_bit(self) -> &'a mut W {
196        self.bit(true)
197    }
198    #[doc = r"Clears the field bit"]
199    #[inline(always)]
200    pub fn clear_bit(self) -> &'a mut W {
201        self.bit(false)
202    }
203    #[doc = r"Writes raw bits to the field"]
204    #[inline(always)]
205    pub fn bit(self, value: bool) -> &'a mut W {
206        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
207        self.w
208    }
209}
210#[doc = "Field `RSTFLTSEL` reader - Reset Pin Filter Bus Clock Select"]
211pub struct RSTFLTSEL_R(crate::FieldReader<u8, u8>);
212impl RSTFLTSEL_R {
213    #[inline(always)]
214    pub(crate) fn new(bits: u8) -> Self {
215        RSTFLTSEL_R(crate::FieldReader::new(bits))
216    }
217}
218impl core::ops::Deref for RSTFLTSEL_R {
219    type Target = crate::FieldReader<u8, u8>;
220    #[inline(always)]
221    fn deref(&self) -> &Self::Target {
222        &self.0
223    }
224}
225#[doc = "Field `RSTFLTSEL` writer - Reset Pin Filter Bus Clock Select"]
226pub struct RSTFLTSEL_W<'a> {
227    w: &'a mut W,
228}
229impl<'a> RSTFLTSEL_W<'a> {
230    #[doc = r"Writes raw bits to the field"]
231    #[inline(always)]
232    pub unsafe fn bits(self, value: u8) -> &'a mut W {
233        self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u32 & 0x1f) << 8);
234        self.w
235    }
236}
237impl R {
238    #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
239    #[inline(always)]
240    pub fn rstfltsrw(&self) -> RSTFLTSRW_R {
241        RSTFLTSRW_R::new((self.bits & 0x03) as u8)
242    }
243    #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
244    #[inline(always)]
245    pub fn rstfltss(&self) -> RSTFLTSS_R {
246        RSTFLTSS_R::new(((self.bits >> 2) & 0x01) != 0)
247    }
248    #[doc = "Bits 8:12 - Reset Pin Filter Bus Clock Select"]
249    #[inline(always)]
250    pub fn rstfltsel(&self) -> RSTFLTSEL_R {
251        RSTFLTSEL_R::new(((self.bits >> 8) & 0x1f) as u8)
252    }
253}
254impl W {
255    #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
256    #[inline(always)]
257    pub fn rstfltsrw(&mut self) -> RSTFLTSRW_W {
258        RSTFLTSRW_W { w: self }
259    }
260    #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
261    #[inline(always)]
262    pub fn rstfltss(&mut self) -> RSTFLTSS_W {
263        RSTFLTSS_W { w: self }
264    }
265    #[doc = "Bits 8:12 - Reset Pin Filter Bus Clock Select"]
266    #[inline(always)]
267    pub fn rstfltsel(&mut self) -> RSTFLTSEL_W {
268        RSTFLTSEL_W { w: self }
269    }
270    #[doc = "Writes raw bits to the register."]
271    #[inline(always)]
272    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
273        self.0.bits(bits);
274        self
275    }
276}
277#[doc = "Reset Pin Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rpc](index.html) module"]
278pub struct RPC_SPEC;
279impl crate::RegisterSpec for RPC_SPEC {
280    type Ux = u32;
281}
282#[doc = "`read()` method returns [rpc::R](R) reader structure"]
283impl crate::Readable for RPC_SPEC {
284    type Reader = R;
285}
286#[doc = "`write(|w| ..)` method takes [rpc::W](W) writer structure"]
287impl crate::Writable for RPC_SPEC {
288    type Writer = W;
289}
290#[doc = "`reset()` method sets RPC to value 0"]
291impl crate::Resettable for RPC_SPEC {
292    #[inline(always)]
293    fn reset_value() -> Self::Ux {
294        0
295    }
296}
s32k142w_pac/rcm/rpc.rs

s32k142w_pac/rcm/
rpc.rs
