1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Version ID Register"]
5 pub verid: crate::Reg<verid::VERID_SPEC>,
6 #[doc = "0x04 - Parameter Register"]
7 pub param: crate::Reg<param::PARAM_SPEC>,
8 _reserved2: [u8; 0x08],
9 #[doc = "0x10 - Master Control Register"]
10 pub mcr: crate::Reg<mcr::MCR_SPEC>,
11 #[doc = "0x14 - Master Status Register"]
12 pub msr: crate::Reg<msr::MSR_SPEC>,
13 #[doc = "0x18 - Master Interrupt Enable Register"]
14 pub mier: crate::Reg<mier::MIER_SPEC>,
15 #[doc = "0x1c - Master DMA Enable Register"]
16 pub mder: crate::Reg<mder::MDER_SPEC>,
17 #[doc = "0x20 - Master Configuration Register 0"]
18 pub mcfgr0: crate::Reg<mcfgr0::MCFGR0_SPEC>,
19 #[doc = "0x24 - Master Configuration Register 1"]
20 pub mcfgr1: crate::Reg<mcfgr1::MCFGR1_SPEC>,
21 #[doc = "0x28 - Master Configuration Register 2"]
22 pub mcfgr2: crate::Reg<mcfgr2::MCFGR2_SPEC>,
23 #[doc = "0x2c - Master Configuration Register 3"]
24 pub mcfgr3: crate::Reg<mcfgr3::MCFGR3_SPEC>,
25 _reserved10: [u8; 0x10],
26 #[doc = "0x40 - Master Data Match Register"]
27 pub mdmr: crate::Reg<mdmr::MDMR_SPEC>,
28 _reserved11: [u8; 0x04],
29 #[doc = "0x48 - Master Clock Configuration Register 0"]
30 pub mccr0: crate::Reg<mccr0::MCCR0_SPEC>,
31 _reserved12: [u8; 0x04],
32 #[doc = "0x50 - Master Clock Configuration Register 1"]
33 pub mccr1: crate::Reg<mccr1::MCCR1_SPEC>,
34 _reserved13: [u8; 0x04],
35 #[doc = "0x58 - Master FIFO Control Register"]
36 pub mfcr: crate::Reg<mfcr::MFCR_SPEC>,
37 #[doc = "0x5c - Master FIFO Status Register"]
38 pub mfsr: crate::Reg<mfsr::MFSR_SPEC>,
39 #[doc = "0x60 - Master Transmit Data Register"]
40 pub mtdr: crate::Reg<mtdr::MTDR_SPEC>,
41 _reserved16: [u8; 0x0c],
42 #[doc = "0x70 - Master Receive Data Register"]
43 pub mrdr: crate::Reg<mrdr::MRDR_SPEC>,
44 _reserved17: [u8; 0x9c],
45 #[doc = "0x110 - Slave Control Register"]
46 pub scr: crate::Reg<scr::SCR_SPEC>,
47 #[doc = "0x114 - Slave Status Register"]
48 pub ssr: crate::Reg<ssr::SSR_SPEC>,
49 #[doc = "0x118 - Slave Interrupt Enable Register"]
50 pub sier: crate::Reg<sier::SIER_SPEC>,
51 #[doc = "0x11c - Slave DMA Enable Register"]
52 pub sder: crate::Reg<sder::SDER_SPEC>,
53 _reserved21: [u8; 0x04],
54 #[doc = "0x124 - Slave Configuration Register 1"]
55 pub scfgr1: crate::Reg<scfgr1::SCFGR1_SPEC>,
56 #[doc = "0x128 - Slave Configuration Register 2"]
57 pub scfgr2: crate::Reg<scfgr2::SCFGR2_SPEC>,
58 _reserved23: [u8; 0x14],
59 #[doc = "0x140 - Slave Address Match Register"]
60 pub samr: crate::Reg<samr::SAMR_SPEC>,
61 _reserved24: [u8; 0x0c],
62 #[doc = "0x150 - Slave Address Status Register"]
63 pub sasr: crate::Reg<sasr::SASR_SPEC>,
64 #[doc = "0x154 - Slave Transmit ACK Register"]
65 pub star: crate::Reg<star::STAR_SPEC>,
66 _reserved26: [u8; 0x08],
67 #[doc = "0x160 - Slave Transmit Data Register"]
68 pub stdr: crate::Reg<stdr::STDR_SPEC>,
69 _reserved27: [u8; 0x0c],
70 #[doc = "0x170 - Slave Receive Data Register"]
71 pub srdr: crate::Reg<srdr::SRDR_SPEC>,
72}
73#[doc = "VERID register accessor: an alias for `Reg<VERID_SPEC>`"]
74pub type VERID = crate::Reg<verid::VERID_SPEC>;
75#[doc = "Version ID Register"]
76pub mod verid;
77#[doc = "PARAM register accessor: an alias for `Reg<PARAM_SPEC>`"]
78pub type PARAM = crate::Reg<param::PARAM_SPEC>;
79#[doc = "Parameter Register"]
80pub mod param;
81#[doc = "MCR register accessor: an alias for `Reg<MCR_SPEC>`"]
82pub type MCR = crate::Reg<mcr::MCR_SPEC>;
83#[doc = "Master Control Register"]
84pub mod mcr;
85#[doc = "MSR register accessor: an alias for `Reg<MSR_SPEC>`"]
86pub type MSR = crate::Reg<msr::MSR_SPEC>;
87#[doc = "Master Status Register"]
88pub mod msr;
89#[doc = "MIER register accessor: an alias for `Reg<MIER_SPEC>`"]
90pub type MIER = crate::Reg<mier::MIER_SPEC>;
91#[doc = "Master Interrupt Enable Register"]
92pub mod mier;
93#[doc = "MDER register accessor: an alias for `Reg<MDER_SPEC>`"]
94pub type MDER = crate::Reg<mder::MDER_SPEC>;
95#[doc = "Master DMA Enable Register"]
96pub mod mder;
97#[doc = "MCFGR0 register accessor: an alias for `Reg<MCFGR0_SPEC>`"]
98pub type MCFGR0 = crate::Reg<mcfgr0::MCFGR0_SPEC>;
99#[doc = "Master Configuration Register 0"]
100pub mod mcfgr0;
101#[doc = "MCFGR1 register accessor: an alias for `Reg<MCFGR1_SPEC>`"]
102pub type MCFGR1 = crate::Reg<mcfgr1::MCFGR1_SPEC>;
103#[doc = "Master Configuration Register 1"]
104pub mod mcfgr1;
105#[doc = "MCFGR2 register accessor: an alias for `Reg<MCFGR2_SPEC>`"]
106pub type MCFGR2 = crate::Reg<mcfgr2::MCFGR2_SPEC>;
107#[doc = "Master Configuration Register 2"]
108pub mod mcfgr2;
109#[doc = "MCFGR3 register accessor: an alias for `Reg<MCFGR3_SPEC>`"]
110pub type MCFGR3 = crate::Reg<mcfgr3::MCFGR3_SPEC>;
111#[doc = "Master Configuration Register 3"]
112pub mod mcfgr3;
113#[doc = "MDMR register accessor: an alias for `Reg<MDMR_SPEC>`"]
114pub type MDMR = crate::Reg<mdmr::MDMR_SPEC>;
115#[doc = "Master Data Match Register"]
116pub mod mdmr;
117#[doc = "MCCR0 register accessor: an alias for `Reg<MCCR0_SPEC>`"]
118pub type MCCR0 = crate::Reg<mccr0::MCCR0_SPEC>;
119#[doc = "Master Clock Configuration Register 0"]
120pub mod mccr0;
121#[doc = "MCCR1 register accessor: an alias for `Reg<MCCR1_SPEC>`"]
122pub type MCCR1 = crate::Reg<mccr1::MCCR1_SPEC>;
123#[doc = "Master Clock Configuration Register 1"]
124pub mod mccr1;
125#[doc = "MFCR register accessor: an alias for `Reg<MFCR_SPEC>`"]
126pub type MFCR = crate::Reg<mfcr::MFCR_SPEC>;
127#[doc = "Master FIFO Control Register"]
128pub mod mfcr;
129#[doc = "MFSR register accessor: an alias for `Reg<MFSR_SPEC>`"]
130pub type MFSR = crate::Reg<mfsr::MFSR_SPEC>;
131#[doc = "Master FIFO Status Register"]
132pub mod mfsr;
133#[doc = "MTDR register accessor: an alias for `Reg<MTDR_SPEC>`"]
134pub type MTDR = crate::Reg<mtdr::MTDR_SPEC>;
135#[doc = "Master Transmit Data Register"]
136pub mod mtdr;
137#[doc = "MRDR register accessor: an alias for `Reg<MRDR_SPEC>`"]
138pub type MRDR = crate::Reg<mrdr::MRDR_SPEC>;
139#[doc = "Master Receive Data Register"]
140pub mod mrdr;
141#[doc = "SCR register accessor: an alias for `Reg<SCR_SPEC>`"]
142pub type SCR = crate::Reg<scr::SCR_SPEC>;
143#[doc = "Slave Control Register"]
144pub mod scr;
145#[doc = "SSR register accessor: an alias for `Reg<SSR_SPEC>`"]
146pub type SSR = crate::Reg<ssr::SSR_SPEC>;
147#[doc = "Slave Status Register"]
148pub mod ssr;
149#[doc = "SIER register accessor: an alias for `Reg<SIER_SPEC>`"]
150pub type SIER = crate::Reg<sier::SIER_SPEC>;
151#[doc = "Slave Interrupt Enable Register"]
152pub mod sier;
153#[doc = "SDER register accessor: an alias for `Reg<SDER_SPEC>`"]
154pub type SDER = crate::Reg<sder::SDER_SPEC>;
155#[doc = "Slave DMA Enable Register"]
156pub mod sder;
157#[doc = "SCFGR1 register accessor: an alias for `Reg<SCFGR1_SPEC>`"]
158pub type SCFGR1 = crate::Reg<scfgr1::SCFGR1_SPEC>;
159#[doc = "Slave Configuration Register 1"]
160pub mod scfgr1;
161#[doc = "SCFGR2 register accessor: an alias for `Reg<SCFGR2_SPEC>`"]
162pub type SCFGR2 = crate::Reg<scfgr2::SCFGR2_SPEC>;
163#[doc = "Slave Configuration Register 2"]
164pub mod scfgr2;
165#[doc = "SAMR register accessor: an alias for `Reg<SAMR_SPEC>`"]
166pub type SAMR = crate::Reg<samr::SAMR_SPEC>;
167#[doc = "Slave Address Match Register"]
168pub mod samr;
169#[doc = "SASR register accessor: an alias for `Reg<SASR_SPEC>`"]
170pub type SASR = crate::Reg<sasr::SASR_SPEC>;
171#[doc = "Slave Address Status Register"]
172pub mod sasr;
173#[doc = "STAR register accessor: an alias for `Reg<STAR_SPEC>`"]
174pub type STAR = crate::Reg<star::STAR_SPEC>;
175#[doc = "Slave Transmit ACK Register"]
176pub mod star;
177#[doc = "STDR register accessor: an alias for `Reg<STDR_SPEC>`"]
178pub type STDR = crate::Reg<stdr::STDR_SPEC>;
179#[doc = "Slave Transmit Data Register"]
180pub mod stdr;
181#[doc = "SRDR register accessor: an alias for `Reg<SRDR_SPEC>`"]
182pub type SRDR = crate::Reg<srdr::SRDR_SPEC>;
183#[doc = "Slave Receive Data Register"]
184pub mod srdr;