1#![doc = "Peripheral access API for S32K142 microcontrollers (generated using svd2rust v0.21.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.21.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
3#![deny(const_err)]
4#![deny(dead_code)]
5#![deny(improper_ctypes)]
6#![deny(missing_docs)]
7#![deny(no_mangle_generic_items)]
8#![deny(non_shorthand_field_patterns)]
9#![deny(overflowing_literals)]
10#![deny(path_statements)]
11#![deny(patterns_in_fns_without_body)]
12#![deny(private_in_public)]
13#![deny(unconditional_recursion)]
14#![deny(unused_allocation)]
15#![deny(unused_comparisons)]
16#![deny(unused_parens)]
17#![deny(while_true)]
18#![allow(non_camel_case_types)]
19#![allow(non_snake_case)]
20#![no_std]
21use core::marker::PhantomData;
22use core::ops::Deref;
23#[doc = r"Number available in the NVIC for configuring priority"]
24pub const NVIC_PRIO_BITS: u8 = 4;
25#[cfg(feature = "rt")]
26pub use self::Interrupt as interrupt;
27pub use cortex_m::peripheral::Peripherals as CorePeripherals;
28pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
29#[cfg(feature = "rt")]
30pub use cortex_m_rt::interrupt;
31#[allow(unused_imports)]
32use generic::*;
33#[doc = r"Common register and bit access and modify traits"]
34pub mod generic;
35#[cfg(feature = "rt")]
36extern "C" {
37 fn DMA0();
38 fn DMA1();
39 fn DMA2();
40 fn DMA3();
41 fn DMA4();
42 fn DMA5();
43 fn DMA6();
44 fn DMA7();
45 fn DMA8();
46 fn DMA9();
47 fn DMA10();
48 fn DMA11();
49 fn DMA12();
50 fn DMA13();
51 fn DMA14();
52 fn DMA15();
53 fn DMA_ERROR();
54 fn MCM();
55 fn FTFC();
56 fn READ_COLLISION();
57 fn LVD_LVW();
58 fn FTFC_FAULT();
59 fn WDOG_EWM();
60 fn RCM();
61 fn LPI2C0_MASTER();
62 fn LPI2C0_SLAVE();
63 fn LPSPI0();
64 fn LPSPI1();
65 fn LPUART0_RXTX();
66 fn LPUART1_RXTX();
67 fn ADC0();
68 fn ADC1();
69 fn CMP0();
70 fn ERM_SINGLE_FAULT();
71 fn ERM_DOUBLE_FAULT();
72 fn RTC();
73 fn RTC_SECONDS();
74 fn LPIT0_CH0();
75 fn LPIT0_CH1();
76 fn LPIT0_CH2();
77 fn LPIT0_CH3();
78 fn PDB0();
79 fn SCG();
80 fn LPTMR0();
81 fn PORTA();
82 fn PORTB();
83 fn PORTC();
84 fn PORTD();
85 fn PORTE();
86 fn SWI();
87 fn PDB1();
88 fn FLEXIO();
89 fn CAN0_ORED();
90 fn CAN0_ERROR();
91 fn CAN0_WAKE_UP();
92 fn CAN0_ORED_0_15_MB();
93 fn CAN0_ORED_16_31_MB();
94 fn CAN1_ORED();
95 fn CAN1_ERROR();
96 fn CAN1_ORED_0_15_MB();
97 fn FTM0_CH0_CH1();
98 fn FTM0_CH2_CH3();
99 fn FTM0_CH4_CH5();
100 fn FTM0_CH6_CH7();
101 fn FTM0_FAULT();
102 fn FTM0_OVF_RELOAD();
103 fn FTM1_CH0_CH1();
104 fn FTM1_CH2_CH3();
105 fn FTM1_CH4_CH5();
106 fn FTM1_CH6_CH7();
107 fn FTM1_FAULT();
108 fn FTM1_OVF_RELOAD();
109 fn FTM2_CH0_CH1();
110 fn FTM2_CH2_CH3();
111 fn FTM2_CH4_CH5();
112 fn FTM2_CH6_CH7();
113 fn FTM2_FAULT();
114 fn FTM2_OVF_RELOAD();
115 fn FTM3_CH0_CH1();
116 fn FTM3_CH2_CH3();
117 fn FTM3_CH4_CH5();
118 fn FTM3_CH6_CH7();
119 fn FTM3_FAULT();
120 fn FTM3_OVF_RELOAD();
121}
122#[doc(hidden)]
123pub union Vector {
124 _handler: unsafe extern "C" fn(),
125 _reserved: u32,
126}
127#[cfg(feature = "rt")]
128#[doc(hidden)]
129#[link_section = ".vector_table.interrupts"]
130#[no_mangle]
131pub static __INTERRUPTS: [Vector; 123] = [
132 Vector { _handler: DMA0 },
133 Vector { _handler: DMA1 },
134 Vector { _handler: DMA2 },
135 Vector { _handler: DMA3 },
136 Vector { _handler: DMA4 },
137 Vector { _handler: DMA5 },
138 Vector { _handler: DMA6 },
139 Vector { _handler: DMA7 },
140 Vector { _handler: DMA8 },
141 Vector { _handler: DMA9 },
142 Vector { _handler: DMA10 },
143 Vector { _handler: DMA11 },
144 Vector { _handler: DMA12 },
145 Vector { _handler: DMA13 },
146 Vector { _handler: DMA14 },
147 Vector { _handler: DMA15 },
148 Vector {
149 _handler: DMA_ERROR,
150 },
151 Vector { _handler: MCM },
152 Vector { _handler: FTFC },
153 Vector {
154 _handler: READ_COLLISION,
155 },
156 Vector { _handler: LVD_LVW },
157 Vector {
158 _handler: FTFC_FAULT,
159 },
160 Vector { _handler: WDOG_EWM },
161 Vector { _handler: RCM },
162 Vector {
163 _handler: LPI2C0_MASTER,
164 },
165 Vector {
166 _handler: LPI2C0_SLAVE,
167 },
168 Vector { _handler: LPSPI0 },
169 Vector { _handler: LPSPI1 },
170 Vector { _reserved: 0 },
171 Vector { _reserved: 0 },
172 Vector { _reserved: 0 },
173 Vector {
174 _handler: LPUART0_RXTX,
175 },
176 Vector { _reserved: 0 },
177 Vector {
178 _handler: LPUART1_RXTX,
179 },
180 Vector { _reserved: 0 },
181 Vector { _reserved: 0 },
182 Vector { _reserved: 0 },
183 Vector { _reserved: 0 },
184 Vector { _reserved: 0 },
185 Vector { _handler: ADC0 },
186 Vector { _handler: ADC1 },
187 Vector { _handler: CMP0 },
188 Vector { _reserved: 0 },
189 Vector { _reserved: 0 },
190 Vector {
191 _handler: ERM_SINGLE_FAULT,
192 },
193 Vector {
194 _handler: ERM_DOUBLE_FAULT,
195 },
196 Vector { _handler: RTC },
197 Vector {
198 _handler: RTC_SECONDS,
199 },
200 Vector {
201 _handler: LPIT0_CH0,
202 },
203 Vector {
204 _handler: LPIT0_CH1,
205 },
206 Vector {
207 _handler: LPIT0_CH2,
208 },
209 Vector {
210 _handler: LPIT0_CH3,
211 },
212 Vector { _handler: PDB0 },
213 Vector { _reserved: 0 },
214 Vector { _reserved: 0 },
215 Vector { _reserved: 0 },
216 Vector { _reserved: 0 },
217 Vector { _handler: SCG },
218 Vector { _handler: LPTMR0 },
219 Vector { _handler: PORTA },
220 Vector { _handler: PORTB },
221 Vector { _handler: PORTC },
222 Vector { _handler: PORTD },
223 Vector { _handler: PORTE },
224 Vector { _handler: SWI },
225 Vector { _reserved: 0 },
226 Vector { _reserved: 0 },
227 Vector { _reserved: 0 },
228 Vector { _handler: PDB1 },
229 Vector { _handler: FLEXIO },
230 Vector { _reserved: 0 },
231 Vector { _reserved: 0 },
232 Vector { _reserved: 0 },
233 Vector { _reserved: 0 },
234 Vector { _reserved: 0 },
235 Vector { _reserved: 0 },
236 Vector { _reserved: 0 },
237 Vector { _reserved: 0 },
238 Vector {
239 _handler: CAN0_ORED,
240 },
241 Vector {
242 _handler: CAN0_ERROR,
243 },
244 Vector {
245 _handler: CAN0_WAKE_UP,
246 },
247 Vector {
248 _handler: CAN0_ORED_0_15_MB,
249 },
250 Vector {
251 _handler: CAN0_ORED_16_31_MB,
252 },
253 Vector { _reserved: 0 },
254 Vector { _reserved: 0 },
255 Vector {
256 _handler: CAN1_ORED,
257 },
258 Vector {
259 _handler: CAN1_ERROR,
260 },
261 Vector { _reserved: 0 },
262 Vector {
263 _handler: CAN1_ORED_0_15_MB,
264 },
265 Vector { _reserved: 0 },
266 Vector { _reserved: 0 },
267 Vector { _reserved: 0 },
268 Vector { _reserved: 0 },
269 Vector { _reserved: 0 },
270 Vector { _reserved: 0 },
271 Vector { _reserved: 0 },
272 Vector { _reserved: 0 },
273 Vector { _reserved: 0 },
274 Vector { _reserved: 0 },
275 Vector {
276 _handler: FTM0_CH0_CH1,
277 },
278 Vector {
279 _handler: FTM0_CH2_CH3,
280 },
281 Vector {
282 _handler: FTM0_CH4_CH5,
283 },
284 Vector {
285 _handler: FTM0_CH6_CH7,
286 },
287 Vector {
288 _handler: FTM0_FAULT,
289 },
290 Vector {
291 _handler: FTM0_OVF_RELOAD,
292 },
293 Vector {
294 _handler: FTM1_CH0_CH1,
295 },
296 Vector {
297 _handler: FTM1_CH2_CH3,
298 },
299 Vector {
300 _handler: FTM1_CH4_CH5,
301 },
302 Vector {
303 _handler: FTM1_CH6_CH7,
304 },
305 Vector {
306 _handler: FTM1_FAULT,
307 },
308 Vector {
309 _handler: FTM1_OVF_RELOAD,
310 },
311 Vector {
312 _handler: FTM2_CH0_CH1,
313 },
314 Vector {
315 _handler: FTM2_CH2_CH3,
316 },
317 Vector {
318 _handler: FTM2_CH4_CH5,
319 },
320 Vector {
321 _handler: FTM2_CH6_CH7,
322 },
323 Vector {
324 _handler: FTM2_FAULT,
325 },
326 Vector {
327 _handler: FTM2_OVF_RELOAD,
328 },
329 Vector {
330 _handler: FTM3_CH0_CH1,
331 },
332 Vector {
333 _handler: FTM3_CH2_CH3,
334 },
335 Vector {
336 _handler: FTM3_CH4_CH5,
337 },
338 Vector {
339 _handler: FTM3_CH6_CH7,
340 },
341 Vector {
342 _handler: FTM3_FAULT,
343 },
344 Vector {
345 _handler: FTM3_OVF_RELOAD,
346 },
347];
348#[doc = r"Enumeration of all the interrupts."]
349#[derive(Copy, Clone, Debug, PartialEq, Eq)]
350#[repr(u16)]
351pub enum Interrupt {
352 #[doc = "0 - DMA0"]
353 DMA0 = 0,
354 #[doc = "1 - DMA1"]
355 DMA1 = 1,
356 #[doc = "2 - DMA2"]
357 DMA2 = 2,
358 #[doc = "3 - DMA3"]
359 DMA3 = 3,
360 #[doc = "4 - DMA4"]
361 DMA4 = 4,
362 #[doc = "5 - DMA5"]
363 DMA5 = 5,
364 #[doc = "6 - DMA6"]
365 DMA6 = 6,
366 #[doc = "7 - DMA7"]
367 DMA7 = 7,
368 #[doc = "8 - DMA8"]
369 DMA8 = 8,
370 #[doc = "9 - DMA9"]
371 DMA9 = 9,
372 #[doc = "10 - DMA10"]
373 DMA10 = 10,
374 #[doc = "11 - DMA11"]
375 DMA11 = 11,
376 #[doc = "12 - DMA12"]
377 DMA12 = 12,
378 #[doc = "13 - DMA13"]
379 DMA13 = 13,
380 #[doc = "14 - DMA14"]
381 DMA14 = 14,
382 #[doc = "15 - DMA15"]
383 DMA15 = 15,
384 #[doc = "16 - DMA_Error"]
385 DMA_ERROR = 16,
386 #[doc = "17 - MCM"]
387 MCM = 17,
388 #[doc = "18 - FTFC"]
389 FTFC = 18,
390 #[doc = "19 - Read_Collision"]
391 READ_COLLISION = 19,
392 #[doc = "20 - LVD_LVW"]
393 LVD_LVW = 20,
394 #[doc = "21 - FTFC_Fault"]
395 FTFC_FAULT = 21,
396 #[doc = "22 - WDOG_EWM"]
397 WDOG_EWM = 22,
398 #[doc = "23 - RCM"]
399 RCM = 23,
400 #[doc = "24 - LPI2C0_Master"]
401 LPI2C0_MASTER = 24,
402 #[doc = "25 - LPI2C0_Slave"]
403 LPI2C0_SLAVE = 25,
404 #[doc = "26 - LPSPI0"]
405 LPSPI0 = 26,
406 #[doc = "27 - LPSPI1"]
407 LPSPI1 = 27,
408 #[doc = "31 - LPUART0_RxTx"]
409 LPUART0_RXTX = 31,
410 #[doc = "33 - LPUART1_RxTx"]
411 LPUART1_RXTX = 33,
412 #[doc = "39 - ADC0"]
413 ADC0 = 39,
414 #[doc = "40 - ADC1"]
415 ADC1 = 40,
416 #[doc = "41 - CMP0"]
417 CMP0 = 41,
418 #[doc = "44 - ERM_single_fault"]
419 ERM_SINGLE_FAULT = 44,
420 #[doc = "45 - ERM_double_fault"]
421 ERM_DOUBLE_FAULT = 45,
422 #[doc = "46 - RTC"]
423 RTC = 46,
424 #[doc = "47 - RTC_Seconds"]
425 RTC_SECONDS = 47,
426 #[doc = "48 - LPIT0_Ch0"]
427 LPIT0_CH0 = 48,
428 #[doc = "49 - LPIT0_Ch1"]
429 LPIT0_CH1 = 49,
430 #[doc = "50 - LPIT0_Ch2"]
431 LPIT0_CH2 = 50,
432 #[doc = "51 - LPIT0_Ch3"]
433 LPIT0_CH3 = 51,
434 #[doc = "52 - PDB0"]
435 PDB0 = 52,
436 #[doc = "57 - SCG"]
437 SCG = 57,
438 #[doc = "58 - LPTMR0"]
439 LPTMR0 = 58,
440 #[doc = "59 - PORTA"]
441 PORTA = 59,
442 #[doc = "60 - PORTB"]
443 PORTB = 60,
444 #[doc = "61 - PORTC"]
445 PORTC = 61,
446 #[doc = "62 - PORTD"]
447 PORTD = 62,
448 #[doc = "63 - PORTE"]
449 PORTE = 63,
450 #[doc = "64 - SWI"]
451 SWI = 64,
452 #[doc = "68 - PDB1"]
453 PDB1 = 68,
454 #[doc = "69 - FLEXIO"]
455 FLEXIO = 69,
456 #[doc = "78 - CAN0_ORed"]
457 CAN0_ORED = 78,
458 #[doc = "79 - CAN0_Error"]
459 CAN0_ERROR = 79,
460 #[doc = "80 - CAN0_Wake_Up"]
461 CAN0_WAKE_UP = 80,
462 #[doc = "81 - CAN0_ORed_0_15_MB"]
463 CAN0_ORED_0_15_MB = 81,
464 #[doc = "82 - CAN0_ORed_16_31_MB"]
465 CAN0_ORED_16_31_MB = 82,
466 #[doc = "85 - CAN1_ORed"]
467 CAN1_ORED = 85,
468 #[doc = "86 - CAN1_Error"]
469 CAN1_ERROR = 86,
470 #[doc = "88 - CAN1_ORed_0_15_MB"]
471 CAN1_ORED_0_15_MB = 88,
472 #[doc = "99 - FTM0_Ch0_Ch1"]
473 FTM0_CH0_CH1 = 99,
474 #[doc = "100 - FTM0_Ch2_Ch3"]
475 FTM0_CH2_CH3 = 100,
476 #[doc = "101 - FTM0_Ch4_Ch5"]
477 FTM0_CH4_CH5 = 101,
478 #[doc = "102 - FTM0_Ch6_Ch7"]
479 FTM0_CH6_CH7 = 102,
480 #[doc = "103 - FTM0_Fault"]
481 FTM0_FAULT = 103,
482 #[doc = "104 - FTM0_Ovf_Reload"]
483 FTM0_OVF_RELOAD = 104,
484 #[doc = "105 - FTM1_Ch0_Ch1"]
485 FTM1_CH0_CH1 = 105,
486 #[doc = "106 - FTM1_Ch2_Ch3"]
487 FTM1_CH2_CH3 = 106,
488 #[doc = "107 - FTM1_Ch4_Ch5"]
489 FTM1_CH4_CH5 = 107,
490 #[doc = "108 - FTM1_Ch6_Ch7"]
491 FTM1_CH6_CH7 = 108,
492 #[doc = "109 - FTM1_Fault"]
493 FTM1_FAULT = 109,
494 #[doc = "110 - FTM1_Ovf_Reload"]
495 FTM1_OVF_RELOAD = 110,
496 #[doc = "111 - FTM2_Ch0_Ch1"]
497 FTM2_CH0_CH1 = 111,
498 #[doc = "112 - FTM2_Ch2_Ch3"]
499 FTM2_CH2_CH3 = 112,
500 #[doc = "113 - FTM2_Ch4_Ch5"]
501 FTM2_CH4_CH5 = 113,
502 #[doc = "114 - FTM2_Ch6_Ch7"]
503 FTM2_CH6_CH7 = 114,
504 #[doc = "115 - FTM2_Fault"]
505 FTM2_FAULT = 115,
506 #[doc = "116 - FTM2_Ovf_Reload"]
507 FTM2_OVF_RELOAD = 116,
508 #[doc = "117 - FTM3_Ch0_Ch1"]
509 FTM3_CH0_CH1 = 117,
510 #[doc = "118 - FTM3_Ch2_Ch3"]
511 FTM3_CH2_CH3 = 118,
512 #[doc = "119 - FTM3_Ch4_Ch5"]
513 FTM3_CH4_CH5 = 119,
514 #[doc = "120 - FTM3_Ch6_Ch7"]
515 FTM3_CH6_CH7 = 120,
516 #[doc = "121 - FTM3_Fault"]
517 FTM3_FAULT = 121,
518 #[doc = "122 - FTM3_Ovf_Reload"]
519 FTM3_OVF_RELOAD = 122,
520}
521unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
522 #[inline(always)]
523 fn number(self) -> u16 {
524 self as u16
525 }
526}
527#[doc = "CSE_PRAM"]
528pub struct CSE_PRAM {
529 _marker: PhantomData<*const ()>,
530}
531unsafe impl Send for CSE_PRAM {}
532impl CSE_PRAM {
533 #[doc = r"Pointer to the register block"]
534 pub const PTR: *const cse_pram::RegisterBlock = 0x1400_1000 as *const _;
535 #[doc = r"Return the pointer to the register block"]
536 #[inline(always)]
537 pub const fn ptr() -> *const cse_pram::RegisterBlock {
538 Self::PTR
539 }
540}
541impl Deref for CSE_PRAM {
542 type Target = cse_pram::RegisterBlock;
543 #[inline(always)]
544 fn deref(&self) -> &Self::Target {
545 unsafe { &*Self::PTR }
546 }
547}
548impl core::fmt::Debug for CSE_PRAM {
549 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
550 f.debug_struct("CSE_PRAM").finish()
551 }
552}
553#[doc = "CSE_PRAM"]
554pub mod cse_pram;
555#[doc = "AIPS-Lite Bridge"]
556pub struct AIPS {
557 _marker: PhantomData<*const ()>,
558}
559unsafe impl Send for AIPS {}
560impl AIPS {
561 #[doc = r"Pointer to the register block"]
562 pub const PTR: *const aips::RegisterBlock = 0x4000_0000 as *const _;
563 #[doc = r"Return the pointer to the register block"]
564 #[inline(always)]
565 pub const fn ptr() -> *const aips::RegisterBlock {
566 Self::PTR
567 }
568}
569impl Deref for AIPS {
570 type Target = aips::RegisterBlock;
571 #[inline(always)]
572 fn deref(&self) -> &Self::Target {
573 unsafe { &*Self::PTR }
574 }
575}
576impl core::fmt::Debug for AIPS {
577 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
578 f.debug_struct("AIPS").finish()
579 }
580}
581#[doc = "AIPS-Lite Bridge"]
582pub mod aips;
583#[doc = "MSCM"]
584pub struct MSCM {
585 _marker: PhantomData<*const ()>,
586}
587unsafe impl Send for MSCM {}
588impl MSCM {
589 #[doc = r"Pointer to the register block"]
590 pub const PTR: *const mscm::RegisterBlock = 0x4000_1000 as *const _;
591 #[doc = r"Return the pointer to the register block"]
592 #[inline(always)]
593 pub const fn ptr() -> *const mscm::RegisterBlock {
594 Self::PTR
595 }
596}
597impl Deref for MSCM {
598 type Target = mscm::RegisterBlock;
599 #[inline(always)]
600 fn deref(&self) -> &Self::Target {
601 unsafe { &*Self::PTR }
602 }
603}
604impl core::fmt::Debug for MSCM {
605 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
606 f.debug_struct("MSCM").finish()
607 }
608}
609#[doc = "MSCM"]
610pub mod mscm;
611#[doc = "Enhanced Direct Memory Access"]
612pub struct DMA {
613 _marker: PhantomData<*const ()>,
614}
615unsafe impl Send for DMA {}
616impl DMA {
617 #[doc = r"Pointer to the register block"]
618 pub const PTR: *const dma::RegisterBlock = 0x4000_8000 as *const _;
619 #[doc = r"Return the pointer to the register block"]
620 #[inline(always)]
621 pub const fn ptr() -> *const dma::RegisterBlock {
622 Self::PTR
623 }
624}
625impl Deref for DMA {
626 type Target = dma::RegisterBlock;
627 #[inline(always)]
628 fn deref(&self) -> &Self::Target {
629 unsafe { &*Self::PTR }
630 }
631}
632impl core::fmt::Debug for DMA {
633 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
634 f.debug_struct("DMA").finish()
635 }
636}
637#[doc = "Enhanced Direct Memory Access"]
638pub mod dma;
639#[doc = "ERM"]
640pub struct ERM {
641 _marker: PhantomData<*const ()>,
642}
643unsafe impl Send for ERM {}
644impl ERM {
645 #[doc = r"Pointer to the register block"]
646 pub const PTR: *const erm::RegisterBlock = 0x4001_8000 as *const _;
647 #[doc = r"Return the pointer to the register block"]
648 #[inline(always)]
649 pub const fn ptr() -> *const erm::RegisterBlock {
650 Self::PTR
651 }
652}
653impl Deref for ERM {
654 type Target = erm::RegisterBlock;
655 #[inline(always)]
656 fn deref(&self) -> &Self::Target {
657 unsafe { &*Self::PTR }
658 }
659}
660impl core::fmt::Debug for ERM {
661 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
662 f.debug_struct("ERM").finish()
663 }
664}
665#[doc = "ERM"]
666pub mod erm;
667#[doc = "Error Injection Module"]
668pub struct EIM {
669 _marker: PhantomData<*const ()>,
670}
671unsafe impl Send for EIM {}
672impl EIM {
673 #[doc = r"Pointer to the register block"]
674 pub const PTR: *const eim::RegisterBlock = 0x4001_9000 as *const _;
675 #[doc = r"Return the pointer to the register block"]
676 #[inline(always)]
677 pub const fn ptr() -> *const eim::RegisterBlock {
678 Self::PTR
679 }
680}
681impl Deref for EIM {
682 type Target = eim::RegisterBlock;
683 #[inline(always)]
684 fn deref(&self) -> &Self::Target {
685 unsafe { &*Self::PTR }
686 }
687}
688impl core::fmt::Debug for EIM {
689 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
690 f.debug_struct("EIM").finish()
691 }
692}
693#[doc = "Error Injection Module"]
694pub mod eim;
695#[doc = "FTFC"]
696pub struct FTFC {
697 _marker: PhantomData<*const ()>,
698}
699unsafe impl Send for FTFC {}
700impl FTFC {
701 #[doc = r"Pointer to the register block"]
702 pub const PTR: *const ftfc::RegisterBlock = 0x4002_0000 as *const _;
703 #[doc = r"Return the pointer to the register block"]
704 #[inline(always)]
705 pub const fn ptr() -> *const ftfc::RegisterBlock {
706 Self::PTR
707 }
708}
709impl Deref for FTFC {
710 type Target = ftfc::RegisterBlock;
711 #[inline(always)]
712 fn deref(&self) -> &Self::Target {
713 unsafe { &*Self::PTR }
714 }
715}
716impl core::fmt::Debug for FTFC {
717 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
718 f.debug_struct("FTFC").finish()
719 }
720}
721#[doc = "FTFC"]
722pub mod ftfc;
723#[doc = "DMA channel multiplexor"]
724pub struct DMAMUX {
725 _marker: PhantomData<*const ()>,
726}
727unsafe impl Send for DMAMUX {}
728impl DMAMUX {
729 #[doc = r"Pointer to the register block"]
730 pub const PTR: *const dmamux::RegisterBlock = 0x4002_1000 as *const _;
731 #[doc = r"Return the pointer to the register block"]
732 #[inline(always)]
733 pub const fn ptr() -> *const dmamux::RegisterBlock {
734 Self::PTR
735 }
736}
737impl Deref for DMAMUX {
738 type Target = dmamux::RegisterBlock;
739 #[inline(always)]
740 fn deref(&self) -> &Self::Target {
741 unsafe { &*Self::PTR }
742 }
743}
744impl core::fmt::Debug for DMAMUX {
745 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
746 f.debug_struct("DMAMUX").finish()
747 }
748}
749#[doc = "DMA channel multiplexor"]
750pub mod dmamux;
751#[doc = "Flex Controller Area Network module"]
752pub struct CAN0 {
753 _marker: PhantomData<*const ()>,
754}
755unsafe impl Send for CAN0 {}
756impl CAN0 {
757 #[doc = r"Pointer to the register block"]
758 pub const PTR: *const can0::RegisterBlock = 0x4002_4000 as *const _;
759 #[doc = r"Return the pointer to the register block"]
760 #[inline(always)]
761 pub const fn ptr() -> *const can0::RegisterBlock {
762 Self::PTR
763 }
764}
765impl Deref for CAN0 {
766 type Target = can0::RegisterBlock;
767 #[inline(always)]
768 fn deref(&self) -> &Self::Target {
769 unsafe { &*Self::PTR }
770 }
771}
772impl core::fmt::Debug for CAN0 {
773 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
774 f.debug_struct("CAN0").finish()
775 }
776}
777#[doc = "Flex Controller Area Network module"]
778pub mod can0;
779#[doc = "Flex Controller Area Network module"]
780pub struct CAN1 {
781 _marker: PhantomData<*const ()>,
782}
783unsafe impl Send for CAN1 {}
784impl CAN1 {
785 #[doc = r"Pointer to the register block"]
786 pub const PTR: *const can1::RegisterBlock = 0x4002_5000 as *const _;
787 #[doc = r"Return the pointer to the register block"]
788 #[inline(always)]
789 pub const fn ptr() -> *const can1::RegisterBlock {
790 Self::PTR
791 }
792}
793impl Deref for CAN1 {
794 type Target = can1::RegisterBlock;
795 #[inline(always)]
796 fn deref(&self) -> &Self::Target {
797 unsafe { &*Self::PTR }
798 }
799}
800impl core::fmt::Debug for CAN1 {
801 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
802 f.debug_struct("CAN1").finish()
803 }
804}
805#[doc = "Flex Controller Area Network module"]
806pub mod can1;
807#[doc = "FlexTimer Module"]
808pub struct FTM0 {
809 _marker: PhantomData<*const ()>,
810}
811unsafe impl Send for FTM0 {}
812impl FTM0 {
813 #[doc = r"Pointer to the register block"]
814 pub const PTR: *const ftm0::RegisterBlock = 0x4003_8000 as *const _;
815 #[doc = r"Return the pointer to the register block"]
816 #[inline(always)]
817 pub const fn ptr() -> *const ftm0::RegisterBlock {
818 Self::PTR
819 }
820}
821impl Deref for FTM0 {
822 type Target = ftm0::RegisterBlock;
823 #[inline(always)]
824 fn deref(&self) -> &Self::Target {
825 unsafe { &*Self::PTR }
826 }
827}
828impl core::fmt::Debug for FTM0 {
829 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
830 f.debug_struct("FTM0").finish()
831 }
832}
833#[doc = "FlexTimer Module"]
834pub mod ftm0;
835#[doc = "FlexTimer Module"]
836pub struct FTM1 {
837 _marker: PhantomData<*const ()>,
838}
839unsafe impl Send for FTM1 {}
840impl FTM1 {
841 #[doc = r"Pointer to the register block"]
842 pub const PTR: *const ftm1::RegisterBlock = 0x4003_9000 as *const _;
843 #[doc = r"Return the pointer to the register block"]
844 #[inline(always)]
845 pub const fn ptr() -> *const ftm1::RegisterBlock {
846 Self::PTR
847 }
848}
849impl Deref for FTM1 {
850 type Target = ftm1::RegisterBlock;
851 #[inline(always)]
852 fn deref(&self) -> &Self::Target {
853 unsafe { &*Self::PTR }
854 }
855}
856impl core::fmt::Debug for FTM1 {
857 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
858 f.debug_struct("FTM1").finish()
859 }
860}
861#[doc = "FlexTimer Module"]
862pub mod ftm1;
863#[doc = "FlexTimer Module"]
864pub struct FTM2 {
865 _marker: PhantomData<*const ()>,
866}
867unsafe impl Send for FTM2 {}
868impl FTM2 {
869 #[doc = r"Pointer to the register block"]
870 pub const PTR: *const ftm2::RegisterBlock = 0x4003_a000 as *const _;
871 #[doc = r"Return the pointer to the register block"]
872 #[inline(always)]
873 pub const fn ptr() -> *const ftm2::RegisterBlock {
874 Self::PTR
875 }
876}
877impl Deref for FTM2 {
878 type Target = ftm2::RegisterBlock;
879 #[inline(always)]
880 fn deref(&self) -> &Self::Target {
881 unsafe { &*Self::PTR }
882 }
883}
884impl core::fmt::Debug for FTM2 {
885 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
886 f.debug_struct("FTM2").finish()
887 }
888}
889#[doc = "FlexTimer Module"]
890pub mod ftm2;
891#[doc = "FlexTimer Module"]
892pub struct FTM3 {
893 _marker: PhantomData<*const ()>,
894}
895unsafe impl Send for FTM3 {}
896impl FTM3 {
897 #[doc = r"Pointer to the register block"]
898 pub const PTR: *const ftm3::RegisterBlock = 0x4002_6000 as *const _;
899 #[doc = r"Return the pointer to the register block"]
900 #[inline(always)]
901 pub const fn ptr() -> *const ftm3::RegisterBlock {
902 Self::PTR
903 }
904}
905impl Deref for FTM3 {
906 type Target = ftm3::RegisterBlock;
907 #[inline(always)]
908 fn deref(&self) -> &Self::Target {
909 unsafe { &*Self::PTR }
910 }
911}
912impl core::fmt::Debug for FTM3 {
913 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
914 f.debug_struct("FTM3").finish()
915 }
916}
917#[doc = "FlexTimer Module"]
918pub mod ftm3;
919#[doc = "Analog-to-Digital Converter"]
920pub struct ADC0 {
921 _marker: PhantomData<*const ()>,
922}
923unsafe impl Send for ADC0 {}
924impl ADC0 {
925 #[doc = r"Pointer to the register block"]
926 pub const PTR: *const adc0::RegisterBlock = 0x4003_b000 as *const _;
927 #[doc = r"Return the pointer to the register block"]
928 #[inline(always)]
929 pub const fn ptr() -> *const adc0::RegisterBlock {
930 Self::PTR
931 }
932}
933impl Deref for ADC0 {
934 type Target = adc0::RegisterBlock;
935 #[inline(always)]
936 fn deref(&self) -> &Self::Target {
937 unsafe { &*Self::PTR }
938 }
939}
940impl core::fmt::Debug for ADC0 {
941 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
942 f.debug_struct("ADC0").finish()
943 }
944}
945#[doc = "Analog-to-Digital Converter"]
946pub mod adc0;
947#[doc = "Analog-to-Digital Converter"]
948pub struct ADC1 {
949 _marker: PhantomData<*const ()>,
950}
951unsafe impl Send for ADC1 {}
952impl ADC1 {
953 #[doc = r"Pointer to the register block"]
954 pub const PTR: *const adc1::RegisterBlock = 0x4002_7000 as *const _;
955 #[doc = r"Return the pointer to the register block"]
956 #[inline(always)]
957 pub const fn ptr() -> *const adc1::RegisterBlock {
958 Self::PTR
959 }
960}
961impl Deref for ADC1 {
962 type Target = adc1::RegisterBlock;
963 #[inline(always)]
964 fn deref(&self) -> &Self::Target {
965 unsafe { &*Self::PTR }
966 }
967}
968impl core::fmt::Debug for ADC1 {
969 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
970 f.debug_struct("ADC1").finish()
971 }
972}
973#[doc = "Analog-to-Digital Converter"]
974pub mod adc1;
975#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
976pub struct LPSPI0 {
977 _marker: PhantomData<*const ()>,
978}
979unsafe impl Send for LPSPI0 {}
980impl LPSPI0 {
981 #[doc = r"Pointer to the register block"]
982 pub const PTR: *const lpspi0::RegisterBlock = 0x4002_c000 as *const _;
983 #[doc = r"Return the pointer to the register block"]
984 #[inline(always)]
985 pub const fn ptr() -> *const lpspi0::RegisterBlock {
986 Self::PTR
987 }
988}
989impl Deref for LPSPI0 {
990 type Target = lpspi0::RegisterBlock;
991 #[inline(always)]
992 fn deref(&self) -> &Self::Target {
993 unsafe { &*Self::PTR }
994 }
995}
996impl core::fmt::Debug for LPSPI0 {
997 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
998 f.debug_struct("LPSPI0").finish()
999 }
1000}
1001#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1002pub mod lpspi0;
1003#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1004pub struct LPSPI1 {
1005 _marker: PhantomData<*const ()>,
1006}
1007unsafe impl Send for LPSPI1 {}
1008impl LPSPI1 {
1009 #[doc = r"Pointer to the register block"]
1010 pub const PTR: *const lpspi1::RegisterBlock = 0x4002_d000 as *const _;
1011 #[doc = r"Return the pointer to the register block"]
1012 #[inline(always)]
1013 pub const fn ptr() -> *const lpspi1::RegisterBlock {
1014 Self::PTR
1015 }
1016}
1017impl Deref for LPSPI1 {
1018 type Target = lpspi1::RegisterBlock;
1019 #[inline(always)]
1020 fn deref(&self) -> &Self::Target {
1021 unsafe { &*Self::PTR }
1022 }
1023}
1024impl core::fmt::Debug for LPSPI1 {
1025 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1026 f.debug_struct("LPSPI1").finish()
1027 }
1028}
1029#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
1030pub mod lpspi1;
1031#[doc = "Programmable Delay Block"]
1032pub struct PDB0 {
1033 _marker: PhantomData<*const ()>,
1034}
1035unsafe impl Send for PDB0 {}
1036impl PDB0 {
1037 #[doc = r"Pointer to the register block"]
1038 pub const PTR: *const pdb0::RegisterBlock = 0x4003_6000 as *const _;
1039 #[doc = r"Return the pointer to the register block"]
1040 #[inline(always)]
1041 pub const fn ptr() -> *const pdb0::RegisterBlock {
1042 Self::PTR
1043 }
1044}
1045impl Deref for PDB0 {
1046 type Target = pdb0::RegisterBlock;
1047 #[inline(always)]
1048 fn deref(&self) -> &Self::Target {
1049 unsafe { &*Self::PTR }
1050 }
1051}
1052impl core::fmt::Debug for PDB0 {
1053 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1054 f.debug_struct("PDB0").finish()
1055 }
1056}
1057#[doc = "Programmable Delay Block"]
1058pub mod pdb0;
1059#[doc = "Programmable Delay Block"]
1060pub struct PDB1 {
1061 _marker: PhantomData<*const ()>,
1062}
1063unsafe impl Send for PDB1 {}
1064impl PDB1 {
1065 #[doc = r"Pointer to the register block"]
1066 pub const PTR: *const pdb1::RegisterBlock = 0x4003_1000 as *const _;
1067 #[doc = r"Return the pointer to the register block"]
1068 #[inline(always)]
1069 pub const fn ptr() -> *const pdb1::RegisterBlock {
1070 Self::PTR
1071 }
1072}
1073impl Deref for PDB1 {
1074 type Target = pdb1::RegisterBlock;
1075 #[inline(always)]
1076 fn deref(&self) -> &Self::Target {
1077 unsafe { &*Self::PTR }
1078 }
1079}
1080impl core::fmt::Debug for PDB1 {
1081 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1082 f.debug_struct("PDB1").finish()
1083 }
1084}
1085#[doc = "Programmable Delay Block"]
1086pub mod pdb1;
1087#[doc = "Cyclic Redundancy Check"]
1088pub struct CRC {
1089 _marker: PhantomData<*const ()>,
1090}
1091unsafe impl Send for CRC {}
1092impl CRC {
1093 #[doc = r"Pointer to the register block"]
1094 pub const PTR: *const crc::RegisterBlock = 0x4003_2000 as *const _;
1095 #[doc = r"Return the pointer to the register block"]
1096 #[inline(always)]
1097 pub const fn ptr() -> *const crc::RegisterBlock {
1098 Self::PTR
1099 }
1100}
1101impl Deref for CRC {
1102 type Target = crc::RegisterBlock;
1103 #[inline(always)]
1104 fn deref(&self) -> &Self::Target {
1105 unsafe { &*Self::PTR }
1106 }
1107}
1108impl core::fmt::Debug for CRC {
1109 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1110 f.debug_struct("CRC").finish()
1111 }
1112}
1113#[doc = "Cyclic Redundancy Check"]
1114pub mod crc;
1115#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
1116pub struct LPIT0 {
1117 _marker: PhantomData<*const ()>,
1118}
1119unsafe impl Send for LPIT0 {}
1120impl LPIT0 {
1121 #[doc = r"Pointer to the register block"]
1122 pub const PTR: *const lpit0::RegisterBlock = 0x4003_7000 as *const _;
1123 #[doc = r"Return the pointer to the register block"]
1124 #[inline(always)]
1125 pub const fn ptr() -> *const lpit0::RegisterBlock {
1126 Self::PTR
1127 }
1128}
1129impl Deref for LPIT0 {
1130 type Target = lpit0::RegisterBlock;
1131 #[inline(always)]
1132 fn deref(&self) -> &Self::Target {
1133 unsafe { &*Self::PTR }
1134 }
1135}
1136impl core::fmt::Debug for LPIT0 {
1137 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1138 f.debug_struct("LPIT0").finish()
1139 }
1140}
1141#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
1142pub mod lpit0;
1143#[doc = "Secure Real Time Clock"]
1144pub struct RTC {
1145 _marker: PhantomData<*const ()>,
1146}
1147unsafe impl Send for RTC {}
1148impl RTC {
1149 #[doc = r"Pointer to the register block"]
1150 pub const PTR: *const rtc::RegisterBlock = 0x4003_d000 as *const _;
1151 #[doc = r"Return the pointer to the register block"]
1152 #[inline(always)]
1153 pub const fn ptr() -> *const rtc::RegisterBlock {
1154 Self::PTR
1155 }
1156}
1157impl Deref for RTC {
1158 type Target = rtc::RegisterBlock;
1159 #[inline(always)]
1160 fn deref(&self) -> &Self::Target {
1161 unsafe { &*Self::PTR }
1162 }
1163}
1164impl core::fmt::Debug for RTC {
1165 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1166 f.debug_struct("RTC").finish()
1167 }
1168}
1169#[doc = "Secure Real Time Clock"]
1170pub mod rtc;
1171#[doc = "Low Power Timer"]
1172pub struct LPTMR0 {
1173 _marker: PhantomData<*const ()>,
1174}
1175unsafe impl Send for LPTMR0 {}
1176impl LPTMR0 {
1177 #[doc = r"Pointer to the register block"]
1178 pub const PTR: *const lptmr0::RegisterBlock = 0x4004_0000 as *const _;
1179 #[doc = r"Return the pointer to the register block"]
1180 #[inline(always)]
1181 pub const fn ptr() -> *const lptmr0::RegisterBlock {
1182 Self::PTR
1183 }
1184}
1185impl Deref for LPTMR0 {
1186 type Target = lptmr0::RegisterBlock;
1187 #[inline(always)]
1188 fn deref(&self) -> &Self::Target {
1189 unsafe { &*Self::PTR }
1190 }
1191}
1192impl core::fmt::Debug for LPTMR0 {
1193 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1194 f.debug_struct("LPTMR0").finish()
1195 }
1196}
1197#[doc = "Low Power Timer"]
1198pub mod lptmr0;
1199#[doc = "System Integration Module"]
1200pub struct SIM {
1201 _marker: PhantomData<*const ()>,
1202}
1203unsafe impl Send for SIM {}
1204impl SIM {
1205 #[doc = r"Pointer to the register block"]
1206 pub const PTR: *const sim::RegisterBlock = 0x4004_8000 as *const _;
1207 #[doc = r"Return the pointer to the register block"]
1208 #[inline(always)]
1209 pub const fn ptr() -> *const sim::RegisterBlock {
1210 Self::PTR
1211 }
1212}
1213impl Deref for SIM {
1214 type Target = sim::RegisterBlock;
1215 #[inline(always)]
1216 fn deref(&self) -> &Self::Target {
1217 unsafe { &*Self::PTR }
1218 }
1219}
1220impl core::fmt::Debug for SIM {
1221 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1222 f.debug_struct("SIM").finish()
1223 }
1224}
1225#[doc = "System Integration Module"]
1226pub mod sim;
1227#[doc = "Pin Control and Interrupts"]
1228pub struct PORTA {
1229 _marker: PhantomData<*const ()>,
1230}
1231unsafe impl Send for PORTA {}
1232impl PORTA {
1233 #[doc = r"Pointer to the register block"]
1234 pub const PTR: *const porta::RegisterBlock = 0x4004_9000 as *const _;
1235 #[doc = r"Return the pointer to the register block"]
1236 #[inline(always)]
1237 pub const fn ptr() -> *const porta::RegisterBlock {
1238 Self::PTR
1239 }
1240}
1241impl Deref for PORTA {
1242 type Target = porta::RegisterBlock;
1243 #[inline(always)]
1244 fn deref(&self) -> &Self::Target {
1245 unsafe { &*Self::PTR }
1246 }
1247}
1248impl core::fmt::Debug for PORTA {
1249 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1250 f.debug_struct("PORTA").finish()
1251 }
1252}
1253#[doc = "Pin Control and Interrupts"]
1254pub mod porta;
1255#[doc = "Pin Control and Interrupts"]
1256pub struct PORTB {
1257 _marker: PhantomData<*const ()>,
1258}
1259unsafe impl Send for PORTB {}
1260impl PORTB {
1261 #[doc = r"Pointer to the register block"]
1262 pub const PTR: *const portb::RegisterBlock = 0x4004_a000 as *const _;
1263 #[doc = r"Return the pointer to the register block"]
1264 #[inline(always)]
1265 pub const fn ptr() -> *const portb::RegisterBlock {
1266 Self::PTR
1267 }
1268}
1269impl Deref for PORTB {
1270 type Target = portb::RegisterBlock;
1271 #[inline(always)]
1272 fn deref(&self) -> &Self::Target {
1273 unsafe { &*Self::PTR }
1274 }
1275}
1276impl core::fmt::Debug for PORTB {
1277 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1278 f.debug_struct("PORTB").finish()
1279 }
1280}
1281#[doc = "Pin Control and Interrupts"]
1282pub mod portb;
1283#[doc = "Pin Control and Interrupts"]
1284pub struct PORTC {
1285 _marker: PhantomData<*const ()>,
1286}
1287unsafe impl Send for PORTC {}
1288impl PORTC {
1289 #[doc = r"Pointer to the register block"]
1290 pub const PTR: *const portc::RegisterBlock = 0x4004_b000 as *const _;
1291 #[doc = r"Return the pointer to the register block"]
1292 #[inline(always)]
1293 pub const fn ptr() -> *const portc::RegisterBlock {
1294 Self::PTR
1295 }
1296}
1297impl Deref for PORTC {
1298 type Target = portc::RegisterBlock;
1299 #[inline(always)]
1300 fn deref(&self) -> &Self::Target {
1301 unsafe { &*Self::PTR }
1302 }
1303}
1304impl core::fmt::Debug for PORTC {
1305 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1306 f.debug_struct("PORTC").finish()
1307 }
1308}
1309#[doc = "Pin Control and Interrupts"]
1310pub mod portc;
1311#[doc = "Pin Control and Interrupts"]
1312pub struct PORTD {
1313 _marker: PhantomData<*const ()>,
1314}
1315unsafe impl Send for PORTD {}
1316impl PORTD {
1317 #[doc = r"Pointer to the register block"]
1318 pub const PTR: *const portd::RegisterBlock = 0x4004_c000 as *const _;
1319 #[doc = r"Return the pointer to the register block"]
1320 #[inline(always)]
1321 pub const fn ptr() -> *const portd::RegisterBlock {
1322 Self::PTR
1323 }
1324}
1325impl Deref for PORTD {
1326 type Target = portd::RegisterBlock;
1327 #[inline(always)]
1328 fn deref(&self) -> &Self::Target {
1329 unsafe { &*Self::PTR }
1330 }
1331}
1332impl core::fmt::Debug for PORTD {
1333 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1334 f.debug_struct("PORTD").finish()
1335 }
1336}
1337#[doc = "Pin Control and Interrupts"]
1338pub mod portd;
1339#[doc = "Pin Control and Interrupts"]
1340pub struct PORTE {
1341 _marker: PhantomData<*const ()>,
1342}
1343unsafe impl Send for PORTE {}
1344impl PORTE {
1345 #[doc = r"Pointer to the register block"]
1346 pub const PTR: *const porte::RegisterBlock = 0x4004_d000 as *const _;
1347 #[doc = r"Return the pointer to the register block"]
1348 #[inline(always)]
1349 pub const fn ptr() -> *const porte::RegisterBlock {
1350 Self::PTR
1351 }
1352}
1353impl Deref for PORTE {
1354 type Target = porte::RegisterBlock;
1355 #[inline(always)]
1356 fn deref(&self) -> &Self::Target {
1357 unsafe { &*Self::PTR }
1358 }
1359}
1360impl core::fmt::Debug for PORTE {
1361 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1362 f.debug_struct("PORTE").finish()
1363 }
1364}
1365#[doc = "Pin Control and Interrupts"]
1366pub mod porte;
1367#[doc = "Watchdog timer"]
1368pub struct WDOG {
1369 _marker: PhantomData<*const ()>,
1370}
1371unsafe impl Send for WDOG {}
1372impl WDOG {
1373 #[doc = r"Pointer to the register block"]
1374 pub const PTR: *const wdog::RegisterBlock = 0x4005_2000 as *const _;
1375 #[doc = r"Return the pointer to the register block"]
1376 #[inline(always)]
1377 pub const fn ptr() -> *const wdog::RegisterBlock {
1378 Self::PTR
1379 }
1380}
1381impl Deref for WDOG {
1382 type Target = wdog::RegisterBlock;
1383 #[inline(always)]
1384 fn deref(&self) -> &Self::Target {
1385 unsafe { &*Self::PTR }
1386 }
1387}
1388impl core::fmt::Debug for WDOG {
1389 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1390 f.debug_struct("WDOG").finish()
1391 }
1392}
1393#[doc = "Watchdog timer"]
1394pub mod wdog;
1395#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1396pub struct FLEXIO {
1397 _marker: PhantomData<*const ()>,
1398}
1399unsafe impl Send for FLEXIO {}
1400impl FLEXIO {
1401 #[doc = r"Pointer to the register block"]
1402 pub const PTR: *const flexio::RegisterBlock = 0x4005_a000 as *const _;
1403 #[doc = r"Return the pointer to the register block"]
1404 #[inline(always)]
1405 pub const fn ptr() -> *const flexio::RegisterBlock {
1406 Self::PTR
1407 }
1408}
1409impl Deref for FLEXIO {
1410 type Target = flexio::RegisterBlock;
1411 #[inline(always)]
1412 fn deref(&self) -> &Self::Target {
1413 unsafe { &*Self::PTR }
1414 }
1415}
1416impl core::fmt::Debug for FLEXIO {
1417 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1418 f.debug_struct("FLEXIO").finish()
1419 }
1420}
1421#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1422pub mod flexio;
1423#[doc = "External Watchdog Monitor"]
1424pub struct EWM {
1425 _marker: PhantomData<*const ()>,
1426}
1427unsafe impl Send for EWM {}
1428impl EWM {
1429 #[doc = r"Pointer to the register block"]
1430 pub const PTR: *const ewm::RegisterBlock = 0x4006_1000 as *const _;
1431 #[doc = r"Return the pointer to the register block"]
1432 #[inline(always)]
1433 pub const fn ptr() -> *const ewm::RegisterBlock {
1434 Self::PTR
1435 }
1436}
1437impl Deref for EWM {
1438 type Target = ewm::RegisterBlock;
1439 #[inline(always)]
1440 fn deref(&self) -> &Self::Target {
1441 unsafe { &*Self::PTR }
1442 }
1443}
1444impl core::fmt::Debug for EWM {
1445 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1446 f.debug_struct("EWM").finish()
1447 }
1448}
1449#[doc = "External Watchdog Monitor"]
1450pub mod ewm;
1451#[doc = "TRGMUX"]
1452pub struct TRGMUX {
1453 _marker: PhantomData<*const ()>,
1454}
1455unsafe impl Send for TRGMUX {}
1456impl TRGMUX {
1457 #[doc = r"Pointer to the register block"]
1458 pub const PTR: *const trgmux::RegisterBlock = 0x4006_3000 as *const _;
1459 #[doc = r"Return the pointer to the register block"]
1460 #[inline(always)]
1461 pub const fn ptr() -> *const trgmux::RegisterBlock {
1462 Self::PTR
1463 }
1464}
1465impl Deref for TRGMUX {
1466 type Target = trgmux::RegisterBlock;
1467 #[inline(always)]
1468 fn deref(&self) -> &Self::Target {
1469 unsafe { &*Self::PTR }
1470 }
1471}
1472impl core::fmt::Debug for TRGMUX {
1473 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1474 f.debug_struct("TRGMUX").finish()
1475 }
1476}
1477#[doc = "TRGMUX"]
1478pub mod trgmux;
1479#[doc = "System Clock Generator"]
1480pub struct SCG {
1481 _marker: PhantomData<*const ()>,
1482}
1483unsafe impl Send for SCG {}
1484impl SCG {
1485 #[doc = r"Pointer to the register block"]
1486 pub const PTR: *const scg::RegisterBlock = 0x4006_4000 as *const _;
1487 #[doc = r"Return the pointer to the register block"]
1488 #[inline(always)]
1489 pub const fn ptr() -> *const scg::RegisterBlock {
1490 Self::PTR
1491 }
1492}
1493impl Deref for SCG {
1494 type Target = scg::RegisterBlock;
1495 #[inline(always)]
1496 fn deref(&self) -> &Self::Target {
1497 unsafe { &*Self::PTR }
1498 }
1499}
1500impl core::fmt::Debug for SCG {
1501 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1502 f.debug_struct("SCG").finish()
1503 }
1504}
1505#[doc = "System Clock Generator"]
1506pub mod scg;
1507#[doc = "PCC"]
1508pub struct PCC {
1509 _marker: PhantomData<*const ()>,
1510}
1511unsafe impl Send for PCC {}
1512impl PCC {
1513 #[doc = r"Pointer to the register block"]
1514 pub const PTR: *const pcc::RegisterBlock = 0x4006_5000 as *const _;
1515 #[doc = r"Return the pointer to the register block"]
1516 #[inline(always)]
1517 pub const fn ptr() -> *const pcc::RegisterBlock {
1518 Self::PTR
1519 }
1520}
1521impl Deref for PCC {
1522 type Target = pcc::RegisterBlock;
1523 #[inline(always)]
1524 fn deref(&self) -> &Self::Target {
1525 unsafe { &*Self::PTR }
1526 }
1527}
1528impl core::fmt::Debug for PCC {
1529 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1530 f.debug_struct("PCC").finish()
1531 }
1532}
1533#[doc = "PCC"]
1534pub mod pcc;
1535#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1536pub struct LPI2C0 {
1537 _marker: PhantomData<*const ()>,
1538}
1539unsafe impl Send for LPI2C0 {}
1540impl LPI2C0 {
1541 #[doc = r"Pointer to the register block"]
1542 pub const PTR: *const lpi2c0::RegisterBlock = 0x4006_6000 as *const _;
1543 #[doc = r"Return the pointer to the register block"]
1544 #[inline(always)]
1545 pub const fn ptr() -> *const lpi2c0::RegisterBlock {
1546 Self::PTR
1547 }
1548}
1549impl Deref for LPI2C0 {
1550 type Target = lpi2c0::RegisterBlock;
1551 #[inline(always)]
1552 fn deref(&self) -> &Self::Target {
1553 unsafe { &*Self::PTR }
1554 }
1555}
1556impl core::fmt::Debug for LPI2C0 {
1557 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1558 f.debug_struct("LPI2C0").finish()
1559 }
1560}
1561#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1562pub mod lpi2c0;
1563#[doc = "Universal Asynchronous Receiver/Transmitter"]
1564pub struct LPUART0 {
1565 _marker: PhantomData<*const ()>,
1566}
1567unsafe impl Send for LPUART0 {}
1568impl LPUART0 {
1569 #[doc = r"Pointer to the register block"]
1570 pub const PTR: *const lpuart0::RegisterBlock = 0x4006_a000 as *const _;
1571 #[doc = r"Return the pointer to the register block"]
1572 #[inline(always)]
1573 pub const fn ptr() -> *const lpuart0::RegisterBlock {
1574 Self::PTR
1575 }
1576}
1577impl Deref for LPUART0 {
1578 type Target = lpuart0::RegisterBlock;
1579 #[inline(always)]
1580 fn deref(&self) -> &Self::Target {
1581 unsafe { &*Self::PTR }
1582 }
1583}
1584impl core::fmt::Debug for LPUART0 {
1585 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1586 f.debug_struct("LPUART0").finish()
1587 }
1588}
1589#[doc = "Universal Asynchronous Receiver/Transmitter"]
1590pub mod lpuart0;
1591#[doc = "Universal Asynchronous Receiver/Transmitter"]
1592pub struct LPUART1 {
1593 _marker: PhantomData<*const ()>,
1594}
1595unsafe impl Send for LPUART1 {}
1596impl LPUART1 {
1597 #[doc = r"Pointer to the register block"]
1598 pub const PTR: *const lpuart1::RegisterBlock = 0x4006_b000 as *const _;
1599 #[doc = r"Return the pointer to the register block"]
1600 #[inline(always)]
1601 pub const fn ptr() -> *const lpuart1::RegisterBlock {
1602 Self::PTR
1603 }
1604}
1605impl Deref for LPUART1 {
1606 type Target = lpuart1::RegisterBlock;
1607 #[inline(always)]
1608 fn deref(&self) -> &Self::Target {
1609 unsafe { &*Self::PTR }
1610 }
1611}
1612impl core::fmt::Debug for LPUART1 {
1613 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1614 f.debug_struct("LPUART1").finish()
1615 }
1616}
1617#[doc = "Universal Asynchronous Receiver/Transmitter"]
1618pub mod lpuart1;
1619#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1620pub struct CMP0 {
1621 _marker: PhantomData<*const ()>,
1622}
1623unsafe impl Send for CMP0 {}
1624impl CMP0 {
1625 #[doc = r"Pointer to the register block"]
1626 pub const PTR: *const cmp0::RegisterBlock = 0x4007_3000 as *const _;
1627 #[doc = r"Return the pointer to the register block"]
1628 #[inline(always)]
1629 pub const fn ptr() -> *const cmp0::RegisterBlock {
1630 Self::PTR
1631 }
1632}
1633impl Deref for CMP0 {
1634 type Target = cmp0::RegisterBlock;
1635 #[inline(always)]
1636 fn deref(&self) -> &Self::Target {
1637 unsafe { &*Self::PTR }
1638 }
1639}
1640impl core::fmt::Debug for CMP0 {
1641 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1642 f.debug_struct("CMP0").finish()
1643 }
1644}
1645#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1646pub mod cmp0;
1647#[doc = "PMC"]
1648pub struct PMC {
1649 _marker: PhantomData<*const ()>,
1650}
1651unsafe impl Send for PMC {}
1652impl PMC {
1653 #[doc = r"Pointer to the register block"]
1654 pub const PTR: *const pmc::RegisterBlock = 0x4007_d000 as *const _;
1655 #[doc = r"Return the pointer to the register block"]
1656 #[inline(always)]
1657 pub const fn ptr() -> *const pmc::RegisterBlock {
1658 Self::PTR
1659 }
1660}
1661impl Deref for PMC {
1662 type Target = pmc::RegisterBlock;
1663 #[inline(always)]
1664 fn deref(&self) -> &Self::Target {
1665 unsafe { &*Self::PTR }
1666 }
1667}
1668impl core::fmt::Debug for PMC {
1669 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1670 f.debug_struct("PMC").finish()
1671 }
1672}
1673#[doc = "PMC"]
1674pub mod pmc;
1675#[doc = "System Mode Controller"]
1676pub struct SMC {
1677 _marker: PhantomData<*const ()>,
1678}
1679unsafe impl Send for SMC {}
1680impl SMC {
1681 #[doc = r"Pointer to the register block"]
1682 pub const PTR: *const smc::RegisterBlock = 0x4007_e000 as *const _;
1683 #[doc = r"Return the pointer to the register block"]
1684 #[inline(always)]
1685 pub const fn ptr() -> *const smc::RegisterBlock {
1686 Self::PTR
1687 }
1688}
1689impl Deref for SMC {
1690 type Target = smc::RegisterBlock;
1691 #[inline(always)]
1692 fn deref(&self) -> &Self::Target {
1693 unsafe { &*Self::PTR }
1694 }
1695}
1696impl core::fmt::Debug for SMC {
1697 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1698 f.debug_struct("SMC").finish()
1699 }
1700}
1701#[doc = "System Mode Controller"]
1702pub mod smc;
1703#[doc = "Reset Control Module"]
1704pub struct RCM {
1705 _marker: PhantomData<*const ()>,
1706}
1707unsafe impl Send for RCM {}
1708impl RCM {
1709 #[doc = r"Pointer to the register block"]
1710 pub const PTR: *const rcm::RegisterBlock = 0x4007_f000 as *const _;
1711 #[doc = r"Return the pointer to the register block"]
1712 #[inline(always)]
1713 pub const fn ptr() -> *const rcm::RegisterBlock {
1714 Self::PTR
1715 }
1716}
1717impl Deref for RCM {
1718 type Target = rcm::RegisterBlock;
1719 #[inline(always)]
1720 fn deref(&self) -> &Self::Target {
1721 unsafe { &*Self::PTR }
1722 }
1723}
1724impl core::fmt::Debug for RCM {
1725 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1726 f.debug_struct("RCM").finish()
1727 }
1728}
1729#[doc = "Reset Control Module"]
1730pub mod rcm;
1731#[doc = "General Purpose Input/Output"]
1732pub struct PTA {
1733 _marker: PhantomData<*const ()>,
1734}
1735unsafe impl Send for PTA {}
1736impl PTA {
1737 #[doc = r"Pointer to the register block"]
1738 pub const PTR: *const pta::RegisterBlock = 0x400f_f000 as *const _;
1739 #[doc = r"Return the pointer to the register block"]
1740 #[inline(always)]
1741 pub const fn ptr() -> *const pta::RegisterBlock {
1742 Self::PTR
1743 }
1744}
1745impl Deref for PTA {
1746 type Target = pta::RegisterBlock;
1747 #[inline(always)]
1748 fn deref(&self) -> &Self::Target {
1749 unsafe { &*Self::PTR }
1750 }
1751}
1752impl core::fmt::Debug for PTA {
1753 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1754 f.debug_struct("PTA").finish()
1755 }
1756}
1757#[doc = "General Purpose Input/Output"]
1758pub mod pta;
1759#[doc = "General Purpose Input/Output"]
1760pub struct PTB {
1761 _marker: PhantomData<*const ()>,
1762}
1763unsafe impl Send for PTB {}
1764impl PTB {
1765 #[doc = r"Pointer to the register block"]
1766 pub const PTR: *const ptb::RegisterBlock = 0x400f_f040 as *const _;
1767 #[doc = r"Return the pointer to the register block"]
1768 #[inline(always)]
1769 pub const fn ptr() -> *const ptb::RegisterBlock {
1770 Self::PTR
1771 }
1772}
1773impl Deref for PTB {
1774 type Target = ptb::RegisterBlock;
1775 #[inline(always)]
1776 fn deref(&self) -> &Self::Target {
1777 unsafe { &*Self::PTR }
1778 }
1779}
1780impl core::fmt::Debug for PTB {
1781 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1782 f.debug_struct("PTB").finish()
1783 }
1784}
1785#[doc = "General Purpose Input/Output"]
1786pub mod ptb;
1787#[doc = "General Purpose Input/Output"]
1788pub struct PTC {
1789 _marker: PhantomData<*const ()>,
1790}
1791unsafe impl Send for PTC {}
1792impl PTC {
1793 #[doc = r"Pointer to the register block"]
1794 pub const PTR: *const ptc::RegisterBlock = 0x400f_f080 as *const _;
1795 #[doc = r"Return the pointer to the register block"]
1796 #[inline(always)]
1797 pub const fn ptr() -> *const ptc::RegisterBlock {
1798 Self::PTR
1799 }
1800}
1801impl Deref for PTC {
1802 type Target = ptc::RegisterBlock;
1803 #[inline(always)]
1804 fn deref(&self) -> &Self::Target {
1805 unsafe { &*Self::PTR }
1806 }
1807}
1808impl core::fmt::Debug for PTC {
1809 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1810 f.debug_struct("PTC").finish()
1811 }
1812}
1813#[doc = "General Purpose Input/Output"]
1814pub mod ptc;
1815#[doc = "General Purpose Input/Output"]
1816pub struct PTD {
1817 _marker: PhantomData<*const ()>,
1818}
1819unsafe impl Send for PTD {}
1820impl PTD {
1821 #[doc = r"Pointer to the register block"]
1822 pub const PTR: *const ptd::RegisterBlock = 0x400f_f0c0 as *const _;
1823 #[doc = r"Return the pointer to the register block"]
1824 #[inline(always)]
1825 pub const fn ptr() -> *const ptd::RegisterBlock {
1826 Self::PTR
1827 }
1828}
1829impl Deref for PTD {
1830 type Target = ptd::RegisterBlock;
1831 #[inline(always)]
1832 fn deref(&self) -> &Self::Target {
1833 unsafe { &*Self::PTR }
1834 }
1835}
1836impl core::fmt::Debug for PTD {
1837 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1838 f.debug_struct("PTD").finish()
1839 }
1840}
1841#[doc = "General Purpose Input/Output"]
1842pub mod ptd;
1843#[doc = "General Purpose Input/Output"]
1844pub struct PTE {
1845 _marker: PhantomData<*const ()>,
1846}
1847unsafe impl Send for PTE {}
1848impl PTE {
1849 #[doc = r"Pointer to the register block"]
1850 pub const PTR: *const pte::RegisterBlock = 0x400f_f100 as *const _;
1851 #[doc = r"Return the pointer to the register block"]
1852 #[inline(always)]
1853 pub const fn ptr() -> *const pte::RegisterBlock {
1854 Self::PTR
1855 }
1856}
1857impl Deref for PTE {
1858 type Target = pte::RegisterBlock;
1859 #[inline(always)]
1860 fn deref(&self) -> &Self::Target {
1861 unsafe { &*Self::PTR }
1862 }
1863}
1864impl core::fmt::Debug for PTE {
1865 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1866 f.debug_struct("PTE").finish()
1867 }
1868}
1869#[doc = "General Purpose Input/Output"]
1870pub mod pte;
1871#[doc = "System Control Registers"]
1872pub struct S32_SCB {
1873 _marker: PhantomData<*const ()>,
1874}
1875unsafe impl Send for S32_SCB {}
1876impl S32_SCB {
1877 #[doc = r"Pointer to the register block"]
1878 pub const PTR: *const s32_scb::RegisterBlock = 0xe000_e000 as *const _;
1879 #[doc = r"Return the pointer to the register block"]
1880 #[inline(always)]
1881 pub const fn ptr() -> *const s32_scb::RegisterBlock {
1882 Self::PTR
1883 }
1884}
1885impl Deref for S32_SCB {
1886 type Target = s32_scb::RegisterBlock;
1887 #[inline(always)]
1888 fn deref(&self) -> &Self::Target {
1889 unsafe { &*Self::PTR }
1890 }
1891}
1892impl core::fmt::Debug for S32_SCB {
1893 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1894 f.debug_struct("S32_SCB").finish()
1895 }
1896}
1897#[doc = "System Control Registers"]
1898pub mod s32_scb;
1899#[doc = "System timer"]
1900pub struct S32_SYSTICK {
1901 _marker: PhantomData<*const ()>,
1902}
1903unsafe impl Send for S32_SYSTICK {}
1904impl S32_SYSTICK {
1905 #[doc = r"Pointer to the register block"]
1906 pub const PTR: *const s32_sys_tick::RegisterBlock = 0xe000_e010 as *const _;
1907 #[doc = r"Return the pointer to the register block"]
1908 #[inline(always)]
1909 pub const fn ptr() -> *const s32_sys_tick::RegisterBlock {
1910 Self::PTR
1911 }
1912}
1913impl Deref for S32_SYSTICK {
1914 type Target = s32_sys_tick::RegisterBlock;
1915 #[inline(always)]
1916 fn deref(&self) -> &Self::Target {
1917 unsafe { &*Self::PTR }
1918 }
1919}
1920impl core::fmt::Debug for S32_SYSTICK {
1921 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1922 f.debug_struct("S32_SYSTICK").finish()
1923 }
1924}
1925#[doc = "System timer"]
1926pub mod s32_sys_tick;
1927#[doc = "Nested Vectored Interrupt Controller"]
1928pub struct S32_NVIC {
1929 _marker: PhantomData<*const ()>,
1930}
1931unsafe impl Send for S32_NVIC {}
1932impl S32_NVIC {
1933 #[doc = r"Pointer to the register block"]
1934 pub const PTR: *const s32_nvic::RegisterBlock = 0xe000_e100 as *const _;
1935 #[doc = r"Return the pointer to the register block"]
1936 #[inline(always)]
1937 pub const fn ptr() -> *const s32_nvic::RegisterBlock {
1938 Self::PTR
1939 }
1940}
1941impl Deref for S32_NVIC {
1942 type Target = s32_nvic::RegisterBlock;
1943 #[inline(always)]
1944 fn deref(&self) -> &Self::Target {
1945 unsafe { &*Self::PTR }
1946 }
1947}
1948impl core::fmt::Debug for S32_NVIC {
1949 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1950 f.debug_struct("S32_NVIC").finish()
1951 }
1952}
1953#[doc = "Nested Vectored Interrupt Controller"]
1954pub mod s32_nvic;
1955#[doc = "Core Platform Miscellaneous Control Module"]
1956pub struct MCM {
1957 _marker: PhantomData<*const ()>,
1958}
1959unsafe impl Send for MCM {}
1960impl MCM {
1961 #[doc = r"Pointer to the register block"]
1962 pub const PTR: *const mcm::RegisterBlock = 0xe008_0000 as *const _;
1963 #[doc = r"Return the pointer to the register block"]
1964 #[inline(always)]
1965 pub const fn ptr() -> *const mcm::RegisterBlock {
1966 Self::PTR
1967 }
1968}
1969impl Deref for MCM {
1970 type Target = mcm::RegisterBlock;
1971 #[inline(always)]
1972 fn deref(&self) -> &Self::Target {
1973 unsafe { &*Self::PTR }
1974 }
1975}
1976impl core::fmt::Debug for MCM {
1977 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1978 f.debug_struct("MCM").finish()
1979 }
1980}
1981#[doc = "Core Platform Miscellaneous Control Module"]
1982pub mod mcm;
1983#[doc = "Local Memory Controller"]
1984pub struct LMEM {
1985 _marker: PhantomData<*const ()>,
1986}
1987unsafe impl Send for LMEM {}
1988impl LMEM {
1989 #[doc = r"Pointer to the register block"]
1990 pub const PTR: *const lmem::RegisterBlock = 0xe008_2000 as *const _;
1991 #[doc = r"Return the pointer to the register block"]
1992 #[inline(always)]
1993 pub const fn ptr() -> *const lmem::RegisterBlock {
1994 Self::PTR
1995 }
1996}
1997impl Deref for LMEM {
1998 type Target = lmem::RegisterBlock;
1999 #[inline(always)]
2000 fn deref(&self) -> &Self::Target {
2001 unsafe { &*Self::PTR }
2002 }
2003}
2004impl core::fmt::Debug for LMEM {
2005 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2006 f.debug_struct("LMEM").finish()
2007 }
2008}
2009#[doc = "Local Memory Controller"]
2010pub mod lmem;
2011#[no_mangle]
2012static mut DEVICE_PERIPHERALS: bool = false;
2013#[doc = r"All the peripherals"]
2014#[allow(non_snake_case)]
2015pub struct Peripherals {
2016 #[doc = "CSE_PRAM"]
2017 pub CSE_PRAM: CSE_PRAM,
2018 #[doc = "AIPS"]
2019 pub AIPS: AIPS,
2020 #[doc = "MSCM"]
2021 pub MSCM: MSCM,
2022 #[doc = "DMA"]
2023 pub DMA: DMA,
2024 #[doc = "ERM"]
2025 pub ERM: ERM,
2026 #[doc = "EIM"]
2027 pub EIM: EIM,
2028 #[doc = "FTFC"]
2029 pub FTFC: FTFC,
2030 #[doc = "DMAMUX"]
2031 pub DMAMUX: DMAMUX,
2032 #[doc = "CAN0"]
2033 pub CAN0: CAN0,
2034 #[doc = "CAN1"]
2035 pub CAN1: CAN1,
2036 #[doc = "FTM0"]
2037 pub FTM0: FTM0,
2038 #[doc = "FTM1"]
2039 pub FTM1: FTM1,
2040 #[doc = "FTM2"]
2041 pub FTM2: FTM2,
2042 #[doc = "FTM3"]
2043 pub FTM3: FTM3,
2044 #[doc = "ADC0"]
2045 pub ADC0: ADC0,
2046 #[doc = "ADC1"]
2047 pub ADC1: ADC1,
2048 #[doc = "LPSPI0"]
2049 pub LPSPI0: LPSPI0,
2050 #[doc = "LPSPI1"]
2051 pub LPSPI1: LPSPI1,
2052 #[doc = "PDB0"]
2053 pub PDB0: PDB0,
2054 #[doc = "PDB1"]
2055 pub PDB1: PDB1,
2056 #[doc = "CRC"]
2057 pub CRC: CRC,
2058 #[doc = "LPIT0"]
2059 pub LPIT0: LPIT0,
2060 #[doc = "RTC"]
2061 pub RTC: RTC,
2062 #[doc = "LPTMR0"]
2063 pub LPTMR0: LPTMR0,
2064 #[doc = "SIM"]
2065 pub SIM: SIM,
2066 #[doc = "PORTA"]
2067 pub PORTA: PORTA,
2068 #[doc = "PORTB"]
2069 pub PORTB: PORTB,
2070 #[doc = "PORTC"]
2071 pub PORTC: PORTC,
2072 #[doc = "PORTD"]
2073 pub PORTD: PORTD,
2074 #[doc = "PORTE"]
2075 pub PORTE: PORTE,
2076 #[doc = "WDOG"]
2077 pub WDOG: WDOG,
2078 #[doc = "FLEXIO"]
2079 pub FLEXIO: FLEXIO,
2080 #[doc = "EWM"]
2081 pub EWM: EWM,
2082 #[doc = "TRGMUX"]
2083 pub TRGMUX: TRGMUX,
2084 #[doc = "SCG"]
2085 pub SCG: SCG,
2086 #[doc = "PCC"]
2087 pub PCC: PCC,
2088 #[doc = "LPI2C0"]
2089 pub LPI2C0: LPI2C0,
2090 #[doc = "LPUART0"]
2091 pub LPUART0: LPUART0,
2092 #[doc = "LPUART1"]
2093 pub LPUART1: LPUART1,
2094 #[doc = "CMP0"]
2095 pub CMP0: CMP0,
2096 #[doc = "PMC"]
2097 pub PMC: PMC,
2098 #[doc = "SMC"]
2099 pub SMC: SMC,
2100 #[doc = "RCM"]
2101 pub RCM: RCM,
2102 #[doc = "PTA"]
2103 pub PTA: PTA,
2104 #[doc = "PTB"]
2105 pub PTB: PTB,
2106 #[doc = "PTC"]
2107 pub PTC: PTC,
2108 #[doc = "PTD"]
2109 pub PTD: PTD,
2110 #[doc = "PTE"]
2111 pub PTE: PTE,
2112 #[doc = "S32_SCB"]
2113 pub S32_SCB: S32_SCB,
2114 #[doc = "S32_SYSTICK"]
2115 pub S32_SYSTICK: S32_SYSTICK,
2116 #[doc = "S32_NVIC"]
2117 pub S32_NVIC: S32_NVIC,
2118 #[doc = "MCM"]
2119 pub MCM: MCM,
2120 #[doc = "LMEM"]
2121 pub LMEM: LMEM,
2122}
2123impl Peripherals {
2124 #[doc = r"Returns all the peripherals *once*"]
2125 #[inline]
2126 pub fn take() -> Option<Self> {
2127 cortex_m::interrupt::free(|_| {
2128 if unsafe { DEVICE_PERIPHERALS } {
2129 None
2130 } else {
2131 Some(unsafe { Peripherals::steal() })
2132 }
2133 })
2134 }
2135 #[doc = r"Unchecked version of `Peripherals::take`"]
2136 #[inline]
2137 pub unsafe fn steal() -> Self {
2138 DEVICE_PERIPHERALS = true;
2139 Peripherals {
2140 CSE_PRAM: CSE_PRAM {
2141 _marker: PhantomData,
2142 },
2143 AIPS: AIPS {
2144 _marker: PhantomData,
2145 },
2146 MSCM: MSCM {
2147 _marker: PhantomData,
2148 },
2149 DMA: DMA {
2150 _marker: PhantomData,
2151 },
2152 ERM: ERM {
2153 _marker: PhantomData,
2154 },
2155 EIM: EIM {
2156 _marker: PhantomData,
2157 },
2158 FTFC: FTFC {
2159 _marker: PhantomData,
2160 },
2161 DMAMUX: DMAMUX {
2162 _marker: PhantomData,
2163 },
2164 CAN0: CAN0 {
2165 _marker: PhantomData,
2166 },
2167 CAN1: CAN1 {
2168 _marker: PhantomData,
2169 },
2170 FTM0: FTM0 {
2171 _marker: PhantomData,
2172 },
2173 FTM1: FTM1 {
2174 _marker: PhantomData,
2175 },
2176 FTM2: FTM2 {
2177 _marker: PhantomData,
2178 },
2179 FTM3: FTM3 {
2180 _marker: PhantomData,
2181 },
2182 ADC0: ADC0 {
2183 _marker: PhantomData,
2184 },
2185 ADC1: ADC1 {
2186 _marker: PhantomData,
2187 },
2188 LPSPI0: LPSPI0 {
2189 _marker: PhantomData,
2190 },
2191 LPSPI1: LPSPI1 {
2192 _marker: PhantomData,
2193 },
2194 PDB0: PDB0 {
2195 _marker: PhantomData,
2196 },
2197 PDB1: PDB1 {
2198 _marker: PhantomData,
2199 },
2200 CRC: CRC {
2201 _marker: PhantomData,
2202 },
2203 LPIT0: LPIT0 {
2204 _marker: PhantomData,
2205 },
2206 RTC: RTC {
2207 _marker: PhantomData,
2208 },
2209 LPTMR0: LPTMR0 {
2210 _marker: PhantomData,
2211 },
2212 SIM: SIM {
2213 _marker: PhantomData,
2214 },
2215 PORTA: PORTA {
2216 _marker: PhantomData,
2217 },
2218 PORTB: PORTB {
2219 _marker: PhantomData,
2220 },
2221 PORTC: PORTC {
2222 _marker: PhantomData,
2223 },
2224 PORTD: PORTD {
2225 _marker: PhantomData,
2226 },
2227 PORTE: PORTE {
2228 _marker: PhantomData,
2229 },
2230 WDOG: WDOG {
2231 _marker: PhantomData,
2232 },
2233 FLEXIO: FLEXIO {
2234 _marker: PhantomData,
2235 },
2236 EWM: EWM {
2237 _marker: PhantomData,
2238 },
2239 TRGMUX: TRGMUX {
2240 _marker: PhantomData,
2241 },
2242 SCG: SCG {
2243 _marker: PhantomData,
2244 },
2245 PCC: PCC {
2246 _marker: PhantomData,
2247 },
2248 LPI2C0: LPI2C0 {
2249 _marker: PhantomData,
2250 },
2251 LPUART0: LPUART0 {
2252 _marker: PhantomData,
2253 },
2254 LPUART1: LPUART1 {
2255 _marker: PhantomData,
2256 },
2257 CMP0: CMP0 {
2258 _marker: PhantomData,
2259 },
2260 PMC: PMC {
2261 _marker: PhantomData,
2262 },
2263 SMC: SMC {
2264 _marker: PhantomData,
2265 },
2266 RCM: RCM {
2267 _marker: PhantomData,
2268 },
2269 PTA: PTA {
2270 _marker: PhantomData,
2271 },
2272 PTB: PTB {
2273 _marker: PhantomData,
2274 },
2275 PTC: PTC {
2276 _marker: PhantomData,
2277 },
2278 PTD: PTD {
2279 _marker: PhantomData,
2280 },
2281 PTE: PTE {
2282 _marker: PhantomData,
2283 },
2284 S32_SCB: S32_SCB {
2285 _marker: PhantomData,
2286 },
2287 S32_SYSTICK: S32_SYSTICK {
2288 _marker: PhantomData,
2289 },
2290 S32_NVIC: S32_NVIC {
2291 _marker: PhantomData,
2292 },
2293 MCM: MCM {
2294 _marker: PhantomData,
2295 },
2296 LMEM: LMEM {
2297 _marker: PhantomData,
2298 },
2299 }
2300 }
2301}