1#[doc = "Register `CR` reader"]
2pub struct R(crate::R<CR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CR` writer"]
17pub struct W(crate::W<CR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Software Reset\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SWR_A {
40 #[doc = "0: No effect."]
41 _0 = 0,
42}
43impl From<SWR_A> for bool {
44 #[inline(always)]
45 fn from(variant: SWR_A) -> Self {
46 variant as u8 != 0
47 }
48}
49#[doc = "Field `SWR` reader - Software Reset"]
50pub struct SWR_R(crate::FieldReader<bool, SWR_A>);
51impl SWR_R {
52 #[inline(always)]
53 pub(crate) fn new(bits: bool) -> Self {
54 SWR_R(crate::FieldReader::new(bits))
55 }
56 #[doc = r"Get enumerated values variant"]
57 #[inline(always)]
58 pub fn variant(&self) -> Option<SWR_A> {
59 match self.bits {
60 false => Some(SWR_A::_0),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `_0`"]
65 #[inline(always)]
66 pub fn is_0(&self) -> bool {
67 **self == SWR_A::_0
68 }
69}
70impl core::ops::Deref for SWR_R {
71 type Target = crate::FieldReader<bool, SWR_A>;
72 #[inline(always)]
73 fn deref(&self) -> &Self::Target {
74 &self.0
75 }
76}
77#[doc = "Field `SWR` writer - Software Reset"]
78pub struct SWR_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> SWR_W<'a> {
82 #[doc = r"Writes `variant` to the field"]
83 #[inline(always)]
84 pub fn variant(self, variant: SWR_A) -> &'a mut W {
85 self.bit(variant.into())
86 }
87 #[doc = "No effect."]
88 #[inline(always)]
89 pub fn _0(self) -> &'a mut W {
90 self.variant(SWR_A::_0)
91 }
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
106 self.w
107 }
108}
109#[doc = "Supervisor Access\n\nValue on reset: 0"]
110#[derive(Clone, Copy, Debug, PartialEq)]
111pub enum SUP_A {
112 #[doc = "0: Non-supervisor mode write accesses are not supported and generate a bus error."]
113 _0 = 0,
114 #[doc = "1: Non-supervisor mode write accesses are supported."]
115 _1 = 1,
116}
117impl From<SUP_A> for bool {
118 #[inline(always)]
119 fn from(variant: SUP_A) -> Self {
120 variant as u8 != 0
121 }
122}
123#[doc = "Field `SUP` reader - Supervisor Access"]
124pub struct SUP_R(crate::FieldReader<bool, SUP_A>);
125impl SUP_R {
126 #[inline(always)]
127 pub(crate) fn new(bits: bool) -> Self {
128 SUP_R(crate::FieldReader::new(bits))
129 }
130 #[doc = r"Get enumerated values variant"]
131 #[inline(always)]
132 pub fn variant(&self) -> SUP_A {
133 match self.bits {
134 false => SUP_A::_0,
135 true => SUP_A::_1,
136 }
137 }
138 #[doc = "Checks if the value of the field is `_0`"]
139 #[inline(always)]
140 pub fn is_0(&self) -> bool {
141 **self == SUP_A::_0
142 }
143 #[doc = "Checks if the value of the field is `_1`"]
144 #[inline(always)]
145 pub fn is_1(&self) -> bool {
146 **self == SUP_A::_1
147 }
148}
149impl core::ops::Deref for SUP_R {
150 type Target = crate::FieldReader<bool, SUP_A>;
151 #[inline(always)]
152 fn deref(&self) -> &Self::Target {
153 &self.0
154 }
155}
156#[doc = "Field `SUP` writer - Supervisor Access"]
157pub struct SUP_W<'a> {
158 w: &'a mut W,
159}
160impl<'a> SUP_W<'a> {
161 #[doc = r"Writes `variant` to the field"]
162 #[inline(always)]
163 pub fn variant(self, variant: SUP_A) -> &'a mut W {
164 self.bit(variant.into())
165 }
166 #[doc = "Non-supervisor mode write accesses are not supported and generate a bus error."]
167 #[inline(always)]
168 pub fn _0(self) -> &'a mut W {
169 self.variant(SUP_A::_0)
170 }
171 #[doc = "Non-supervisor mode write accesses are supported."]
172 #[inline(always)]
173 pub fn _1(self) -> &'a mut W {
174 self.variant(SUP_A::_1)
175 }
176 #[doc = r"Sets the field bit"]
177 #[inline(always)]
178 pub fn set_bit(self) -> &'a mut W {
179 self.bit(true)
180 }
181 #[doc = r"Clears the field bit"]
182 #[inline(always)]
183 pub fn clear_bit(self) -> &'a mut W {
184 self.bit(false)
185 }
186 #[doc = r"Writes raw bits to the field"]
187 #[inline(always)]
188 pub fn bit(self, value: bool) -> &'a mut W {
189 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
190 self.w
191 }
192}
193#[doc = "Update Mode\n\nValue on reset: 0"]
194#[derive(Clone, Copy, Debug, PartialEq)]
195pub enum UM_A {
196 #[doc = "0: Registers cannot be written when locked."]
197 _0 = 0,
198 #[doc = "1: Registers can be written when locked under limited conditions."]
199 _1 = 1,
200}
201impl From<UM_A> for bool {
202 #[inline(always)]
203 fn from(variant: UM_A) -> Self {
204 variant as u8 != 0
205 }
206}
207#[doc = "Field `UM` reader - Update Mode"]
208pub struct UM_R(crate::FieldReader<bool, UM_A>);
209impl UM_R {
210 #[inline(always)]
211 pub(crate) fn new(bits: bool) -> Self {
212 UM_R(crate::FieldReader::new(bits))
213 }
214 #[doc = r"Get enumerated values variant"]
215 #[inline(always)]
216 pub fn variant(&self) -> UM_A {
217 match self.bits {
218 false => UM_A::_0,
219 true => UM_A::_1,
220 }
221 }
222 #[doc = "Checks if the value of the field is `_0`"]
223 #[inline(always)]
224 pub fn is_0(&self) -> bool {
225 **self == UM_A::_0
226 }
227 #[doc = "Checks if the value of the field is `_1`"]
228 #[inline(always)]
229 pub fn is_1(&self) -> bool {
230 **self == UM_A::_1
231 }
232}
233impl core::ops::Deref for UM_R {
234 type Target = crate::FieldReader<bool, UM_A>;
235 #[inline(always)]
236 fn deref(&self) -> &Self::Target {
237 &self.0
238 }
239}
240#[doc = "Field `UM` writer - Update Mode"]
241pub struct UM_W<'a> {
242 w: &'a mut W,
243}
244impl<'a> UM_W<'a> {
245 #[doc = r"Writes `variant` to the field"]
246 #[inline(always)]
247 pub fn variant(self, variant: UM_A) -> &'a mut W {
248 self.bit(variant.into())
249 }
250 #[doc = "Registers cannot be written when locked."]
251 #[inline(always)]
252 pub fn _0(self) -> &'a mut W {
253 self.variant(UM_A::_0)
254 }
255 #[doc = "Registers can be written when locked under limited conditions."]
256 #[inline(always)]
257 pub fn _1(self) -> &'a mut W {
258 self.variant(UM_A::_1)
259 }
260 #[doc = r"Sets the field bit"]
261 #[inline(always)]
262 pub fn set_bit(self) -> &'a mut W {
263 self.bit(true)
264 }
265 #[doc = r"Clears the field bit"]
266 #[inline(always)]
267 pub fn clear_bit(self) -> &'a mut W {
268 self.bit(false)
269 }
270 #[doc = r"Writes raw bits to the field"]
271 #[inline(always)]
272 pub fn bit(self, value: bool) -> &'a mut W {
273 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
274 self.w
275 }
276}
277#[doc = "Clock Pin Select\n\nValue on reset: 0"]
278#[derive(Clone, Copy, Debug, PartialEq)]
279pub enum CPS_A {
280 #[doc = "0: The prescaler output clock (as configured by TSIC) is output on RTC_CLKOUT."]
281 _0 = 0,
282 #[doc = "1: The RTC 32.768 kHz clock is output on RTC_CLKOUT, provided it is output to other peripherals."]
283 _1 = 1,
284}
285impl From<CPS_A> for bool {
286 #[inline(always)]
287 fn from(variant: CPS_A) -> Self {
288 variant as u8 != 0
289 }
290}
291#[doc = "Field `CPS` reader - Clock Pin Select"]
292pub struct CPS_R(crate::FieldReader<bool, CPS_A>);
293impl CPS_R {
294 #[inline(always)]
295 pub(crate) fn new(bits: bool) -> Self {
296 CPS_R(crate::FieldReader::new(bits))
297 }
298 #[doc = r"Get enumerated values variant"]
299 #[inline(always)]
300 pub fn variant(&self) -> CPS_A {
301 match self.bits {
302 false => CPS_A::_0,
303 true => CPS_A::_1,
304 }
305 }
306 #[doc = "Checks if the value of the field is `_0`"]
307 #[inline(always)]
308 pub fn is_0(&self) -> bool {
309 **self == CPS_A::_0
310 }
311 #[doc = "Checks if the value of the field is `_1`"]
312 #[inline(always)]
313 pub fn is_1(&self) -> bool {
314 **self == CPS_A::_1
315 }
316}
317impl core::ops::Deref for CPS_R {
318 type Target = crate::FieldReader<bool, CPS_A>;
319 #[inline(always)]
320 fn deref(&self) -> &Self::Target {
321 &self.0
322 }
323}
324#[doc = "Field `CPS` writer - Clock Pin Select"]
325pub struct CPS_W<'a> {
326 w: &'a mut W,
327}
328impl<'a> CPS_W<'a> {
329 #[doc = r"Writes `variant` to the field"]
330 #[inline(always)]
331 pub fn variant(self, variant: CPS_A) -> &'a mut W {
332 self.bit(variant.into())
333 }
334 #[doc = "The prescaler output clock (as configured by TSIC) is output on RTC_CLKOUT."]
335 #[inline(always)]
336 pub fn _0(self) -> &'a mut W {
337 self.variant(CPS_A::_0)
338 }
339 #[doc = "The RTC 32.768 kHz clock is output on RTC_CLKOUT, provided it is output to other peripherals."]
340 #[inline(always)]
341 pub fn _1(self) -> &'a mut W {
342 self.variant(CPS_A::_1)
343 }
344 #[doc = r"Sets the field bit"]
345 #[inline(always)]
346 pub fn set_bit(self) -> &'a mut W {
347 self.bit(true)
348 }
349 #[doc = r"Clears the field bit"]
350 #[inline(always)]
351 pub fn clear_bit(self) -> &'a mut W {
352 self.bit(false)
353 }
354 #[doc = r"Writes raw bits to the field"]
355 #[inline(always)]
356 pub fn bit(self, value: bool) -> &'a mut W {
357 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
358 self.w
359 }
360}
361#[doc = "LPO Select\n\nValue on reset: 0"]
362#[derive(Clone, Copy, Debug, PartialEq)]
363pub enum LPOS_A {
364 #[doc = "0: RTC prescaler increments using 32.768 kHz clock."]
365 _0 = 0,
366 #[doc = "1: RTC prescaler increments using 1 kHz LPO, bits \\[4:0\\]
367of the prescaler are ignored."]
368 _1 = 1,
369}
370impl From<LPOS_A> for bool {
371 #[inline(always)]
372 fn from(variant: LPOS_A) -> Self {
373 variant as u8 != 0
374 }
375}
376#[doc = "Field `LPOS` reader - LPO Select"]
377pub struct LPOS_R(crate::FieldReader<bool, LPOS_A>);
378impl LPOS_R {
379 #[inline(always)]
380 pub(crate) fn new(bits: bool) -> Self {
381 LPOS_R(crate::FieldReader::new(bits))
382 }
383 #[doc = r"Get enumerated values variant"]
384 #[inline(always)]
385 pub fn variant(&self) -> LPOS_A {
386 match self.bits {
387 false => LPOS_A::_0,
388 true => LPOS_A::_1,
389 }
390 }
391 #[doc = "Checks if the value of the field is `_0`"]
392 #[inline(always)]
393 pub fn is_0(&self) -> bool {
394 **self == LPOS_A::_0
395 }
396 #[doc = "Checks if the value of the field is `_1`"]
397 #[inline(always)]
398 pub fn is_1(&self) -> bool {
399 **self == LPOS_A::_1
400 }
401}
402impl core::ops::Deref for LPOS_R {
403 type Target = crate::FieldReader<bool, LPOS_A>;
404 #[inline(always)]
405 fn deref(&self) -> &Self::Target {
406 &self.0
407 }
408}
409#[doc = "Field `LPOS` writer - LPO Select"]
410pub struct LPOS_W<'a> {
411 w: &'a mut W,
412}
413impl<'a> LPOS_W<'a> {
414 #[doc = r"Writes `variant` to the field"]
415 #[inline(always)]
416 pub fn variant(self, variant: LPOS_A) -> &'a mut W {
417 self.bit(variant.into())
418 }
419 #[doc = "RTC prescaler increments using 32.768 kHz clock."]
420 #[inline(always)]
421 pub fn _0(self) -> &'a mut W {
422 self.variant(LPOS_A::_0)
423 }
424 #[doc = "RTC prescaler increments using 1 kHz LPO, bits \\[4:0\\]
425of the prescaler are ignored."]
426 #[inline(always)]
427 pub fn _1(self) -> &'a mut W {
428 self.variant(LPOS_A::_1)
429 }
430 #[doc = r"Sets the field bit"]
431 #[inline(always)]
432 pub fn set_bit(self) -> &'a mut W {
433 self.bit(true)
434 }
435 #[doc = r"Clears the field bit"]
436 #[inline(always)]
437 pub fn clear_bit(self) -> &'a mut W {
438 self.bit(false)
439 }
440 #[doc = r"Writes raw bits to the field"]
441 #[inline(always)]
442 pub fn bit(self, value: bool) -> &'a mut W {
443 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
444 self.w
445 }
446}
447#[doc = "Clock Output\n\nValue on reset: 0"]
448#[derive(Clone, Copy, Debug, PartialEq)]
449pub enum CLKO_A {
450 #[doc = "0: The 32 kHz clock is output to other peripherals."]
451 _0 = 0,
452 #[doc = "1: The 32 kHz clock is not output to other peripherals."]
453 _1 = 1,
454}
455impl From<CLKO_A> for bool {
456 #[inline(always)]
457 fn from(variant: CLKO_A) -> Self {
458 variant as u8 != 0
459 }
460}
461#[doc = "Field `CLKO` reader - Clock Output"]
462pub struct CLKO_R(crate::FieldReader<bool, CLKO_A>);
463impl CLKO_R {
464 #[inline(always)]
465 pub(crate) fn new(bits: bool) -> Self {
466 CLKO_R(crate::FieldReader::new(bits))
467 }
468 #[doc = r"Get enumerated values variant"]
469 #[inline(always)]
470 pub fn variant(&self) -> CLKO_A {
471 match self.bits {
472 false => CLKO_A::_0,
473 true => CLKO_A::_1,
474 }
475 }
476 #[doc = "Checks if the value of the field is `_0`"]
477 #[inline(always)]
478 pub fn is_0(&self) -> bool {
479 **self == CLKO_A::_0
480 }
481 #[doc = "Checks if the value of the field is `_1`"]
482 #[inline(always)]
483 pub fn is_1(&self) -> bool {
484 **self == CLKO_A::_1
485 }
486}
487impl core::ops::Deref for CLKO_R {
488 type Target = crate::FieldReader<bool, CLKO_A>;
489 #[inline(always)]
490 fn deref(&self) -> &Self::Target {
491 &self.0
492 }
493}
494#[doc = "Field `CLKO` writer - Clock Output"]
495pub struct CLKO_W<'a> {
496 w: &'a mut W,
497}
498impl<'a> CLKO_W<'a> {
499 #[doc = r"Writes `variant` to the field"]
500 #[inline(always)]
501 pub fn variant(self, variant: CLKO_A) -> &'a mut W {
502 self.bit(variant.into())
503 }
504 #[doc = "The 32 kHz clock is output to other peripherals."]
505 #[inline(always)]
506 pub fn _0(self) -> &'a mut W {
507 self.variant(CLKO_A::_0)
508 }
509 #[doc = "The 32 kHz clock is not output to other peripherals."]
510 #[inline(always)]
511 pub fn _1(self) -> &'a mut W {
512 self.variant(CLKO_A::_1)
513 }
514 #[doc = r"Sets the field bit"]
515 #[inline(always)]
516 pub fn set_bit(self) -> &'a mut W {
517 self.bit(true)
518 }
519 #[doc = r"Clears the field bit"]
520 #[inline(always)]
521 pub fn clear_bit(self) -> &'a mut W {
522 self.bit(false)
523 }
524 #[doc = r"Writes raw bits to the field"]
525 #[inline(always)]
526 pub fn bit(self, value: bool) -> &'a mut W {
527 self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
528 self.w
529 }
530}
531#[doc = "Clock Pin Enable\n\nValue on reset: 0"]
532#[derive(Clone, Copy, Debug, PartialEq)]
533pub enum CPE_A {
534 #[doc = "0: The RTC_CLKOUT function is disabled."]
535 _0 = 0,
536 #[doc = "1: Enable RTC_CLKOUT function."]
537 _1 = 1,
538}
539impl From<CPE_A> for bool {
540 #[inline(always)]
541 fn from(variant: CPE_A) -> Self {
542 variant as u8 != 0
543 }
544}
545#[doc = "Field `CPE` reader - Clock Pin Enable"]
546pub struct CPE_R(crate::FieldReader<bool, CPE_A>);
547impl CPE_R {
548 #[inline(always)]
549 pub(crate) fn new(bits: bool) -> Self {
550 CPE_R(crate::FieldReader::new(bits))
551 }
552 #[doc = r"Get enumerated values variant"]
553 #[inline(always)]
554 pub fn variant(&self) -> CPE_A {
555 match self.bits {
556 false => CPE_A::_0,
557 true => CPE_A::_1,
558 }
559 }
560 #[doc = "Checks if the value of the field is `_0`"]
561 #[inline(always)]
562 pub fn is_0(&self) -> bool {
563 **self == CPE_A::_0
564 }
565 #[doc = "Checks if the value of the field is `_1`"]
566 #[inline(always)]
567 pub fn is_1(&self) -> bool {
568 **self == CPE_A::_1
569 }
570}
571impl core::ops::Deref for CPE_R {
572 type Target = crate::FieldReader<bool, CPE_A>;
573 #[inline(always)]
574 fn deref(&self) -> &Self::Target {
575 &self.0
576 }
577}
578#[doc = "Field `CPE` writer - Clock Pin Enable"]
579pub struct CPE_W<'a> {
580 w: &'a mut W,
581}
582impl<'a> CPE_W<'a> {
583 #[doc = r"Writes `variant` to the field"]
584 #[inline(always)]
585 pub fn variant(self, variant: CPE_A) -> &'a mut W {
586 self.bit(variant.into())
587 }
588 #[doc = "The RTC_CLKOUT function is disabled."]
589 #[inline(always)]
590 pub fn _0(self) -> &'a mut W {
591 self.variant(CPE_A::_0)
592 }
593 #[doc = "Enable RTC_CLKOUT function."]
594 #[inline(always)]
595 pub fn _1(self) -> &'a mut W {
596 self.variant(CPE_A::_1)
597 }
598 #[doc = r"Sets the field bit"]
599 #[inline(always)]
600 pub fn set_bit(self) -> &'a mut W {
601 self.bit(true)
602 }
603 #[doc = r"Clears the field bit"]
604 #[inline(always)]
605 pub fn clear_bit(self) -> &'a mut W {
606 self.bit(false)
607 }
608 #[doc = r"Writes raw bits to the field"]
609 #[inline(always)]
610 pub fn bit(self, value: bool) -> &'a mut W {
611 self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
612 self.w
613 }
614}
615impl R {
616 #[doc = "Bit 0 - Software Reset"]
617 #[inline(always)]
618 pub fn swr(&self) -> SWR_R {
619 SWR_R::new((self.bits & 0x01) != 0)
620 }
621 #[doc = "Bit 2 - Supervisor Access"]
622 #[inline(always)]
623 pub fn sup(&self) -> SUP_R {
624 SUP_R::new(((self.bits >> 2) & 0x01) != 0)
625 }
626 #[doc = "Bit 3 - Update Mode"]
627 #[inline(always)]
628 pub fn um(&self) -> UM_R {
629 UM_R::new(((self.bits >> 3) & 0x01) != 0)
630 }
631 #[doc = "Bit 5 - Clock Pin Select"]
632 #[inline(always)]
633 pub fn cps(&self) -> CPS_R {
634 CPS_R::new(((self.bits >> 5) & 0x01) != 0)
635 }
636 #[doc = "Bit 7 - LPO Select"]
637 #[inline(always)]
638 pub fn lpos(&self) -> LPOS_R {
639 LPOS_R::new(((self.bits >> 7) & 0x01) != 0)
640 }
641 #[doc = "Bit 9 - Clock Output"]
642 #[inline(always)]
643 pub fn clko(&self) -> CLKO_R {
644 CLKO_R::new(((self.bits >> 9) & 0x01) != 0)
645 }
646 #[doc = "Bit 24 - Clock Pin Enable"]
647 #[inline(always)]
648 pub fn cpe(&self) -> CPE_R {
649 CPE_R::new(((self.bits >> 24) & 0x01) != 0)
650 }
651}
652impl W {
653 #[doc = "Bit 0 - Software Reset"]
654 #[inline(always)]
655 pub fn swr(&mut self) -> SWR_W {
656 SWR_W { w: self }
657 }
658 #[doc = "Bit 2 - Supervisor Access"]
659 #[inline(always)]
660 pub fn sup(&mut self) -> SUP_W {
661 SUP_W { w: self }
662 }
663 #[doc = "Bit 3 - Update Mode"]
664 #[inline(always)]
665 pub fn um(&mut self) -> UM_W {
666 UM_W { w: self }
667 }
668 #[doc = "Bit 5 - Clock Pin Select"]
669 #[inline(always)]
670 pub fn cps(&mut self) -> CPS_W {
671 CPS_W { w: self }
672 }
673 #[doc = "Bit 7 - LPO Select"]
674 #[inline(always)]
675 pub fn lpos(&mut self) -> LPOS_W {
676 LPOS_W { w: self }
677 }
678 #[doc = "Bit 9 - Clock Output"]
679 #[inline(always)]
680 pub fn clko(&mut self) -> CLKO_W {
681 CLKO_W { w: self }
682 }
683 #[doc = "Bit 24 - Clock Pin Enable"]
684 #[inline(always)]
685 pub fn cpe(&mut self) -> CPE_W {
686 CPE_W { w: self }
687 }
688 #[doc = "Writes raw bits to the register."]
689 #[inline(always)]
690 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
691 self.0.bits(bits);
692 self
693 }
694}
695#[doc = "RTC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
696pub struct CR_SPEC;
697impl crate::RegisterSpec for CR_SPEC {
698 type Ux = u32;
699}
700#[doc = "`read()` method returns [cr::R](R) reader structure"]
701impl crate::Readable for CR_SPEC {
702 type Reader = R;
703}
704#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
705impl crate::Writable for CR_SPEC {
706 type Writer = W;
707}
708#[doc = "`reset()` method sets CR to value 0"]
709impl crate::Resettable for CR_SPEC {
710 #[inline(always)]
711 fn reset_value() -> Self::Ux {
712 0
713 }
714}