1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EWMEN` writer - EWM enable."]
38pub struct EWMEN_W<'a> {
39 w: &'a mut W,
40}
41impl<'a> EWMEN_W<'a> {
42 #[doc = r"Sets the field bit"]
43 #[inline(always)]
44 pub fn set_bit(self) -> &'a mut W {
45 self.bit(true)
46 }
47 #[doc = r"Clears the field bit"]
48 #[inline(always)]
49 pub fn clear_bit(self) -> &'a mut W {
50 self.bit(false)
51 }
52 #[doc = r"Writes raw bits to the field"]
53 #[inline(always)]
54 pub fn bit(self, value: bool) -> &'a mut W {
55 self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
56 self.w
57 }
58}
59#[doc = "Field `ASSIN` writer - EWM_in's Assertion State Select."]
60pub struct ASSIN_W<'a> {
61 w: &'a mut W,
62}
63impl<'a> ASSIN_W<'a> {
64 #[doc = r"Sets the field bit"]
65 #[inline(always)]
66 pub fn set_bit(self) -> &'a mut W {
67 self.bit(true)
68 }
69 #[doc = r"Clears the field bit"]
70 #[inline(always)]
71 pub fn clear_bit(self) -> &'a mut W {
72 self.bit(false)
73 }
74 #[doc = r"Writes raw bits to the field"]
75 #[inline(always)]
76 pub fn bit(self, value: bool) -> &'a mut W {
77 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
78 self.w
79 }
80}
81#[doc = "Field `INEN` writer - Input Enable."]
82pub struct INEN_W<'a> {
83 w: &'a mut W,
84}
85impl<'a> INEN_W<'a> {
86 #[doc = r"Sets the field bit"]
87 #[inline(always)]
88 pub fn set_bit(self) -> &'a mut W {
89 self.bit(true)
90 }
91 #[doc = r"Clears the field bit"]
92 #[inline(always)]
93 pub fn clear_bit(self) -> &'a mut W {
94 self.bit(false)
95 }
96 #[doc = r"Writes raw bits to the field"]
97 #[inline(always)]
98 pub fn bit(self, value: bool) -> &'a mut W {
99 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
100 self.w
101 }
102}
103#[doc = "Field `INTEN` reader - Interrupt Enable."]
104pub struct INTEN_R(crate::FieldReader<bool, bool>);
105impl INTEN_R {
106 #[inline(always)]
107 pub(crate) fn new(bits: bool) -> Self {
108 INTEN_R(crate::FieldReader::new(bits))
109 }
110}
111impl core::ops::Deref for INTEN_R {
112 type Target = crate::FieldReader<bool, bool>;
113 #[inline(always)]
114 fn deref(&self) -> &Self::Target {
115 &self.0
116 }
117}
118#[doc = "Field `INTEN` writer - Interrupt Enable."]
119pub struct INTEN_W<'a> {
120 w: &'a mut W,
121}
122impl<'a> INTEN_W<'a> {
123 #[doc = r"Sets the field bit"]
124 #[inline(always)]
125 pub fn set_bit(self) -> &'a mut W {
126 self.bit(true)
127 }
128 #[doc = r"Clears the field bit"]
129 #[inline(always)]
130 pub fn clear_bit(self) -> &'a mut W {
131 self.bit(false)
132 }
133 #[doc = r"Writes raw bits to the field"]
134 #[inline(always)]
135 pub fn bit(self, value: bool) -> &'a mut W {
136 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
137 self.w
138 }
139}
140impl R {
141 #[doc = "Bit 3 - Interrupt Enable."]
142 #[inline(always)]
143 pub fn inten(&self) -> INTEN_R {
144 INTEN_R::new(((self.bits >> 3) & 0x01) != 0)
145 }
146}
147impl W {
148 #[doc = "Bit 0 - EWM enable."]
149 #[inline(always)]
150 pub fn ewmen(&mut self) -> EWMEN_W {
151 EWMEN_W { w: self }
152 }
153 #[doc = "Bit 1 - EWM_in's Assertion State Select."]
154 #[inline(always)]
155 pub fn assin(&mut self) -> ASSIN_W {
156 ASSIN_W { w: self }
157 }
158 #[doc = "Bit 2 - Input Enable."]
159 #[inline(always)]
160 pub fn inen(&mut self) -> INEN_W {
161 INEN_W { w: self }
162 }
163 #[doc = "Bit 3 - Interrupt Enable."]
164 #[inline(always)]
165 pub fn inten(&mut self) -> INTEN_W {
166 INTEN_W { w: self }
167 }
168 #[doc = "Writes raw bits to the register."]
169 #[inline(always)]
170 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
171 self.0.bits(bits);
172 self
173 }
174}
175#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
176pub struct CTRL_SPEC;
177impl crate::RegisterSpec for CTRL_SPEC {
178 type Ux = u8;
179}
180#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
181impl crate::Readable for CTRL_SPEC {
182 type Reader = R;
183}
184#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
185impl crate::Writable for CTRL_SPEC {
186 type Writer = W;
187}
188#[doc = "`reset()` method sets CTRL to value 0"]
189impl crate::Resettable for CTRL_SPEC {
190 #[inline(always)]
191 fn reset_value() -> Self::Ux {
192 0
193 }
194}