s32k142_pac/dma/
tcd2_attr.rs

1#[doc = "Register `TCD2_ATTR` reader"]
2pub struct R(crate::R<TCD2_ATTR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TCD2_ATTR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TCD2_ATTR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TCD2_ATTR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TCD2_ATTR` writer"]
17pub struct W(crate::W<TCD2_ATTR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TCD2_ATTR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TCD2_ATTR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TCD2_ATTR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DSIZE` reader - Destination data transfer size"]
38pub struct DSIZE_R(crate::FieldReader<u8, u8>);
39impl DSIZE_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        DSIZE_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for DSIZE_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `DSIZE` writer - Destination data transfer size"]
53pub struct DSIZE_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> DSIZE_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x07) | (value as u16 & 0x07);
61        self.w
62    }
63}
64#[doc = "Field `DMOD` reader - Destination Address Modulo"]
65pub struct DMOD_R(crate::FieldReader<u8, u8>);
66impl DMOD_R {
67    #[inline(always)]
68    pub(crate) fn new(bits: u8) -> Self {
69        DMOD_R(crate::FieldReader::new(bits))
70    }
71}
72impl core::ops::Deref for DMOD_R {
73    type Target = crate::FieldReader<u8, u8>;
74    #[inline(always)]
75    fn deref(&self) -> &Self::Target {
76        &self.0
77    }
78}
79#[doc = "Field `DMOD` writer - Destination Address Modulo"]
80pub struct DMOD_W<'a> {
81    w: &'a mut W,
82}
83impl<'a> DMOD_W<'a> {
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub unsafe fn bits(self, value: u8) -> &'a mut W {
87        self.w.bits = (self.w.bits & !(0x1f << 3)) | ((value as u16 & 0x1f) << 3);
88        self.w
89    }
90}
91#[doc = "Source data transfer size\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93#[repr(u8)]
94pub enum SSIZE_A {
95    #[doc = "0: 8-bit"]
96    _0 = 0,
97    #[doc = "1: 16-bit"]
98    _1 = 1,
99    #[doc = "2: 32-bit"]
100    _10 = 2,
101}
102impl From<SSIZE_A> for u8 {
103    #[inline(always)]
104    fn from(variant: SSIZE_A) -> Self {
105        variant as _
106    }
107}
108#[doc = "Field `SSIZE` reader - Source data transfer size"]
109pub struct SSIZE_R(crate::FieldReader<u8, SSIZE_A>);
110impl SSIZE_R {
111    #[inline(always)]
112    pub(crate) fn new(bits: u8) -> Self {
113        SSIZE_R(crate::FieldReader::new(bits))
114    }
115    #[doc = r"Get enumerated values variant"]
116    #[inline(always)]
117    pub fn variant(&self) -> Option<SSIZE_A> {
118        match self.bits {
119            0 => Some(SSIZE_A::_0),
120            1 => Some(SSIZE_A::_1),
121            2 => Some(SSIZE_A::_10),
122            _ => None,
123        }
124    }
125    #[doc = "Checks if the value of the field is `_0`"]
126    #[inline(always)]
127    pub fn is_0(&self) -> bool {
128        **self == SSIZE_A::_0
129    }
130    #[doc = "Checks if the value of the field is `_1`"]
131    #[inline(always)]
132    pub fn is_1(&self) -> bool {
133        **self == SSIZE_A::_1
134    }
135    #[doc = "Checks if the value of the field is `_10`"]
136    #[inline(always)]
137    pub fn is_10(&self) -> bool {
138        **self == SSIZE_A::_10
139    }
140}
141impl core::ops::Deref for SSIZE_R {
142    type Target = crate::FieldReader<u8, SSIZE_A>;
143    #[inline(always)]
144    fn deref(&self) -> &Self::Target {
145        &self.0
146    }
147}
148#[doc = "Field `SSIZE` writer - Source data transfer size"]
149pub struct SSIZE_W<'a> {
150    w: &'a mut W,
151}
152impl<'a> SSIZE_W<'a> {
153    #[doc = r"Writes `variant` to the field"]
154    #[inline(always)]
155    pub fn variant(self, variant: SSIZE_A) -> &'a mut W {
156        unsafe { self.bits(variant.into()) }
157    }
158    #[doc = "8-bit"]
159    #[inline(always)]
160    pub fn _0(self) -> &'a mut W {
161        self.variant(SSIZE_A::_0)
162    }
163    #[doc = "16-bit"]
164    #[inline(always)]
165    pub fn _1(self) -> &'a mut W {
166        self.variant(SSIZE_A::_1)
167    }
168    #[doc = "32-bit"]
169    #[inline(always)]
170    pub fn _10(self) -> &'a mut W {
171        self.variant(SSIZE_A::_10)
172    }
173    #[doc = r"Writes raw bits to the field"]
174    #[inline(always)]
175    pub unsafe fn bits(self, value: u8) -> &'a mut W {
176        self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u16 & 0x07) << 8);
177        self.w
178    }
179}
180#[doc = "Source Address Modulo\n\nValue on reset: 0"]
181#[derive(Clone, Copy, Debug, PartialEq)]
182#[repr(u8)]
183pub enum SMOD_A {
184    #[doc = "0: Source address modulo feature is disabled"]
185    _0 = 0,
186}
187impl From<SMOD_A> for u8 {
188    #[inline(always)]
189    fn from(variant: SMOD_A) -> Self {
190        variant as _
191    }
192}
193#[doc = "Field `SMOD` reader - Source Address Modulo"]
194pub struct SMOD_R(crate::FieldReader<u8, SMOD_A>);
195impl SMOD_R {
196    #[inline(always)]
197    pub(crate) fn new(bits: u8) -> Self {
198        SMOD_R(crate::FieldReader::new(bits))
199    }
200    #[doc = r"Get enumerated values variant"]
201    #[inline(always)]
202    pub fn variant(&self) -> Option<SMOD_A> {
203        match self.bits {
204            0 => Some(SMOD_A::_0),
205            _ => None,
206        }
207    }
208    #[doc = "Checks if the value of the field is `_0`"]
209    #[inline(always)]
210    pub fn is_0(&self) -> bool {
211        **self == SMOD_A::_0
212    }
213}
214impl core::ops::Deref for SMOD_R {
215    type Target = crate::FieldReader<u8, SMOD_A>;
216    #[inline(always)]
217    fn deref(&self) -> &Self::Target {
218        &self.0
219    }
220}
221#[doc = "Field `SMOD` writer - Source Address Modulo"]
222pub struct SMOD_W<'a> {
223    w: &'a mut W,
224}
225impl<'a> SMOD_W<'a> {
226    #[doc = r"Writes `variant` to the field"]
227    #[inline(always)]
228    pub fn variant(self, variant: SMOD_A) -> &'a mut W {
229        unsafe { self.bits(variant.into()) }
230    }
231    #[doc = "Source address modulo feature is disabled"]
232    #[inline(always)]
233    pub fn _0(self) -> &'a mut W {
234        self.variant(SMOD_A::_0)
235    }
236    #[doc = r"Writes raw bits to the field"]
237    #[inline(always)]
238    pub unsafe fn bits(self, value: u8) -> &'a mut W {
239        self.w.bits = (self.w.bits & !(0x1f << 11)) | ((value as u16 & 0x1f) << 11);
240        self.w
241    }
242}
243impl R {
244    #[doc = "Bits 0:2 - Destination data transfer size"]
245    #[inline(always)]
246    pub fn dsize(&self) -> DSIZE_R {
247        DSIZE_R::new((self.bits & 0x07) as u8)
248    }
249    #[doc = "Bits 3:7 - Destination Address Modulo"]
250    #[inline(always)]
251    pub fn dmod(&self) -> DMOD_R {
252        DMOD_R::new(((self.bits >> 3) & 0x1f) as u8)
253    }
254    #[doc = "Bits 8:10 - Source data transfer size"]
255    #[inline(always)]
256    pub fn ssize(&self) -> SSIZE_R {
257        SSIZE_R::new(((self.bits >> 8) & 0x07) as u8)
258    }
259    #[doc = "Bits 11:15 - Source Address Modulo"]
260    #[inline(always)]
261    pub fn smod(&self) -> SMOD_R {
262        SMOD_R::new(((self.bits >> 11) & 0x1f) as u8)
263    }
264}
265impl W {
266    #[doc = "Bits 0:2 - Destination data transfer size"]
267    #[inline(always)]
268    pub fn dsize(&mut self) -> DSIZE_W {
269        DSIZE_W { w: self }
270    }
271    #[doc = "Bits 3:7 - Destination Address Modulo"]
272    #[inline(always)]
273    pub fn dmod(&mut self) -> DMOD_W {
274        DMOD_W { w: self }
275    }
276    #[doc = "Bits 8:10 - Source data transfer size"]
277    #[inline(always)]
278    pub fn ssize(&mut self) -> SSIZE_W {
279        SSIZE_W { w: self }
280    }
281    #[doc = "Bits 11:15 - Source Address Modulo"]
282    #[inline(always)]
283    pub fn smod(&mut self) -> SMOD_W {
284        SMOD_W { w: self }
285    }
286    #[doc = "Writes raw bits to the register."]
287    #[inline(always)]
288    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
289        self.0.bits(bits);
290        self
291    }
292}
293#[doc = "TCD Transfer Attributes\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tcd2_attr](index.html) module"]
294pub struct TCD2_ATTR_SPEC;
295impl crate::RegisterSpec for TCD2_ATTR_SPEC {
296    type Ux = u16;
297}
298#[doc = "`read()` method returns [tcd2_attr::R](R) reader structure"]
299impl crate::Readable for TCD2_ATTR_SPEC {
300    type Reader = R;
301}
302#[doc = "`write(|w| ..)` method takes [tcd2_attr::W](W) writer structure"]
303impl crate::Writable for TCD2_ATTR_SPEC {
304    type Writer = W;
305}
306#[doc = "`reset()` method sets TCD2_ATTR to value 0"]
307impl crate::Resettable for TCD2_ATTR_SPEC {
308    #[inline(always)]
309    fn reset_value() -> Self::Ux {
310        0
311    }
312}
s32k142_pac/dma/tcd2_attr.rs

s32k142_pac/dma/
tcd2_attr.rs
