s32k142_pac/dma/
dma_tcd7_biter_elinkno.rs1#[doc = "Register `TCD7_BITER_ELINKNO` reader"]
2pub struct R(crate::R<DMA_TCD7_BITER_ELINKNO_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DMA_TCD7_BITER_ELINKNO_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DMA_TCD7_BITER_ELINKNO_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DMA_TCD7_BITER_ELINKNO_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TCD7_BITER_ELINKNO` writer"]
17pub struct W(crate::W<DMA_TCD7_BITER_ELINKNO_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DMA_TCD7_BITER_ELINKNO_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DMA_TCD7_BITER_ELINKNO_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DMA_TCD7_BITER_ELINKNO_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `BITER` reader - Starting Major Iteration Count"]
38pub struct BITER_R(crate::FieldReader<u16, u16>);
39impl BITER_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: u16) -> Self {
42 BITER_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for BITER_R {
46 type Target = crate::FieldReader<u16, u16>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `BITER` writer - Starting Major Iteration Count"]
53pub struct BITER_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> BITER_W<'a> {
57 #[doc = r"Writes raw bits to the field"]
58 #[inline(always)]
59 pub unsafe fn bits(self, value: u16) -> &'a mut W {
60 self.w.bits = (self.w.bits & !0x7fff) | (value as u16 & 0x7fff);
61 self.w
62 }
63}
64#[doc = "Enables channel-to-channel linking on minor loop complete\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq)]
66pub enum ELINK_A {
67 #[doc = "0: The channel-to-channel linking is disabled"]
68 _0 = 0,
69 #[doc = "1: The channel-to-channel linking is enabled"]
70 _1 = 1,
71}
72impl From<ELINK_A> for bool {
73 #[inline(always)]
74 fn from(variant: ELINK_A) -> Self {
75 variant as u8 != 0
76 }
77}
78#[doc = "Field `ELINK` reader - Enables channel-to-channel linking on minor loop complete"]
79pub struct ELINK_R(crate::FieldReader<bool, ELINK_A>);
80impl ELINK_R {
81 #[inline(always)]
82 pub(crate) fn new(bits: bool) -> Self {
83 ELINK_R(crate::FieldReader::new(bits))
84 }
85 #[doc = r"Get enumerated values variant"]
86 #[inline(always)]
87 pub fn variant(&self) -> ELINK_A {
88 match self.bits {
89 false => ELINK_A::_0,
90 true => ELINK_A::_1,
91 }
92 }
93 #[doc = "Checks if the value of the field is `_0`"]
94 #[inline(always)]
95 pub fn is_0(&self) -> bool {
96 **self == ELINK_A::_0
97 }
98 #[doc = "Checks if the value of the field is `_1`"]
99 #[inline(always)]
100 pub fn is_1(&self) -> bool {
101 **self == ELINK_A::_1
102 }
103}
104impl core::ops::Deref for ELINK_R {
105 type Target = crate::FieldReader<bool, ELINK_A>;
106 #[inline(always)]
107 fn deref(&self) -> &Self::Target {
108 &self.0
109 }
110}
111#[doc = "Field `ELINK` writer - Enables channel-to-channel linking on minor loop complete"]
112pub struct ELINK_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> ELINK_W<'a> {
116 #[doc = r"Writes `variant` to the field"]
117 #[inline(always)]
118 pub fn variant(self, variant: ELINK_A) -> &'a mut W {
119 self.bit(variant.into())
120 }
121 #[doc = "The channel-to-channel linking is disabled"]
122 #[inline(always)]
123 pub fn _0(self) -> &'a mut W {
124 self.variant(ELINK_A::_0)
125 }
126 #[doc = "The channel-to-channel linking is enabled"]
127 #[inline(always)]
128 pub fn _1(self) -> &'a mut W {
129 self.variant(ELINK_A::_1)
130 }
131 #[doc = r"Sets the field bit"]
132 #[inline(always)]
133 pub fn set_bit(self) -> &'a mut W {
134 self.bit(true)
135 }
136 #[doc = r"Clears the field bit"]
137 #[inline(always)]
138 pub fn clear_bit(self) -> &'a mut W {
139 self.bit(false)
140 }
141 #[doc = r"Writes raw bits to the field"]
142 #[inline(always)]
143 pub fn bit(self, value: bool) -> &'a mut W {
144 self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15);
145 self.w
146 }
147}
148impl R {
149 #[doc = "Bits 0:14 - Starting Major Iteration Count"]
150 #[inline(always)]
151 pub fn biter(&self) -> BITER_R {
152 BITER_R::new((self.bits & 0x7fff) as u16)
153 }
154 #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
155 #[inline(always)]
156 pub fn elink(&self) -> ELINK_R {
157 ELINK_R::new(((self.bits >> 15) & 0x01) != 0)
158 }
159}
160impl W {
161 #[doc = "Bits 0:14 - Starting Major Iteration Count"]
162 #[inline(always)]
163 pub fn biter(&mut self) -> BITER_W {
164 BITER_W { w: self }
165 }
166 #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
167 #[inline(always)]
168 pub fn elink(&mut self) -> ELINK_W {
169 ELINK_W { w: self }
170 }
171 #[doc = "Writes raw bits to the register."]
172 #[inline(always)]
173 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
174 self.0.bits(bits);
175 self
176 }
177}
178#[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_tcd7_biter_elinkno](index.html) module"]
179pub struct DMA_TCD7_BITER_ELINKNO_SPEC;
180impl crate::RegisterSpec for DMA_TCD7_BITER_ELINKNO_SPEC {
181 type Ux = u16;
182}
183#[doc = "`read()` method returns [dma_tcd7_biter_elinkno::R](R) reader structure"]
184impl crate::Readable for DMA_TCD7_BITER_ELINKNO_SPEC {
185 type Reader = R;
186}
187#[doc = "`write(|w| ..)` method takes [dma_tcd7_biter_elinkno::W](W) writer structure"]
188impl crate::Writable for DMA_TCD7_BITER_ELINKNO_SPEC {
189 type Writer = W;
190}
191#[doc = "`reset()` method sets TCD7_BITER_ELINKNO to value 0"]
192impl crate::Resettable for DMA_TCD7_BITER_ELINKNO_SPEC {
193 #[inline(always)]
194 fn reset_value() -> Self::Ux {
195 0
196 }
197}