1#![doc = "Peripheral access API for S32K118 microcontrollers (generated using svd2rust v0.21.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.21.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
3#![deny(const_err)]
4#![deny(dead_code)]
5#![deny(improper_ctypes)]
6#![deny(missing_docs)]
7#![deny(no_mangle_generic_items)]
8#![deny(non_shorthand_field_patterns)]
9#![deny(overflowing_literals)]
10#![deny(path_statements)]
11#![deny(patterns_in_fns_without_body)]
12#![deny(private_in_public)]
13#![deny(unconditional_recursion)]
14#![deny(unused_allocation)]
15#![deny(unused_comparisons)]
16#![deny(unused_parens)]
17#![deny(while_true)]
18#![allow(non_camel_case_types)]
19#![allow(non_snake_case)]
20#![no_std]
21use core::marker::PhantomData;
22use core::ops::Deref;
23#[doc = r"Number available in the NVIC for configuring priority"]
24pub const NVIC_PRIO_BITS: u8 = 2;
25#[cfg(feature = "rt")]
26pub use self::Interrupt as interrupt;
27pub use cortex_m::peripheral::Peripherals as CorePeripherals;
28pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
29#[cfg(feature = "rt")]
30pub use cortex_m_rt::interrupt;
31#[allow(unused_imports)]
32use generic::*;
33#[doc = r"Common register and bit access and modify traits"]
34pub mod generic;
35#[cfg(feature = "rt")]
36extern "C" {
37 fn DMA0();
38 fn DMA1();
39 fn DMA2();
40 fn DMA3();
41 fn DMA_ERROR();
42 fn ERM_FAULT();
43 fn RTC();
44 fn RTC_SECONDS();
45 fn LPTMR0();
46 fn PORT();
47 fn CAN0_ORED_ERR_WAKEUP();
48 fn CAN0_ORED_0_31_MB();
49 fn FTM0_CH0_7();
50 fn FTM0_FAULT();
51 fn FTM0_OVF_RELOAD();
52 fn FTM1_CH0_7();
53 fn FTM1_FAULT();
54 fn FTM1_OVF_RELOAD();
55 fn FTFC();
56 fn PDB0();
57 fn LPIT0();
58 fn SCG_CMU_LVD_LVWSCG();
59 fn WDOG();
60 fn RCM();
61 fn LPI2C0_MASTER_SLAVE();
62 fn FLEXIO();
63 fn LPSPI0();
64 fn LPSPI1();
65 fn ADC0();
66 fn CMP0();
67 fn LPUART1_RXTX();
68 fn LPUART0_RXTX();
69}
70#[doc(hidden)]
71pub union Vector {
72 _handler: unsafe extern "C" fn(),
73 _reserved: u32,
74}
75#[cfg(feature = "rt")]
76#[doc(hidden)]
77#[link_section = ".vector_table.interrupts"]
78#[no_mangle]
79pub static __INTERRUPTS: [Vector; 32] = [
80 Vector { _handler: DMA0 },
81 Vector { _handler: DMA1 },
82 Vector { _handler: DMA2 },
83 Vector { _handler: DMA3 },
84 Vector {
85 _handler: DMA_ERROR,
86 },
87 Vector {
88 _handler: ERM_FAULT,
89 },
90 Vector { _handler: RTC },
91 Vector {
92 _handler: RTC_SECONDS,
93 },
94 Vector { _handler: LPTMR0 },
95 Vector { _handler: PORT },
96 Vector {
97 _handler: CAN0_ORED_ERR_WAKEUP,
98 },
99 Vector {
100 _handler: CAN0_ORED_0_31_MB,
101 },
102 Vector {
103 _handler: FTM0_CH0_7,
104 },
105 Vector {
106 _handler: FTM0_FAULT,
107 },
108 Vector {
109 _handler: FTM0_OVF_RELOAD,
110 },
111 Vector {
112 _handler: FTM1_CH0_7,
113 },
114 Vector {
115 _handler: FTM1_FAULT,
116 },
117 Vector {
118 _handler: FTM1_OVF_RELOAD,
119 },
120 Vector { _handler: FTFC },
121 Vector { _handler: PDB0 },
122 Vector { _handler: LPIT0 },
123 Vector {
124 _handler: SCG_CMU_LVD_LVWSCG,
125 },
126 Vector { _handler: WDOG },
127 Vector { _handler: RCM },
128 Vector {
129 _handler: LPI2C0_MASTER_SLAVE,
130 },
131 Vector { _handler: FLEXIO },
132 Vector { _handler: LPSPI0 },
133 Vector { _handler: LPSPI1 },
134 Vector { _handler: ADC0 },
135 Vector { _handler: CMP0 },
136 Vector {
137 _handler: LPUART1_RXTX,
138 },
139 Vector {
140 _handler: LPUART0_RXTX,
141 },
142];
143#[doc = r"Enumeration of all the interrupts."]
144#[derive(Copy, Clone, Debug, PartialEq, Eq)]
145#[repr(u16)]
146pub enum Interrupt {
147 #[doc = "0 - DMA0"]
148 DMA0 = 0,
149 #[doc = "1 - DMA1"]
150 DMA1 = 1,
151 #[doc = "2 - DMA2"]
152 DMA2 = 2,
153 #[doc = "3 - DMA3"]
154 DMA3 = 3,
155 #[doc = "4 - DMA_Error"]
156 DMA_ERROR = 4,
157 #[doc = "5 - ERM_fault"]
158 ERM_FAULT = 5,
159 #[doc = "6 - RTC"]
160 RTC = 6,
161 #[doc = "7 - RTC_Seconds"]
162 RTC_SECONDS = 7,
163 #[doc = "8 - LPTMR0"]
164 LPTMR0 = 8,
165 #[doc = "9 - PORT"]
166 PORT = 9,
167 #[doc = "10 - CAN0_ORed_Err_Wakeup"]
168 CAN0_ORED_ERR_WAKEUP = 10,
169 #[doc = "11 - CAN0_ORed_0_31_MB"]
170 CAN0_ORED_0_31_MB = 11,
171 #[doc = "12 - FTM0_Ch0_7"]
172 FTM0_CH0_7 = 12,
173 #[doc = "13 - FTM0_Fault"]
174 FTM0_FAULT = 13,
175 #[doc = "14 - FTM0_Ovf_Reload"]
176 FTM0_OVF_RELOAD = 14,
177 #[doc = "15 - FTM1_Ch0_7"]
178 FTM1_CH0_7 = 15,
179 #[doc = "16 - FTM1_Fault"]
180 FTM1_FAULT = 16,
181 #[doc = "17 - FTM1_Ovf_Reload"]
182 FTM1_OVF_RELOAD = 17,
183 #[doc = "18 - FTFC"]
184 FTFC = 18,
185 #[doc = "19 - PDB0"]
186 PDB0 = 19,
187 #[doc = "20 - LPIT0"]
188 LPIT0 = 20,
189 #[doc = "21 - SCG_CMU_LVD_LVWSCG"]
190 SCG_CMU_LVD_LVWSCG = 21,
191 #[doc = "22 - WDOG"]
192 WDOG = 22,
193 #[doc = "23 - RCM"]
194 RCM = 23,
195 #[doc = "24 - LPI2C0_Master_Slave"]
196 LPI2C0_MASTER_SLAVE = 24,
197 #[doc = "25 - FLEXIO"]
198 FLEXIO = 25,
199 #[doc = "26 - LPSPI0"]
200 LPSPI0 = 26,
201 #[doc = "27 - LPSPI1"]
202 LPSPI1 = 27,
203 #[doc = "28 - ADC0"]
204 ADC0 = 28,
205 #[doc = "29 - CMP0"]
206 CMP0 = 29,
207 #[doc = "30 - LPUART1_RxTx"]
208 LPUART1_RXTX = 30,
209 #[doc = "31 - LPUART0_RxTx"]
210 LPUART0_RXTX = 31,
211}
212unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
213 #[inline(always)]
214 fn number(self) -> u16 {
215 self as u16
216 }
217}
218#[doc = "CSE_PRAM"]
219pub struct CSE_PRAM {
220 _marker: PhantomData<*const ()>,
221}
222unsafe impl Send for CSE_PRAM {}
223impl CSE_PRAM {
224 #[doc = r"Pointer to the register block"]
225 pub const PTR: *const cse_pram::RegisterBlock = 0x1400_0800 as *const _;
226 #[doc = r"Return the pointer to the register block"]
227 #[inline(always)]
228 pub const fn ptr() -> *const cse_pram::RegisterBlock {
229 Self::PTR
230 }
231}
232impl Deref for CSE_PRAM {
233 type Target = cse_pram::RegisterBlock;
234 #[inline(always)]
235 fn deref(&self) -> &Self::Target {
236 unsafe { &*Self::PTR }
237 }
238}
239impl core::fmt::Debug for CSE_PRAM {
240 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
241 f.debug_struct("CSE_PRAM").finish()
242 }
243}
244#[doc = "CSE_PRAM"]
245pub mod cse_pram;
246#[doc = "AIPS-Lite Bridge"]
247pub struct AIPS {
248 _marker: PhantomData<*const ()>,
249}
250unsafe impl Send for AIPS {}
251impl AIPS {
252 #[doc = r"Pointer to the register block"]
253 pub const PTR: *const aips::RegisterBlock = 0x4000_0000 as *const _;
254 #[doc = r"Return the pointer to the register block"]
255 #[inline(always)]
256 pub const fn ptr() -> *const aips::RegisterBlock {
257 Self::PTR
258 }
259}
260impl Deref for AIPS {
261 type Target = aips::RegisterBlock;
262 #[inline(always)]
263 fn deref(&self) -> &Self::Target {
264 unsafe { &*Self::PTR }
265 }
266}
267impl core::fmt::Debug for AIPS {
268 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
269 f.debug_struct("AIPS").finish()
270 }
271}
272#[doc = "AIPS-Lite Bridge"]
273pub mod aips;
274#[doc = "MSCM"]
275pub struct MSCM {
276 _marker: PhantomData<*const ()>,
277}
278unsafe impl Send for MSCM {}
279impl MSCM {
280 #[doc = r"Pointer to the register block"]
281 pub const PTR: *const mscm::RegisterBlock = 0x4000_1000 as *const _;
282 #[doc = r"Return the pointer to the register block"]
283 #[inline(always)]
284 pub const fn ptr() -> *const mscm::RegisterBlock {
285 Self::PTR
286 }
287}
288impl Deref for MSCM {
289 type Target = mscm::RegisterBlock;
290 #[inline(always)]
291 fn deref(&self) -> &Self::Target {
292 unsafe { &*Self::PTR }
293 }
294}
295impl core::fmt::Debug for MSCM {
296 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
297 f.debug_struct("MSCM").finish()
298 }
299}
300#[doc = "MSCM"]
301pub mod mscm;
302#[doc = "Enhanced Direct Memory Access"]
303pub struct DMA {
304 _marker: PhantomData<*const ()>,
305}
306unsafe impl Send for DMA {}
307impl DMA {
308 #[doc = r"Pointer to the register block"]
309 pub const PTR: *const dma::RegisterBlock = 0x4000_8000 as *const _;
310 #[doc = r"Return the pointer to the register block"]
311 #[inline(always)]
312 pub const fn ptr() -> *const dma::RegisterBlock {
313 Self::PTR
314 }
315}
316impl Deref for DMA {
317 type Target = dma::RegisterBlock;
318 #[inline(always)]
319 fn deref(&self) -> &Self::Target {
320 unsafe { &*Self::PTR }
321 }
322}
323impl core::fmt::Debug for DMA {
324 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
325 f.debug_struct("DMA").finish()
326 }
327}
328#[doc = "Enhanced Direct Memory Access"]
329pub mod dma;
330#[doc = "ERM"]
331pub struct ERM {
332 _marker: PhantomData<*const ()>,
333}
334unsafe impl Send for ERM {}
335impl ERM {
336 #[doc = r"Pointer to the register block"]
337 pub const PTR: *const erm::RegisterBlock = 0x4001_8000 as *const _;
338 #[doc = r"Return the pointer to the register block"]
339 #[inline(always)]
340 pub const fn ptr() -> *const erm::RegisterBlock {
341 Self::PTR
342 }
343}
344impl Deref for ERM {
345 type Target = erm::RegisterBlock;
346 #[inline(always)]
347 fn deref(&self) -> &Self::Target {
348 unsafe { &*Self::PTR }
349 }
350}
351impl core::fmt::Debug for ERM {
352 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
353 f.debug_struct("ERM").finish()
354 }
355}
356#[doc = "ERM"]
357pub mod erm;
358#[doc = "Error Injection Module"]
359pub struct EIM {
360 _marker: PhantomData<*const ()>,
361}
362unsafe impl Send for EIM {}
363impl EIM {
364 #[doc = r"Pointer to the register block"]
365 pub const PTR: *const eim::RegisterBlock = 0x4001_9000 as *const _;
366 #[doc = r"Return the pointer to the register block"]
367 #[inline(always)]
368 pub const fn ptr() -> *const eim::RegisterBlock {
369 Self::PTR
370 }
371}
372impl Deref for EIM {
373 type Target = eim::RegisterBlock;
374 #[inline(always)]
375 fn deref(&self) -> &Self::Target {
376 unsafe { &*Self::PTR }
377 }
378}
379impl core::fmt::Debug for EIM {
380 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
381 f.debug_struct("EIM").finish()
382 }
383}
384#[doc = "Error Injection Module"]
385pub mod eim;
386#[doc = "FTFC"]
387pub struct FTFC {
388 _marker: PhantomData<*const ()>,
389}
390unsafe impl Send for FTFC {}
391impl FTFC {
392 #[doc = r"Pointer to the register block"]
393 pub const PTR: *const ftfc::RegisterBlock = 0x4002_0000 as *const _;
394 #[doc = r"Return the pointer to the register block"]
395 #[inline(always)]
396 pub const fn ptr() -> *const ftfc::RegisterBlock {
397 Self::PTR
398 }
399}
400impl Deref for FTFC {
401 type Target = ftfc::RegisterBlock;
402 #[inline(always)]
403 fn deref(&self) -> &Self::Target {
404 unsafe { &*Self::PTR }
405 }
406}
407impl core::fmt::Debug for FTFC {
408 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
409 f.debug_struct("FTFC").finish()
410 }
411}
412#[doc = "FTFC"]
413pub mod ftfc;
414#[doc = "DMA channel multiplexor"]
415pub struct DMAMUX {
416 _marker: PhantomData<*const ()>,
417}
418unsafe impl Send for DMAMUX {}
419impl DMAMUX {
420 #[doc = r"Pointer to the register block"]
421 pub const PTR: *const dmamux::RegisterBlock = 0x4002_1000 as *const _;
422 #[doc = r"Return the pointer to the register block"]
423 #[inline(always)]
424 pub const fn ptr() -> *const dmamux::RegisterBlock {
425 Self::PTR
426 }
427}
428impl Deref for DMAMUX {
429 type Target = dmamux::RegisterBlock;
430 #[inline(always)]
431 fn deref(&self) -> &Self::Target {
432 unsafe { &*Self::PTR }
433 }
434}
435impl core::fmt::Debug for DMAMUX {
436 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
437 f.debug_struct("DMAMUX").finish()
438 }
439}
440#[doc = "DMA channel multiplexor"]
441pub mod dmamux;
442#[doc = "Flex Controller Area Network module"]
443pub struct CAN0 {
444 _marker: PhantomData<*const ()>,
445}
446unsafe impl Send for CAN0 {}
447impl CAN0 {
448 #[doc = r"Pointer to the register block"]
449 pub const PTR: *const can0::RegisterBlock = 0x4002_4000 as *const _;
450 #[doc = r"Return the pointer to the register block"]
451 #[inline(always)]
452 pub const fn ptr() -> *const can0::RegisterBlock {
453 Self::PTR
454 }
455}
456impl Deref for CAN0 {
457 type Target = can0::RegisterBlock;
458 #[inline(always)]
459 fn deref(&self) -> &Self::Target {
460 unsafe { &*Self::PTR }
461 }
462}
463impl core::fmt::Debug for CAN0 {
464 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
465 f.debug_struct("CAN0").finish()
466 }
467}
468#[doc = "Flex Controller Area Network module"]
469pub mod can0;
470#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
471pub struct LPSPI0 {
472 _marker: PhantomData<*const ()>,
473}
474unsafe impl Send for LPSPI0 {}
475impl LPSPI0 {
476 #[doc = r"Pointer to the register block"]
477 pub const PTR: *const lpspi0::RegisterBlock = 0x4002_c000 as *const _;
478 #[doc = r"Return the pointer to the register block"]
479 #[inline(always)]
480 pub const fn ptr() -> *const lpspi0::RegisterBlock {
481 Self::PTR
482 }
483}
484impl Deref for LPSPI0 {
485 type Target = lpspi0::RegisterBlock;
486 #[inline(always)]
487 fn deref(&self) -> &Self::Target {
488 unsafe { &*Self::PTR }
489 }
490}
491impl core::fmt::Debug for LPSPI0 {
492 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
493 f.debug_struct("LPSPI0").finish()
494 }
495}
496#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
497pub mod lpspi0;
498#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
499pub struct LPSPI1 {
500 _marker: PhantomData<*const ()>,
501}
502unsafe impl Send for LPSPI1 {}
503impl LPSPI1 {
504 #[doc = r"Pointer to the register block"]
505 pub const PTR: *const lpspi1::RegisterBlock = 0x4002_d000 as *const _;
506 #[doc = r"Return the pointer to the register block"]
507 #[inline(always)]
508 pub const fn ptr() -> *const lpspi1::RegisterBlock {
509 Self::PTR
510 }
511}
512impl Deref for LPSPI1 {
513 type Target = lpspi1::RegisterBlock;
514 #[inline(always)]
515 fn deref(&self) -> &Self::Target {
516 unsafe { &*Self::PTR }
517 }
518}
519impl core::fmt::Debug for LPSPI1 {
520 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
521 f.debug_struct("LPSPI1").finish()
522 }
523}
524#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
525pub mod lpspi1;
526#[doc = "Cyclic Redundancy Check"]
527pub struct CRC {
528 _marker: PhantomData<*const ()>,
529}
530unsafe impl Send for CRC {}
531impl CRC {
532 #[doc = r"Pointer to the register block"]
533 pub const PTR: *const crc::RegisterBlock = 0x4003_2000 as *const _;
534 #[doc = r"Return the pointer to the register block"]
535 #[inline(always)]
536 pub const fn ptr() -> *const crc::RegisterBlock {
537 Self::PTR
538 }
539}
540impl Deref for CRC {
541 type Target = crc::RegisterBlock;
542 #[inline(always)]
543 fn deref(&self) -> &Self::Target {
544 unsafe { &*Self::PTR }
545 }
546}
547impl core::fmt::Debug for CRC {
548 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
549 f.debug_struct("CRC").finish()
550 }
551}
552#[doc = "Cyclic Redundancy Check"]
553pub mod crc;
554#[doc = "Programmable Delay Block"]
555pub struct PDB0 {
556 _marker: PhantomData<*const ()>,
557}
558unsafe impl Send for PDB0 {}
559impl PDB0 {
560 #[doc = r"Pointer to the register block"]
561 pub const PTR: *const pdb0::RegisterBlock = 0x4003_6000 as *const _;
562 #[doc = r"Return the pointer to the register block"]
563 #[inline(always)]
564 pub const fn ptr() -> *const pdb0::RegisterBlock {
565 Self::PTR
566 }
567}
568impl Deref for PDB0 {
569 type Target = pdb0::RegisterBlock;
570 #[inline(always)]
571 fn deref(&self) -> &Self::Target {
572 unsafe { &*Self::PTR }
573 }
574}
575impl core::fmt::Debug for PDB0 {
576 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
577 f.debug_struct("PDB0").finish()
578 }
579}
580#[doc = "Programmable Delay Block"]
581pub mod pdb0;
582#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
583pub struct LPIT0 {
584 _marker: PhantomData<*const ()>,
585}
586unsafe impl Send for LPIT0 {}
587impl LPIT0 {
588 #[doc = r"Pointer to the register block"]
589 pub const PTR: *const lpit0::RegisterBlock = 0x4003_7000 as *const _;
590 #[doc = r"Return the pointer to the register block"]
591 #[inline(always)]
592 pub const fn ptr() -> *const lpit0::RegisterBlock {
593 Self::PTR
594 }
595}
596impl Deref for LPIT0 {
597 type Target = lpit0::RegisterBlock;
598 #[inline(always)]
599 fn deref(&self) -> &Self::Target {
600 unsafe { &*Self::PTR }
601 }
602}
603impl core::fmt::Debug for LPIT0 {
604 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
605 f.debug_struct("LPIT0").finish()
606 }
607}
608#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
609pub mod lpit0;
610#[doc = "FlexTimer Module"]
611pub struct FTM0 {
612 _marker: PhantomData<*const ()>,
613}
614unsafe impl Send for FTM0 {}
615impl FTM0 {
616 #[doc = r"Pointer to the register block"]
617 pub const PTR: *const ftm0::RegisterBlock = 0x4003_8000 as *const _;
618 #[doc = r"Return the pointer to the register block"]
619 #[inline(always)]
620 pub const fn ptr() -> *const ftm0::RegisterBlock {
621 Self::PTR
622 }
623}
624impl Deref for FTM0 {
625 type Target = ftm0::RegisterBlock;
626 #[inline(always)]
627 fn deref(&self) -> &Self::Target {
628 unsafe { &*Self::PTR }
629 }
630}
631impl core::fmt::Debug for FTM0 {
632 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
633 f.debug_struct("FTM0").finish()
634 }
635}
636#[doc = "FlexTimer Module"]
637pub mod ftm0;
638#[doc = "FlexTimer Module"]
639pub struct FTM1 {
640 _marker: PhantomData<*const ()>,
641}
642unsafe impl Send for FTM1 {}
643impl FTM1 {
644 #[doc = r"Pointer to the register block"]
645 pub const PTR: *const ftm1::RegisterBlock = 0x4003_9000 as *const _;
646 #[doc = r"Return the pointer to the register block"]
647 #[inline(always)]
648 pub const fn ptr() -> *const ftm1::RegisterBlock {
649 Self::PTR
650 }
651}
652impl Deref for FTM1 {
653 type Target = ftm1::RegisterBlock;
654 #[inline(always)]
655 fn deref(&self) -> &Self::Target {
656 unsafe { &*Self::PTR }
657 }
658}
659impl core::fmt::Debug for FTM1 {
660 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
661 f.debug_struct("FTM1").finish()
662 }
663}
664#[doc = "FlexTimer Module"]
665pub mod ftm1;
666#[doc = "Analog-to-Digital Converter"]
667pub struct ADC0 {
668 _marker: PhantomData<*const ()>,
669}
670unsafe impl Send for ADC0 {}
671impl ADC0 {
672 #[doc = r"Pointer to the register block"]
673 pub const PTR: *const adc0::RegisterBlock = 0x4003_b000 as *const _;
674 #[doc = r"Return the pointer to the register block"]
675 #[inline(always)]
676 pub const fn ptr() -> *const adc0::RegisterBlock {
677 Self::PTR
678 }
679}
680impl Deref for ADC0 {
681 type Target = adc0::RegisterBlock;
682 #[inline(always)]
683 fn deref(&self) -> &Self::Target {
684 unsafe { &*Self::PTR }
685 }
686}
687impl core::fmt::Debug for ADC0 {
688 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
689 f.debug_struct("ADC0").finish()
690 }
691}
692#[doc = "Analog-to-Digital Converter"]
693pub mod adc0;
694#[doc = "Secure Real Time Clock"]
695pub struct RTC {
696 _marker: PhantomData<*const ()>,
697}
698unsafe impl Send for RTC {}
699impl RTC {
700 #[doc = r"Pointer to the register block"]
701 pub const PTR: *const rtc::RegisterBlock = 0x4003_d000 as *const _;
702 #[doc = r"Return the pointer to the register block"]
703 #[inline(always)]
704 pub const fn ptr() -> *const rtc::RegisterBlock {
705 Self::PTR
706 }
707}
708impl Deref for RTC {
709 type Target = rtc::RegisterBlock;
710 #[inline(always)]
711 fn deref(&self) -> &Self::Target {
712 unsafe { &*Self::PTR }
713 }
714}
715impl core::fmt::Debug for RTC {
716 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
717 f.debug_struct("RTC").finish()
718 }
719}
720#[doc = "Secure Real Time Clock"]
721pub mod rtc;
722#[doc = "CMU_FC"]
723pub struct CMU_FC_0 {
724 _marker: PhantomData<*const ()>,
725}
726unsafe impl Send for CMU_FC_0 {}
727impl CMU_FC_0 {
728 #[doc = r"Pointer to the register block"]
729 pub const PTR: *const cmu_fc_0::RegisterBlock = 0x4003_e000 as *const _;
730 #[doc = r"Return the pointer to the register block"]
731 #[inline(always)]
732 pub const fn ptr() -> *const cmu_fc_0::RegisterBlock {
733 Self::PTR
734 }
735}
736impl Deref for CMU_FC_0 {
737 type Target = cmu_fc_0::RegisterBlock;
738 #[inline(always)]
739 fn deref(&self) -> &Self::Target {
740 unsafe { &*Self::PTR }
741 }
742}
743impl core::fmt::Debug for CMU_FC_0 {
744 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
745 f.debug_struct("CMU_FC_0").finish()
746 }
747}
748#[doc = "CMU_FC"]
749pub mod cmu_fc_0;
750#[doc = "CMU_FC"]
751pub struct CMU_FC_1 {
752 _marker: PhantomData<*const ()>,
753}
754unsafe impl Send for CMU_FC_1 {}
755impl CMU_FC_1 {
756 #[doc = r"Pointer to the register block"]
757 pub const PTR: *const cmu_fc_1::RegisterBlock = 0x4003_f000 as *const _;
758 #[doc = r"Return the pointer to the register block"]
759 #[inline(always)]
760 pub const fn ptr() -> *const cmu_fc_1::RegisterBlock {
761 Self::PTR
762 }
763}
764impl Deref for CMU_FC_1 {
765 type Target = cmu_fc_1::RegisterBlock;
766 #[inline(always)]
767 fn deref(&self) -> &Self::Target {
768 unsafe { &*Self::PTR }
769 }
770}
771impl core::fmt::Debug for CMU_FC_1 {
772 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
773 f.debug_struct("CMU_FC_1").finish()
774 }
775}
776#[doc = "CMU_FC"]
777pub mod cmu_fc_1;
778#[doc = "Low Power Timer"]
779pub struct LPTMR0 {
780 _marker: PhantomData<*const ()>,
781}
782unsafe impl Send for LPTMR0 {}
783impl LPTMR0 {
784 #[doc = r"Pointer to the register block"]
785 pub const PTR: *const lptmr0::RegisterBlock = 0x4004_0000 as *const _;
786 #[doc = r"Return the pointer to the register block"]
787 #[inline(always)]
788 pub const fn ptr() -> *const lptmr0::RegisterBlock {
789 Self::PTR
790 }
791}
792impl Deref for LPTMR0 {
793 type Target = lptmr0::RegisterBlock;
794 #[inline(always)]
795 fn deref(&self) -> &Self::Target {
796 unsafe { &*Self::PTR }
797 }
798}
799impl core::fmt::Debug for LPTMR0 {
800 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
801 f.debug_struct("LPTMR0").finish()
802 }
803}
804#[doc = "Low Power Timer"]
805pub mod lptmr0;
806#[doc = "System Integration Module"]
807pub struct SIM {
808 _marker: PhantomData<*const ()>,
809}
810unsafe impl Send for SIM {}
811impl SIM {
812 #[doc = r"Pointer to the register block"]
813 pub const PTR: *const sim::RegisterBlock = 0x4004_8000 as *const _;
814 #[doc = r"Return the pointer to the register block"]
815 #[inline(always)]
816 pub const fn ptr() -> *const sim::RegisterBlock {
817 Self::PTR
818 }
819}
820impl Deref for SIM {
821 type Target = sim::RegisterBlock;
822 #[inline(always)]
823 fn deref(&self) -> &Self::Target {
824 unsafe { &*Self::PTR }
825 }
826}
827impl core::fmt::Debug for SIM {
828 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
829 f.debug_struct("SIM").finish()
830 }
831}
832#[doc = "System Integration Module"]
833pub mod sim;
834#[doc = "Pin Control and Interrupts"]
835pub struct PORTA {
836 _marker: PhantomData<*const ()>,
837}
838unsafe impl Send for PORTA {}
839impl PORTA {
840 #[doc = r"Pointer to the register block"]
841 pub const PTR: *const porta::RegisterBlock = 0x4004_9000 as *const _;
842 #[doc = r"Return the pointer to the register block"]
843 #[inline(always)]
844 pub const fn ptr() -> *const porta::RegisterBlock {
845 Self::PTR
846 }
847}
848impl Deref for PORTA {
849 type Target = porta::RegisterBlock;
850 #[inline(always)]
851 fn deref(&self) -> &Self::Target {
852 unsafe { &*Self::PTR }
853 }
854}
855impl core::fmt::Debug for PORTA {
856 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
857 f.debug_struct("PORTA").finish()
858 }
859}
860#[doc = "Pin Control and Interrupts"]
861pub mod porta;
862#[doc = "Pin Control and Interrupts"]
863pub struct PORTB {
864 _marker: PhantomData<*const ()>,
865}
866unsafe impl Send for PORTB {}
867impl PORTB {
868 #[doc = r"Pointer to the register block"]
869 pub const PTR: *const portb::RegisterBlock = 0x4004_a000 as *const _;
870 #[doc = r"Return the pointer to the register block"]
871 #[inline(always)]
872 pub const fn ptr() -> *const portb::RegisterBlock {
873 Self::PTR
874 }
875}
876impl Deref for PORTB {
877 type Target = portb::RegisterBlock;
878 #[inline(always)]
879 fn deref(&self) -> &Self::Target {
880 unsafe { &*Self::PTR }
881 }
882}
883impl core::fmt::Debug for PORTB {
884 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
885 f.debug_struct("PORTB").finish()
886 }
887}
888#[doc = "Pin Control and Interrupts"]
889pub mod portb;
890#[doc = "Pin Control and Interrupts"]
891pub struct PORTC {
892 _marker: PhantomData<*const ()>,
893}
894unsafe impl Send for PORTC {}
895impl PORTC {
896 #[doc = r"Pointer to the register block"]
897 pub const PTR: *const portc::RegisterBlock = 0x4004_b000 as *const _;
898 #[doc = r"Return the pointer to the register block"]
899 #[inline(always)]
900 pub const fn ptr() -> *const portc::RegisterBlock {
901 Self::PTR
902 }
903}
904impl Deref for PORTC {
905 type Target = portc::RegisterBlock;
906 #[inline(always)]
907 fn deref(&self) -> &Self::Target {
908 unsafe { &*Self::PTR }
909 }
910}
911impl core::fmt::Debug for PORTC {
912 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
913 f.debug_struct("PORTC").finish()
914 }
915}
916#[doc = "Pin Control and Interrupts"]
917pub mod portc;
918#[doc = "Pin Control and Interrupts"]
919pub struct PORTD {
920 _marker: PhantomData<*const ()>,
921}
922unsafe impl Send for PORTD {}
923impl PORTD {
924 #[doc = r"Pointer to the register block"]
925 pub const PTR: *const portd::RegisterBlock = 0x4004_c000 as *const _;
926 #[doc = r"Return the pointer to the register block"]
927 #[inline(always)]
928 pub const fn ptr() -> *const portd::RegisterBlock {
929 Self::PTR
930 }
931}
932impl Deref for PORTD {
933 type Target = portd::RegisterBlock;
934 #[inline(always)]
935 fn deref(&self) -> &Self::Target {
936 unsafe { &*Self::PTR }
937 }
938}
939impl core::fmt::Debug for PORTD {
940 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
941 f.debug_struct("PORTD").finish()
942 }
943}
944#[doc = "Pin Control and Interrupts"]
945pub mod portd;
946#[doc = "Pin Control and Interrupts"]
947pub struct PORTE {
948 _marker: PhantomData<*const ()>,
949}
950unsafe impl Send for PORTE {}
951impl PORTE {
952 #[doc = r"Pointer to the register block"]
953 pub const PTR: *const porte::RegisterBlock = 0x4004_d000 as *const _;
954 #[doc = r"Return the pointer to the register block"]
955 #[inline(always)]
956 pub const fn ptr() -> *const porte::RegisterBlock {
957 Self::PTR
958 }
959}
960impl Deref for PORTE {
961 type Target = porte::RegisterBlock;
962 #[inline(always)]
963 fn deref(&self) -> &Self::Target {
964 unsafe { &*Self::PTR }
965 }
966}
967impl core::fmt::Debug for PORTE {
968 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
969 f.debug_struct("PORTE").finish()
970 }
971}
972#[doc = "Pin Control and Interrupts"]
973pub mod porte;
974#[doc = "Watchdog timer"]
975pub struct WDOG {
976 _marker: PhantomData<*const ()>,
977}
978unsafe impl Send for WDOG {}
979impl WDOG {
980 #[doc = r"Pointer to the register block"]
981 pub const PTR: *const wdog::RegisterBlock = 0x4005_2000 as *const _;
982 #[doc = r"Return the pointer to the register block"]
983 #[inline(always)]
984 pub const fn ptr() -> *const wdog::RegisterBlock {
985 Self::PTR
986 }
987}
988impl Deref for WDOG {
989 type Target = wdog::RegisterBlock;
990 #[inline(always)]
991 fn deref(&self) -> &Self::Target {
992 unsafe { &*Self::PTR }
993 }
994}
995impl core::fmt::Debug for WDOG {
996 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
997 f.debug_struct("WDOG").finish()
998 }
999}
1000#[doc = "Watchdog timer"]
1001pub mod wdog;
1002#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1003pub struct FLEXIO {
1004 _marker: PhantomData<*const ()>,
1005}
1006unsafe impl Send for FLEXIO {}
1007impl FLEXIO {
1008 #[doc = r"Pointer to the register block"]
1009 pub const PTR: *const flexio::RegisterBlock = 0x4005_a000 as *const _;
1010 #[doc = r"Return the pointer to the register block"]
1011 #[inline(always)]
1012 pub const fn ptr() -> *const flexio::RegisterBlock {
1013 Self::PTR
1014 }
1015}
1016impl Deref for FLEXIO {
1017 type Target = flexio::RegisterBlock;
1018 #[inline(always)]
1019 fn deref(&self) -> &Self::Target {
1020 unsafe { &*Self::PTR }
1021 }
1022}
1023impl core::fmt::Debug for FLEXIO {
1024 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1025 f.debug_struct("FLEXIO").finish()
1026 }
1027}
1028#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
1029pub mod flexio;
1030#[doc = "TRGMUX"]
1031pub struct TRGMUX {
1032 _marker: PhantomData<*const ()>,
1033}
1034unsafe impl Send for TRGMUX {}
1035impl TRGMUX {
1036 #[doc = r"Pointer to the register block"]
1037 pub const PTR: *const trgmux::RegisterBlock = 0x4006_3000 as *const _;
1038 #[doc = r"Return the pointer to the register block"]
1039 #[inline(always)]
1040 pub const fn ptr() -> *const trgmux::RegisterBlock {
1041 Self::PTR
1042 }
1043}
1044impl Deref for TRGMUX {
1045 type Target = trgmux::RegisterBlock;
1046 #[inline(always)]
1047 fn deref(&self) -> &Self::Target {
1048 unsafe { &*Self::PTR }
1049 }
1050}
1051impl core::fmt::Debug for TRGMUX {
1052 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1053 f.debug_struct("TRGMUX").finish()
1054 }
1055}
1056#[doc = "TRGMUX"]
1057pub mod trgmux;
1058#[doc = "System Clock Generator"]
1059pub struct SCG {
1060 _marker: PhantomData<*const ()>,
1061}
1062unsafe impl Send for SCG {}
1063impl SCG {
1064 #[doc = r"Pointer to the register block"]
1065 pub const PTR: *const scg::RegisterBlock = 0x4006_4000 as *const _;
1066 #[doc = r"Return the pointer to the register block"]
1067 #[inline(always)]
1068 pub const fn ptr() -> *const scg::RegisterBlock {
1069 Self::PTR
1070 }
1071}
1072impl Deref for SCG {
1073 type Target = scg::RegisterBlock;
1074 #[inline(always)]
1075 fn deref(&self) -> &Self::Target {
1076 unsafe { &*Self::PTR }
1077 }
1078}
1079impl core::fmt::Debug for SCG {
1080 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1081 f.debug_struct("SCG").finish()
1082 }
1083}
1084#[doc = "System Clock Generator"]
1085pub mod scg;
1086#[doc = "PCC"]
1087pub struct PCC {
1088 _marker: PhantomData<*const ()>,
1089}
1090unsafe impl Send for PCC {}
1091impl PCC {
1092 #[doc = r"Pointer to the register block"]
1093 pub const PTR: *const pcc::RegisterBlock = 0x4006_5000 as *const _;
1094 #[doc = r"Return the pointer to the register block"]
1095 #[inline(always)]
1096 pub const fn ptr() -> *const pcc::RegisterBlock {
1097 Self::PTR
1098 }
1099}
1100impl Deref for PCC {
1101 type Target = pcc::RegisterBlock;
1102 #[inline(always)]
1103 fn deref(&self) -> &Self::Target {
1104 unsafe { &*Self::PTR }
1105 }
1106}
1107impl core::fmt::Debug for PCC {
1108 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1109 f.debug_struct("PCC").finish()
1110 }
1111}
1112#[doc = "PCC"]
1113pub mod pcc;
1114#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1115pub struct LPI2C0 {
1116 _marker: PhantomData<*const ()>,
1117}
1118unsafe impl Send for LPI2C0 {}
1119impl LPI2C0 {
1120 #[doc = r"Pointer to the register block"]
1121 pub const PTR: *const lpi2c0::RegisterBlock = 0x4006_6000 as *const _;
1122 #[doc = r"Return the pointer to the register block"]
1123 #[inline(always)]
1124 pub const fn ptr() -> *const lpi2c0::RegisterBlock {
1125 Self::PTR
1126 }
1127}
1128impl Deref for LPI2C0 {
1129 type Target = lpi2c0::RegisterBlock;
1130 #[inline(always)]
1131 fn deref(&self) -> &Self::Target {
1132 unsafe { &*Self::PTR }
1133 }
1134}
1135impl core::fmt::Debug for LPI2C0 {
1136 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1137 f.debug_struct("LPI2C0").finish()
1138 }
1139}
1140#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
1141pub mod lpi2c0;
1142#[doc = "Universal Asynchronous Receiver/Transmitter"]
1143pub struct LPUART0 {
1144 _marker: PhantomData<*const ()>,
1145}
1146unsafe impl Send for LPUART0 {}
1147impl LPUART0 {
1148 #[doc = r"Pointer to the register block"]
1149 pub const PTR: *const lpuart0::RegisterBlock = 0x4006_a000 as *const _;
1150 #[doc = r"Return the pointer to the register block"]
1151 #[inline(always)]
1152 pub const fn ptr() -> *const lpuart0::RegisterBlock {
1153 Self::PTR
1154 }
1155}
1156impl Deref for LPUART0 {
1157 type Target = lpuart0::RegisterBlock;
1158 #[inline(always)]
1159 fn deref(&self) -> &Self::Target {
1160 unsafe { &*Self::PTR }
1161 }
1162}
1163impl core::fmt::Debug for LPUART0 {
1164 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1165 f.debug_struct("LPUART0").finish()
1166 }
1167}
1168#[doc = "Universal Asynchronous Receiver/Transmitter"]
1169pub mod lpuart0;
1170#[doc = "Universal Asynchronous Receiver/Transmitter"]
1171pub struct LPUART1 {
1172 _marker: PhantomData<*const ()>,
1173}
1174unsafe impl Send for LPUART1 {}
1175impl LPUART1 {
1176 #[doc = r"Pointer to the register block"]
1177 pub const PTR: *const lpuart1::RegisterBlock = 0x4006_b000 as *const _;
1178 #[doc = r"Return the pointer to the register block"]
1179 #[inline(always)]
1180 pub const fn ptr() -> *const lpuart1::RegisterBlock {
1181 Self::PTR
1182 }
1183}
1184impl Deref for LPUART1 {
1185 type Target = lpuart1::RegisterBlock;
1186 #[inline(always)]
1187 fn deref(&self) -> &Self::Target {
1188 unsafe { &*Self::PTR }
1189 }
1190}
1191impl core::fmt::Debug for LPUART1 {
1192 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1193 f.debug_struct("LPUART1").finish()
1194 }
1195}
1196#[doc = "Universal Asynchronous Receiver/Transmitter"]
1197pub mod lpuart1;
1198#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1199pub struct CMP0 {
1200 _marker: PhantomData<*const ()>,
1201}
1202unsafe impl Send for CMP0 {}
1203impl CMP0 {
1204 #[doc = r"Pointer to the register block"]
1205 pub const PTR: *const cmp0::RegisterBlock = 0x4007_3000 as *const _;
1206 #[doc = r"Return the pointer to the register block"]
1207 #[inline(always)]
1208 pub const fn ptr() -> *const cmp0::RegisterBlock {
1209 Self::PTR
1210 }
1211}
1212impl Deref for CMP0 {
1213 type Target = cmp0::RegisterBlock;
1214 #[inline(always)]
1215 fn deref(&self) -> &Self::Target {
1216 unsafe { &*Self::PTR }
1217 }
1218}
1219impl core::fmt::Debug for CMP0 {
1220 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1221 f.debug_struct("CMP0").finish()
1222 }
1223}
1224#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
1225pub mod cmp0;
1226#[doc = "PMC"]
1227pub struct PMC {
1228 _marker: PhantomData<*const ()>,
1229}
1230unsafe impl Send for PMC {}
1231impl PMC {
1232 #[doc = r"Pointer to the register block"]
1233 pub const PTR: *const pmc::RegisterBlock = 0x4007_d000 as *const _;
1234 #[doc = r"Return the pointer to the register block"]
1235 #[inline(always)]
1236 pub const fn ptr() -> *const pmc::RegisterBlock {
1237 Self::PTR
1238 }
1239}
1240impl Deref for PMC {
1241 type Target = pmc::RegisterBlock;
1242 #[inline(always)]
1243 fn deref(&self) -> &Self::Target {
1244 unsafe { &*Self::PTR }
1245 }
1246}
1247impl core::fmt::Debug for PMC {
1248 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1249 f.debug_struct("PMC").finish()
1250 }
1251}
1252#[doc = "PMC"]
1253pub mod pmc;
1254#[doc = "System Mode Controller"]
1255pub struct SMC {
1256 _marker: PhantomData<*const ()>,
1257}
1258unsafe impl Send for SMC {}
1259impl SMC {
1260 #[doc = r"Pointer to the register block"]
1261 pub const PTR: *const smc::RegisterBlock = 0x4007_e000 as *const _;
1262 #[doc = r"Return the pointer to the register block"]
1263 #[inline(always)]
1264 pub const fn ptr() -> *const smc::RegisterBlock {
1265 Self::PTR
1266 }
1267}
1268impl Deref for SMC {
1269 type Target = smc::RegisterBlock;
1270 #[inline(always)]
1271 fn deref(&self) -> &Self::Target {
1272 unsafe { &*Self::PTR }
1273 }
1274}
1275impl core::fmt::Debug for SMC {
1276 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1277 f.debug_struct("SMC").finish()
1278 }
1279}
1280#[doc = "System Mode Controller"]
1281pub mod smc;
1282#[doc = "Reset Control Module"]
1283pub struct RCM {
1284 _marker: PhantomData<*const ()>,
1285}
1286unsafe impl Send for RCM {}
1287impl RCM {
1288 #[doc = r"Pointer to the register block"]
1289 pub const PTR: *const rcm::RegisterBlock = 0x4007_f000 as *const _;
1290 #[doc = r"Return the pointer to the register block"]
1291 #[inline(always)]
1292 pub const fn ptr() -> *const rcm::RegisterBlock {
1293 Self::PTR
1294 }
1295}
1296impl Deref for RCM {
1297 type Target = rcm::RegisterBlock;
1298 #[inline(always)]
1299 fn deref(&self) -> &Self::Target {
1300 unsafe { &*Self::PTR }
1301 }
1302}
1303impl core::fmt::Debug for RCM {
1304 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1305 f.debug_struct("RCM").finish()
1306 }
1307}
1308#[doc = "Reset Control Module"]
1309pub mod rcm;
1310#[doc = "General Purpose Input/Output"]
1311pub struct PTA {
1312 _marker: PhantomData<*const ()>,
1313}
1314unsafe impl Send for PTA {}
1315impl PTA {
1316 #[doc = r"Pointer to the register block"]
1317 pub const PTR: *const pta::RegisterBlock = 0x400f_f000 as *const _;
1318 #[doc = r"Return the pointer to the register block"]
1319 #[inline(always)]
1320 pub const fn ptr() -> *const pta::RegisterBlock {
1321 Self::PTR
1322 }
1323}
1324impl Deref for PTA {
1325 type Target = pta::RegisterBlock;
1326 #[inline(always)]
1327 fn deref(&self) -> &Self::Target {
1328 unsafe { &*Self::PTR }
1329 }
1330}
1331impl core::fmt::Debug for PTA {
1332 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1333 f.debug_struct("PTA").finish()
1334 }
1335}
1336#[doc = "General Purpose Input/Output"]
1337pub mod pta;
1338#[doc = "General Purpose Input/Output"]
1339pub struct PTB {
1340 _marker: PhantomData<*const ()>,
1341}
1342unsafe impl Send for PTB {}
1343impl PTB {
1344 #[doc = r"Pointer to the register block"]
1345 pub const PTR: *const ptb::RegisterBlock = 0x400f_f040 as *const _;
1346 #[doc = r"Return the pointer to the register block"]
1347 #[inline(always)]
1348 pub const fn ptr() -> *const ptb::RegisterBlock {
1349 Self::PTR
1350 }
1351}
1352impl Deref for PTB {
1353 type Target = ptb::RegisterBlock;
1354 #[inline(always)]
1355 fn deref(&self) -> &Self::Target {
1356 unsafe { &*Self::PTR }
1357 }
1358}
1359impl core::fmt::Debug for PTB {
1360 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1361 f.debug_struct("PTB").finish()
1362 }
1363}
1364#[doc = "General Purpose Input/Output"]
1365pub mod ptb;
1366#[doc = "General Purpose Input/Output"]
1367pub struct PTC {
1368 _marker: PhantomData<*const ()>,
1369}
1370unsafe impl Send for PTC {}
1371impl PTC {
1372 #[doc = r"Pointer to the register block"]
1373 pub const PTR: *const ptc::RegisterBlock = 0x400f_f080 as *const _;
1374 #[doc = r"Return the pointer to the register block"]
1375 #[inline(always)]
1376 pub const fn ptr() -> *const ptc::RegisterBlock {
1377 Self::PTR
1378 }
1379}
1380impl Deref for PTC {
1381 type Target = ptc::RegisterBlock;
1382 #[inline(always)]
1383 fn deref(&self) -> &Self::Target {
1384 unsafe { &*Self::PTR }
1385 }
1386}
1387impl core::fmt::Debug for PTC {
1388 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1389 f.debug_struct("PTC").finish()
1390 }
1391}
1392#[doc = "General Purpose Input/Output"]
1393pub mod ptc;
1394#[doc = "General Purpose Input/Output"]
1395pub struct PTD {
1396 _marker: PhantomData<*const ()>,
1397}
1398unsafe impl Send for PTD {}
1399impl PTD {
1400 #[doc = r"Pointer to the register block"]
1401 pub const PTR: *const ptd::RegisterBlock = 0x400f_f0c0 as *const _;
1402 #[doc = r"Return the pointer to the register block"]
1403 #[inline(always)]
1404 pub const fn ptr() -> *const ptd::RegisterBlock {
1405 Self::PTR
1406 }
1407}
1408impl Deref for PTD {
1409 type Target = ptd::RegisterBlock;
1410 #[inline(always)]
1411 fn deref(&self) -> &Self::Target {
1412 unsafe { &*Self::PTR }
1413 }
1414}
1415impl core::fmt::Debug for PTD {
1416 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1417 f.debug_struct("PTD").finish()
1418 }
1419}
1420#[doc = "General Purpose Input/Output"]
1421pub mod ptd;
1422#[doc = "General Purpose Input/Output"]
1423pub struct PTE {
1424 _marker: PhantomData<*const ()>,
1425}
1426unsafe impl Send for PTE {}
1427impl PTE {
1428 #[doc = r"Pointer to the register block"]
1429 pub const PTR: *const pte::RegisterBlock = 0x400f_f100 as *const _;
1430 #[doc = r"Return the pointer to the register block"]
1431 #[inline(always)]
1432 pub const fn ptr() -> *const pte::RegisterBlock {
1433 Self::PTR
1434 }
1435}
1436impl Deref for PTE {
1437 type Target = pte::RegisterBlock;
1438 #[inline(always)]
1439 fn deref(&self) -> &Self::Target {
1440 unsafe { &*Self::PTR }
1441 }
1442}
1443impl core::fmt::Debug for PTE {
1444 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1445 f.debug_struct("PTE").finish()
1446 }
1447}
1448#[doc = "General Purpose Input/Output"]
1449pub mod pte;
1450#[doc = "System Control Registers"]
1451pub struct S32_SCB {
1452 _marker: PhantomData<*const ()>,
1453}
1454unsafe impl Send for S32_SCB {}
1455impl S32_SCB {
1456 #[doc = r"Pointer to the register block"]
1457 pub const PTR: *const s32_scb::RegisterBlock = 0xe000_e000 as *const _;
1458 #[doc = r"Return the pointer to the register block"]
1459 #[inline(always)]
1460 pub const fn ptr() -> *const s32_scb::RegisterBlock {
1461 Self::PTR
1462 }
1463}
1464impl Deref for S32_SCB {
1465 type Target = s32_scb::RegisterBlock;
1466 #[inline(always)]
1467 fn deref(&self) -> &Self::Target {
1468 unsafe { &*Self::PTR }
1469 }
1470}
1471impl core::fmt::Debug for S32_SCB {
1472 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1473 f.debug_struct("S32_SCB").finish()
1474 }
1475}
1476#[doc = "System Control Registers"]
1477pub mod s32_scb;
1478#[doc = "System timer"]
1479pub struct S32_SYSTICK {
1480 _marker: PhantomData<*const ()>,
1481}
1482unsafe impl Send for S32_SYSTICK {}
1483impl S32_SYSTICK {
1484 #[doc = r"Pointer to the register block"]
1485 pub const PTR: *const s32_sys_tick::RegisterBlock = 0xe000_e010 as *const _;
1486 #[doc = r"Return the pointer to the register block"]
1487 #[inline(always)]
1488 pub const fn ptr() -> *const s32_sys_tick::RegisterBlock {
1489 Self::PTR
1490 }
1491}
1492impl Deref for S32_SYSTICK {
1493 type Target = s32_sys_tick::RegisterBlock;
1494 #[inline(always)]
1495 fn deref(&self) -> &Self::Target {
1496 unsafe { &*Self::PTR }
1497 }
1498}
1499impl core::fmt::Debug for S32_SYSTICK {
1500 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1501 f.debug_struct("S32_SYSTICK").finish()
1502 }
1503}
1504#[doc = "System timer"]
1505pub mod s32_sys_tick;
1506#[doc = "Nested Vectored Interrupt Controller"]
1507pub struct S32_NVIC {
1508 _marker: PhantomData<*const ()>,
1509}
1510unsafe impl Send for S32_NVIC {}
1511impl S32_NVIC {
1512 #[doc = r"Pointer to the register block"]
1513 pub const PTR: *const s32_nvic::RegisterBlock = 0xe000_e100 as *const _;
1514 #[doc = r"Return the pointer to the register block"]
1515 #[inline(always)]
1516 pub const fn ptr() -> *const s32_nvic::RegisterBlock {
1517 Self::PTR
1518 }
1519}
1520impl Deref for S32_NVIC {
1521 type Target = s32_nvic::RegisterBlock;
1522 #[inline(always)]
1523 fn deref(&self) -> &Self::Target {
1524 unsafe { &*Self::PTR }
1525 }
1526}
1527impl core::fmt::Debug for S32_NVIC {
1528 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1529 f.debug_struct("S32_NVIC").finish()
1530 }
1531}
1532#[doc = "Nested Vectored Interrupt Controller"]
1533pub mod s32_nvic;
1534#[doc = "Local Memory Controller"]
1535pub struct LMEM {
1536 _marker: PhantomData<*const ()>,
1537}
1538unsafe impl Send for LMEM {}
1539impl LMEM {
1540 #[doc = r"Pointer to the register block"]
1541 pub const PTR: *const lmem::RegisterBlock = 0xe008_2000 as *const _;
1542 #[doc = r"Return the pointer to the register block"]
1543 #[inline(always)]
1544 pub const fn ptr() -> *const lmem::RegisterBlock {
1545 Self::PTR
1546 }
1547}
1548impl Deref for LMEM {
1549 type Target = lmem::RegisterBlock;
1550 #[inline(always)]
1551 fn deref(&self) -> &Self::Target {
1552 unsafe { &*Self::PTR }
1553 }
1554}
1555impl core::fmt::Debug for LMEM {
1556 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1557 f.debug_struct("LMEM").finish()
1558 }
1559}
1560#[doc = "Local Memory Controller"]
1561pub mod lmem;
1562#[doc = "MTB data watchpoint and trace"]
1563pub struct MTB_DWT {
1564 _marker: PhantomData<*const ()>,
1565}
1566unsafe impl Send for MTB_DWT {}
1567impl MTB_DWT {
1568 #[doc = r"Pointer to the register block"]
1569 pub const PTR: *const mtb_dwt::RegisterBlock = 0xf000_1000 as *const _;
1570 #[doc = r"Return the pointer to the register block"]
1571 #[inline(always)]
1572 pub const fn ptr() -> *const mtb_dwt::RegisterBlock {
1573 Self::PTR
1574 }
1575}
1576impl Deref for MTB_DWT {
1577 type Target = mtb_dwt::RegisterBlock;
1578 #[inline(always)]
1579 fn deref(&self) -> &Self::Target {
1580 unsafe { &*Self::PTR }
1581 }
1582}
1583impl core::fmt::Debug for MTB_DWT {
1584 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1585 f.debug_struct("MTB_DWT").finish()
1586 }
1587}
1588#[doc = "MTB data watchpoint and trace"]
1589pub mod mtb_dwt;
1590#[doc = "Core Platform Miscellaneous Control Module"]
1591pub struct MCM {
1592 _marker: PhantomData<*const ()>,
1593}
1594unsafe impl Send for MCM {}
1595impl MCM {
1596 #[doc = r"Pointer to the register block"]
1597 pub const PTR: *const mcm::RegisterBlock = 0xf000_3000 as *const _;
1598 #[doc = r"Return the pointer to the register block"]
1599 #[inline(always)]
1600 pub const fn ptr() -> *const mcm::RegisterBlock {
1601 Self::PTR
1602 }
1603}
1604impl Deref for MCM {
1605 type Target = mcm::RegisterBlock;
1606 #[inline(always)]
1607 fn deref(&self) -> &Self::Target {
1608 unsafe { &*Self::PTR }
1609 }
1610}
1611impl core::fmt::Debug for MCM {
1612 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1613 f.debug_struct("MCM").finish()
1614 }
1615}
1616#[doc = "Core Platform Miscellaneous Control Module"]
1617pub mod mcm;
1618#[no_mangle]
1619static mut DEVICE_PERIPHERALS: bool = false;
1620#[doc = r"All the peripherals"]
1621#[allow(non_snake_case)]
1622pub struct Peripherals {
1623 #[doc = "CSE_PRAM"]
1624 pub CSE_PRAM: CSE_PRAM,
1625 #[doc = "AIPS"]
1626 pub AIPS: AIPS,
1627 #[doc = "MSCM"]
1628 pub MSCM: MSCM,
1629 #[doc = "DMA"]
1630 pub DMA: DMA,
1631 #[doc = "ERM"]
1632 pub ERM: ERM,
1633 #[doc = "EIM"]
1634 pub EIM: EIM,
1635 #[doc = "FTFC"]
1636 pub FTFC: FTFC,
1637 #[doc = "DMAMUX"]
1638 pub DMAMUX: DMAMUX,
1639 #[doc = "CAN0"]
1640 pub CAN0: CAN0,
1641 #[doc = "LPSPI0"]
1642 pub LPSPI0: LPSPI0,
1643 #[doc = "LPSPI1"]
1644 pub LPSPI1: LPSPI1,
1645 #[doc = "CRC"]
1646 pub CRC: CRC,
1647 #[doc = "PDB0"]
1648 pub PDB0: PDB0,
1649 #[doc = "LPIT0"]
1650 pub LPIT0: LPIT0,
1651 #[doc = "FTM0"]
1652 pub FTM0: FTM0,
1653 #[doc = "FTM1"]
1654 pub FTM1: FTM1,
1655 #[doc = "ADC0"]
1656 pub ADC0: ADC0,
1657 #[doc = "RTC"]
1658 pub RTC: RTC,
1659 #[doc = "CMU_FC_0"]
1660 pub CMU_FC_0: CMU_FC_0,
1661 #[doc = "CMU_FC_1"]
1662 pub CMU_FC_1: CMU_FC_1,
1663 #[doc = "LPTMR0"]
1664 pub LPTMR0: LPTMR0,
1665 #[doc = "SIM"]
1666 pub SIM: SIM,
1667 #[doc = "PORTA"]
1668 pub PORTA: PORTA,
1669 #[doc = "PORTB"]
1670 pub PORTB: PORTB,
1671 #[doc = "PORTC"]
1672 pub PORTC: PORTC,
1673 #[doc = "PORTD"]
1674 pub PORTD: PORTD,
1675 #[doc = "PORTE"]
1676 pub PORTE: PORTE,
1677 #[doc = "WDOG"]
1678 pub WDOG: WDOG,
1679 #[doc = "FLEXIO"]
1680 pub FLEXIO: FLEXIO,
1681 #[doc = "TRGMUX"]
1682 pub TRGMUX: TRGMUX,
1683 #[doc = "SCG"]
1684 pub SCG: SCG,
1685 #[doc = "PCC"]
1686 pub PCC: PCC,
1687 #[doc = "LPI2C0"]
1688 pub LPI2C0: LPI2C0,
1689 #[doc = "LPUART0"]
1690 pub LPUART0: LPUART0,
1691 #[doc = "LPUART1"]
1692 pub LPUART1: LPUART1,
1693 #[doc = "CMP0"]
1694 pub CMP0: CMP0,
1695 #[doc = "PMC"]
1696 pub PMC: PMC,
1697 #[doc = "SMC"]
1698 pub SMC: SMC,
1699 #[doc = "RCM"]
1700 pub RCM: RCM,
1701 #[doc = "PTA"]
1702 pub PTA: PTA,
1703 #[doc = "PTB"]
1704 pub PTB: PTB,
1705 #[doc = "PTC"]
1706 pub PTC: PTC,
1707 #[doc = "PTD"]
1708 pub PTD: PTD,
1709 #[doc = "PTE"]
1710 pub PTE: PTE,
1711 #[doc = "S32_SCB"]
1712 pub S32_SCB: S32_SCB,
1713 #[doc = "S32_SYSTICK"]
1714 pub S32_SYSTICK: S32_SYSTICK,
1715 #[doc = "S32_NVIC"]
1716 pub S32_NVIC: S32_NVIC,
1717 #[doc = "LMEM"]
1718 pub LMEM: LMEM,
1719 #[doc = "MTB_DWT"]
1720 pub MTB_DWT: MTB_DWT,
1721 #[doc = "MCM"]
1722 pub MCM: MCM,
1723}
1724impl Peripherals {
1725 #[doc = r"Returns all the peripherals *once*"]
1726 #[inline]
1727 pub fn take() -> Option<Self> {
1728 cortex_m::interrupt::free(|_| {
1729 if unsafe { DEVICE_PERIPHERALS } {
1730 None
1731 } else {
1732 Some(unsafe { Peripherals::steal() })
1733 }
1734 })
1735 }
1736 #[doc = r"Unchecked version of `Peripherals::take`"]
1737 #[inline]
1738 pub unsafe fn steal() -> Self {
1739 DEVICE_PERIPHERALS = true;
1740 Peripherals {
1741 CSE_PRAM: CSE_PRAM {
1742 _marker: PhantomData,
1743 },
1744 AIPS: AIPS {
1745 _marker: PhantomData,
1746 },
1747 MSCM: MSCM {
1748 _marker: PhantomData,
1749 },
1750 DMA: DMA {
1751 _marker: PhantomData,
1752 },
1753 ERM: ERM {
1754 _marker: PhantomData,
1755 },
1756 EIM: EIM {
1757 _marker: PhantomData,
1758 },
1759 FTFC: FTFC {
1760 _marker: PhantomData,
1761 },
1762 DMAMUX: DMAMUX {
1763 _marker: PhantomData,
1764 },
1765 CAN0: CAN0 {
1766 _marker: PhantomData,
1767 },
1768 LPSPI0: LPSPI0 {
1769 _marker: PhantomData,
1770 },
1771 LPSPI1: LPSPI1 {
1772 _marker: PhantomData,
1773 },
1774 CRC: CRC {
1775 _marker: PhantomData,
1776 },
1777 PDB0: PDB0 {
1778 _marker: PhantomData,
1779 },
1780 LPIT0: LPIT0 {
1781 _marker: PhantomData,
1782 },
1783 FTM0: FTM0 {
1784 _marker: PhantomData,
1785 },
1786 FTM1: FTM1 {
1787 _marker: PhantomData,
1788 },
1789 ADC0: ADC0 {
1790 _marker: PhantomData,
1791 },
1792 RTC: RTC {
1793 _marker: PhantomData,
1794 },
1795 CMU_FC_0: CMU_FC_0 {
1796 _marker: PhantomData,
1797 },
1798 CMU_FC_1: CMU_FC_1 {
1799 _marker: PhantomData,
1800 },
1801 LPTMR0: LPTMR0 {
1802 _marker: PhantomData,
1803 },
1804 SIM: SIM {
1805 _marker: PhantomData,
1806 },
1807 PORTA: PORTA {
1808 _marker: PhantomData,
1809 },
1810 PORTB: PORTB {
1811 _marker: PhantomData,
1812 },
1813 PORTC: PORTC {
1814 _marker: PhantomData,
1815 },
1816 PORTD: PORTD {
1817 _marker: PhantomData,
1818 },
1819 PORTE: PORTE {
1820 _marker: PhantomData,
1821 },
1822 WDOG: WDOG {
1823 _marker: PhantomData,
1824 },
1825 FLEXIO: FLEXIO {
1826 _marker: PhantomData,
1827 },
1828 TRGMUX: TRGMUX {
1829 _marker: PhantomData,
1830 },
1831 SCG: SCG {
1832 _marker: PhantomData,
1833 },
1834 PCC: PCC {
1835 _marker: PhantomData,
1836 },
1837 LPI2C0: LPI2C0 {
1838 _marker: PhantomData,
1839 },
1840 LPUART0: LPUART0 {
1841 _marker: PhantomData,
1842 },
1843 LPUART1: LPUART1 {
1844 _marker: PhantomData,
1845 },
1846 CMP0: CMP0 {
1847 _marker: PhantomData,
1848 },
1849 PMC: PMC {
1850 _marker: PhantomData,
1851 },
1852 SMC: SMC {
1853 _marker: PhantomData,
1854 },
1855 RCM: RCM {
1856 _marker: PhantomData,
1857 },
1858 PTA: PTA {
1859 _marker: PhantomData,
1860 },
1861 PTB: PTB {
1862 _marker: PhantomData,
1863 },
1864 PTC: PTC {
1865 _marker: PhantomData,
1866 },
1867 PTD: PTD {
1868 _marker: PhantomData,
1869 },
1870 PTE: PTE {
1871 _marker: PhantomData,
1872 },
1873 S32_SCB: S32_SCB {
1874 _marker: PhantomData,
1875 },
1876 S32_SYSTICK: S32_SYSTICK {
1877 _marker: PhantomData,
1878 },
1879 S32_NVIC: S32_NVIC {
1880 _marker: PhantomData,
1881 },
1882 LMEM: LMEM {
1883 _marker: PhantomData,
1884 },
1885 MTB_DWT: MTB_DWT {
1886 _marker: PhantomData,
1887 },
1888 MCM: MCM {
1889 _marker: PhantomData,
1890 },
1891 }
1892 }
1893}