s32k116_pac/rtc/
lr.rs

1#[doc = "Register `LR` reader"]
2pub struct R(crate::R<LR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LR` writer"]
17pub struct W(crate::W<LR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Time Compensation Lock\n\nValue on reset: 1"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum TCL_A {
40    #[doc = "0: Time Compensation Register is locked and writes are ignored."]
41    _0 = 0,
42    #[doc = "1: Time Compensation Register is not locked and writes complete as normal."]
43    _1 = 1,
44}
45impl From<TCL_A> for bool {
46    #[inline(always)]
47    fn from(variant: TCL_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `TCL` reader - Time Compensation Lock"]
52pub struct TCL_R(crate::FieldReader<bool, TCL_A>);
53impl TCL_R {
54    #[inline(always)]
55    pub(crate) fn new(bits: bool) -> Self {
56        TCL_R(crate::FieldReader::new(bits))
57    }
58    #[doc = r"Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> TCL_A {
61        match self.bits {
62            false => TCL_A::_0,
63            true => TCL_A::_1,
64        }
65    }
66    #[doc = "Checks if the value of the field is `_0`"]
67    #[inline(always)]
68    pub fn is_0(&self) -> bool {
69        **self == TCL_A::_0
70    }
71    #[doc = "Checks if the value of the field is `_1`"]
72    #[inline(always)]
73    pub fn is_1(&self) -> bool {
74        **self == TCL_A::_1
75    }
76}
77impl core::ops::Deref for TCL_R {
78    type Target = crate::FieldReader<bool, TCL_A>;
79    #[inline(always)]
80    fn deref(&self) -> &Self::Target {
81        &self.0
82    }
83}
84#[doc = "Field `TCL` writer - Time Compensation Lock"]
85pub struct TCL_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> TCL_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: TCL_A) -> &'a mut W {
92        self.bit(variant.into())
93    }
94    #[doc = "Time Compensation Register is locked and writes are ignored."]
95    #[inline(always)]
96    pub fn _0(self) -> &'a mut W {
97        self.variant(TCL_A::_0)
98    }
99    #[doc = "Time Compensation Register is not locked and writes complete as normal."]
100    #[inline(always)]
101    pub fn _1(self) -> &'a mut W {
102        self.variant(TCL_A::_1)
103    }
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
118        self.w
119    }
120}
121#[doc = "Control Register Lock\n\nValue on reset: 1"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum CRL_A {
124    #[doc = "0: Control Register is locked and writes are ignored."]
125    _0 = 0,
126    #[doc = "1: Control Register is not locked and writes complete as normal."]
127    _1 = 1,
128}
129impl From<CRL_A> for bool {
130    #[inline(always)]
131    fn from(variant: CRL_A) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `CRL` reader - Control Register Lock"]
136pub struct CRL_R(crate::FieldReader<bool, CRL_A>);
137impl CRL_R {
138    #[inline(always)]
139    pub(crate) fn new(bits: bool) -> Self {
140        CRL_R(crate::FieldReader::new(bits))
141    }
142    #[doc = r"Get enumerated values variant"]
143    #[inline(always)]
144    pub fn variant(&self) -> CRL_A {
145        match self.bits {
146            false => CRL_A::_0,
147            true => CRL_A::_1,
148        }
149    }
150    #[doc = "Checks if the value of the field is `_0`"]
151    #[inline(always)]
152    pub fn is_0(&self) -> bool {
153        **self == CRL_A::_0
154    }
155    #[doc = "Checks if the value of the field is `_1`"]
156    #[inline(always)]
157    pub fn is_1(&self) -> bool {
158        **self == CRL_A::_1
159    }
160}
161impl core::ops::Deref for CRL_R {
162    type Target = crate::FieldReader<bool, CRL_A>;
163    #[inline(always)]
164    fn deref(&self) -> &Self::Target {
165        &self.0
166    }
167}
168#[doc = "Field `CRL` writer - Control Register Lock"]
169pub struct CRL_W<'a> {
170    w: &'a mut W,
171}
172impl<'a> CRL_W<'a> {
173    #[doc = r"Writes `variant` to the field"]
174    #[inline(always)]
175    pub fn variant(self, variant: CRL_A) -> &'a mut W {
176        self.bit(variant.into())
177    }
178    #[doc = "Control Register is locked and writes are ignored."]
179    #[inline(always)]
180    pub fn _0(self) -> &'a mut W {
181        self.variant(CRL_A::_0)
182    }
183    #[doc = "Control Register is not locked and writes complete as normal."]
184    #[inline(always)]
185    pub fn _1(self) -> &'a mut W {
186        self.variant(CRL_A::_1)
187    }
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
202        self.w
203    }
204}
205#[doc = "Status Register Lock\n\nValue on reset: 1"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum SRL_A {
208    #[doc = "0: Status Register is locked and writes are ignored."]
209    _0 = 0,
210    #[doc = "1: Status Register is not locked and writes complete as normal."]
211    _1 = 1,
212}
213impl From<SRL_A> for bool {
214    #[inline(always)]
215    fn from(variant: SRL_A) -> Self {
216        variant as u8 != 0
217    }
218}
219#[doc = "Field `SRL` reader - Status Register Lock"]
220pub struct SRL_R(crate::FieldReader<bool, SRL_A>);
221impl SRL_R {
222    #[inline(always)]
223    pub(crate) fn new(bits: bool) -> Self {
224        SRL_R(crate::FieldReader::new(bits))
225    }
226    #[doc = r"Get enumerated values variant"]
227    #[inline(always)]
228    pub fn variant(&self) -> SRL_A {
229        match self.bits {
230            false => SRL_A::_0,
231            true => SRL_A::_1,
232        }
233    }
234    #[doc = "Checks if the value of the field is `_0`"]
235    #[inline(always)]
236    pub fn is_0(&self) -> bool {
237        **self == SRL_A::_0
238    }
239    #[doc = "Checks if the value of the field is `_1`"]
240    #[inline(always)]
241    pub fn is_1(&self) -> bool {
242        **self == SRL_A::_1
243    }
244}
245impl core::ops::Deref for SRL_R {
246    type Target = crate::FieldReader<bool, SRL_A>;
247    #[inline(always)]
248    fn deref(&self) -> &Self::Target {
249        &self.0
250    }
251}
252#[doc = "Field `SRL` writer - Status Register Lock"]
253pub struct SRL_W<'a> {
254    w: &'a mut W,
255}
256impl<'a> SRL_W<'a> {
257    #[doc = r"Writes `variant` to the field"]
258    #[inline(always)]
259    pub fn variant(self, variant: SRL_A) -> &'a mut W {
260        self.bit(variant.into())
261    }
262    #[doc = "Status Register is locked and writes are ignored."]
263    #[inline(always)]
264    pub fn _0(self) -> &'a mut W {
265        self.variant(SRL_A::_0)
266    }
267    #[doc = "Status Register is not locked and writes complete as normal."]
268    #[inline(always)]
269    pub fn _1(self) -> &'a mut W {
270        self.variant(SRL_A::_1)
271    }
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
286        self.w
287    }
288}
289#[doc = "Lock Register Lock\n\nValue on reset: 1"]
290#[derive(Clone, Copy, Debug, PartialEq)]
291pub enum LRL_A {
292    #[doc = "0: Lock Register is locked and writes are ignored."]
293    _0 = 0,
294    #[doc = "1: Lock Register is not locked and writes complete as normal."]
295    _1 = 1,
296}
297impl From<LRL_A> for bool {
298    #[inline(always)]
299    fn from(variant: LRL_A) -> Self {
300        variant as u8 != 0
301    }
302}
303#[doc = "Field `LRL` reader - Lock Register Lock"]
304pub struct LRL_R(crate::FieldReader<bool, LRL_A>);
305impl LRL_R {
306    #[inline(always)]
307    pub(crate) fn new(bits: bool) -> Self {
308        LRL_R(crate::FieldReader::new(bits))
309    }
310    #[doc = r"Get enumerated values variant"]
311    #[inline(always)]
312    pub fn variant(&self) -> LRL_A {
313        match self.bits {
314            false => LRL_A::_0,
315            true => LRL_A::_1,
316        }
317    }
318    #[doc = "Checks if the value of the field is `_0`"]
319    #[inline(always)]
320    pub fn is_0(&self) -> bool {
321        **self == LRL_A::_0
322    }
323    #[doc = "Checks if the value of the field is `_1`"]
324    #[inline(always)]
325    pub fn is_1(&self) -> bool {
326        **self == LRL_A::_1
327    }
328}
329impl core::ops::Deref for LRL_R {
330    type Target = crate::FieldReader<bool, LRL_A>;
331    #[inline(always)]
332    fn deref(&self) -> &Self::Target {
333        &self.0
334    }
335}
336#[doc = "Field `LRL` writer - Lock Register Lock"]
337pub struct LRL_W<'a> {
338    w: &'a mut W,
339}
340impl<'a> LRL_W<'a> {
341    #[doc = r"Writes `variant` to the field"]
342    #[inline(always)]
343    pub fn variant(self, variant: LRL_A) -> &'a mut W {
344        self.bit(variant.into())
345    }
346    #[doc = "Lock Register is locked and writes are ignored."]
347    #[inline(always)]
348    pub fn _0(self) -> &'a mut W {
349        self.variant(LRL_A::_0)
350    }
351    #[doc = "Lock Register is not locked and writes complete as normal."]
352    #[inline(always)]
353    pub fn _1(self) -> &'a mut W {
354        self.variant(LRL_A::_1)
355    }
356    #[doc = r"Sets the field bit"]
357    #[inline(always)]
358    pub fn set_bit(self) -> &'a mut W {
359        self.bit(true)
360    }
361    #[doc = r"Clears the field bit"]
362    #[inline(always)]
363    pub fn clear_bit(self) -> &'a mut W {
364        self.bit(false)
365    }
366    #[doc = r"Writes raw bits to the field"]
367    #[inline(always)]
368    pub fn bit(self, value: bool) -> &'a mut W {
369        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
370        self.w
371    }
372}
373impl R {
374    #[doc = "Bit 3 - Time Compensation Lock"]
375    #[inline(always)]
376    pub fn tcl(&self) -> TCL_R {
377        TCL_R::new(((self.bits >> 3) & 0x01) != 0)
378    }
379    #[doc = "Bit 4 - Control Register Lock"]
380    #[inline(always)]
381    pub fn crl(&self) -> CRL_R {
382        CRL_R::new(((self.bits >> 4) & 0x01) != 0)
383    }
384    #[doc = "Bit 5 - Status Register Lock"]
385    #[inline(always)]
386    pub fn srl(&self) -> SRL_R {
387        SRL_R::new(((self.bits >> 5) & 0x01) != 0)
388    }
389    #[doc = "Bit 6 - Lock Register Lock"]
390    #[inline(always)]
391    pub fn lrl(&self) -> LRL_R {
392        LRL_R::new(((self.bits >> 6) & 0x01) != 0)
393    }
394}
395impl W {
396    #[doc = "Bit 3 - Time Compensation Lock"]
397    #[inline(always)]
398    pub fn tcl(&mut self) -> TCL_W {
399        TCL_W { w: self }
400    }
401    #[doc = "Bit 4 - Control Register Lock"]
402    #[inline(always)]
403    pub fn crl(&mut self) -> CRL_W {
404        CRL_W { w: self }
405    }
406    #[doc = "Bit 5 - Status Register Lock"]
407    #[inline(always)]
408    pub fn srl(&mut self) -> SRL_W {
409        SRL_W { w: self }
410    }
411    #[doc = "Bit 6 - Lock Register Lock"]
412    #[inline(always)]
413    pub fn lrl(&mut self) -> LRL_W {
414        LRL_W { w: self }
415    }
416    #[doc = "Writes raw bits to the register."]
417    #[inline(always)]
418    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
419        self.0.bits(bits);
420        self
421    }
422}
423#[doc = "RTC Lock Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lr](index.html) module"]
424pub struct LR_SPEC;
425impl crate::RegisterSpec for LR_SPEC {
426    type Ux = u32;
427}
428#[doc = "`read()` method returns [lr::R](R) reader structure"]
429impl crate::Readable for LR_SPEC {
430    type Reader = R;
431}
432#[doc = "`write(|w| ..)` method takes [lr::W](W) writer structure"]
433impl crate::Writable for LR_SPEC {
434    type Writer = W;
435}
436#[doc = "`reset()` method sets LR to value 0xff"]
437impl crate::Resettable for LR_SPEC {
438    #[inline(always)]
439    fn reset_value() -> Self::Ux {
440        0xff
441    }
442}