Module s2pac_ch32v103::tim2
source · Expand description
General purpose timer
Modules§
- auto-reload register
- capture/compare enable register
- capture/compare register 1
- capture/compare register 2
- capture/compare register 3
- capture/compare register 4
- capture/compare mode register 1 (input mode)
- capture/compare mode register 1 (output mode)
- capture/compare mode register 2 (input mode)
- capture/compare mode register 2 (output mode)
- counter
- control register 1
- control register 2
- DMA control register
- DMA/Interrupt enable register
- DMA address for full transfer
- status register
- prescaler
- slave mode control register
- event generation register
Structs§
- Register block
Type Aliases§
- ATRLR (rw) register accessor: auto-reload register
- CCER (rw) register accessor: capture/compare enable register
- CH1CVR (rw) register accessor: capture/compare register 1
- CH2CVR (rw) register accessor: capture/compare register 2
- CH3CVR (rw) register accessor: capture/compare register 3
- CH4CVR (rw) register accessor: capture/compare register 4
- CHCTLR1_Input (rw) register accessor: capture/compare mode register 1 (input mode)
- CHCTLR1_Output (rw) register accessor: capture/compare mode register 1 (output mode)
- CHCTLR2_Input (rw) register accessor: capture/compare mode register 2 (input mode)
- CHCTLR2_Output (rw) register accessor: capture/compare mode register 2 (output mode)
- CNT (rw) register accessor: counter
- CTLR1 (rw) register accessor: control register 1
- CTLR2 (rw) register accessor: control register 2
- DMACFGR (rw) register accessor: DMA control register
- DMAINTENR (rw) register accessor: DMA/Interrupt enable register
- DMAR (rw) register accessor: DMA address for full transfer
- INTFR (w) register accessor: status register
- PSC (rw) register accessor: prescaler
- SMCFGR (rw) register accessor: slave mode control register
- SWEVGR (w) register accessor: event generation register