[−][src]Struct rza1::vdc50::RegisterBlock
vdc5
only.Register block
Fields
inp_update: INP_UPDATE
vdc5
only.0x00 - INP_UPDATE
inp_sel_cnt: INP_SEL_CNT
vdc5
only.0x04 - INP_SEL_CNT
inp_ext_sync_cnt: INP_EXT_SYNC_CNT
vdc5
only.0x08 - INP_EXT_SYNC_CNT
inp_vsync_ph_adj: INP_VSYNC_PH_ADJ
vdc5
only.0x0c - INP_VSYNC_PH_ADJ
inp_dly_adj: INP_DLY_ADJ
vdc5
only.0x10 - INP_DLY_ADJ
imgcnt_update: IMGCNT_UPDATE
vdc5
only.0x80 - IMGCNT_UPDATE
imgcnt_nr_cnt0: IMGCNT_NR_CNT0
vdc5
only.0x84 - IMGCNT_NR_CNT0
imgcnt_nr_cnt1: IMGCNT_NR_CNT1
vdc5
only.0x88 - IMGCNT_NR_CNT1
imgcnt_mtx_mode: IMGCNT_MTX_MODE
vdc5
only.0xa0 - IMGCNT_MTX_MODE
imgcnt_mtx_yg_adj0: IMGCNT_MTX_YG_ADJ0
vdc5
only.0xa4 - IMGCNT_MTX_YG_ADJ0
imgcnt_mtx_yg_adj1: IMGCNT_MTX_YG_ADJ1
vdc5
only.0xa8 - IMGCNT_MTX_YG_ADJ1
imgcnt_mtx_cbb_adj0: IMGCNT_MTX_CBB_ADJ0
vdc5
only.0xac - IMGCNT_MTX_CBB_ADJ0
imgcnt_mtx_cbb_adj1: IMGCNT_MTX_CBB_ADJ1
vdc5
only.0xb0 - IMGCNT_MTX_CBB_ADJ1
imgcnt_mtx_crr_adj0: IMGCNT_MTX_CRR_ADJ0
vdc5
only.0xb4 - IMGCNT_MTX_CRR_ADJ0
imgcnt_mtx_crr_adj1: IMGCNT_MTX_CRR_ADJ1
vdc5
only.0xb8 - IMGCNT_MTX_CRR_ADJ1
imgcnt_drc_reg: IMGCNT_DRC_REG
vdc5
only.0xc0 - IMGCNT_DRC_REG
sc0_scl0_update: SC0_SCL0_UPDATE
vdc5
only.0x100 - SC0_SCL0_UPDATE
sc0_scl0_frc1: SC0_SCL0_FRC1
vdc5
only.0x104 - SC0_SCL0_FRC1
sc0_scl0_frc2: SC0_SCL0_FRC2
vdc5
only.0x108 - SC0_SCL0_FRC2
sc0_scl0_frc3: SC0_SCL0_FRC3
vdc5
only.0x10c - SC0_SCL0_FRC3
sc0_scl0_frc4: SC0_SCL0_FRC4
vdc5
only.0x110 - SC0_SCL0_FRC4
sc0_scl0_frc5: SC0_SCL0_FRC5
vdc5
only.0x114 - SC0_SCL0_FRC5
sc0_scl0_frc6: SC0_SCL0_FRC6
vdc5
only.0x118 - SC0_SCL0_FRC6
sc0_scl0_frc7: SC0_SCL0_FRC7
vdc5
only.0x11c - SC0_SCL0_FRC7
sc0_scl0_frc9: SC0_SCL0_FRC9
vdc5
only.0x124 - SC0_SCL0_FRC9
sc0_scl0_mon0: SC0_SCL0_MON0
vdc5
only.0x128 - SC0_SCL0_MON0
sc0_scl0_int: SC0_SCL0_INT
vdc5
only.0x12a - SC0_SCL0_INT
sc0_scl0_ds1: SC0_SCL0_DS1
vdc5
only.0x12c - SC0_SCL0_DS1
sc0_scl0_ds2: SC0_SCL0_DS2
vdc5
only.0x130 - SC0_SCL0_DS2
sc0_scl0_ds3: SC0_SCL0_DS3
vdc5
only.0x134 - SC0_SCL0_DS3
sc0_scl0_ds4: SC0_SCL0_DS4
vdc5
only.0x138 - SC0_SCL0_DS4
sc0_scl0_ds5: SC0_SCL0_DS5
vdc5
only.0x13c - SC0_SCL0_DS5
sc0_scl0_ds6: SC0_SCL0_DS6
vdc5
only.0x140 - SC0_SCL0_DS6
sc0_scl0_ds7: SC0_SCL0_DS7
vdc5
only.0x144 - SC0_SCL0_DS7
sc0_scl0_us1: SC0_SCL0_US1
vdc5
only.0x148 - SC0_SCL0_US1
sc0_scl0_us2: SC0_SCL0_US2
vdc5
only.0x14c - SC0_SCL0_US2
sc0_scl0_us3: SC0_SCL0_US3
vdc5
only.0x150 - SC0_SCL0_US3
sc0_scl0_us4: SC0_SCL0_US4
vdc5
only.0x154 - SC0_SCL0_US4
sc0_scl0_us5: SC0_SCL0_US5
vdc5
only.0x158 - SC0_SCL0_US5
sc0_scl0_us6: SC0_SCL0_US6
vdc5
only.0x15c - SC0_SCL0_US6
sc0_scl0_us7: SC0_SCL0_US7
vdc5
only.0x160 - SC0_SCL0_US7
sc0_scl0_us8: SC0_SCL0_US8
vdc5
only.0x164 - SC0_SCL0_US8
sc0_scl0_ovr1: SC0_SCL0_OVR1
vdc5
only.0x16c - SC0_SCL0_OVR1
sc0_scl1_update: SC0_SCL1_UPDATE
vdc5
only.0x180 - SC0_SCL1_UPDATE
sc0_scl1_wr1: SC0_SCL1_WR1
vdc5
only.0x188 - SC0_SCL1_WR1
sc0_scl1_wr2: SC0_SCL1_WR2
vdc5
only.0x18c - SC0_SCL1_WR2
sc0_scl1_wr3: SC0_SCL1_WR3
vdc5
only.0x190 - SC0_SCL1_WR3
sc0_scl1_wr4: SC0_SCL1_WR4
vdc5
only.0x194 - SC0_SCL1_WR4
sc0_scl1_wr5: SC0_SCL1_WR5
vdc5
only.0x19c - SC0_SCL1_WR5
sc0_scl1_wr6: SC0_SCL1_WR6
vdc5
only.0x1a0 - SC0_SCL1_WR6
sc0_scl1_wr7: SC0_SCL1_WR7
vdc5
only.0x1a4 - SC0_SCL1_WR7
sc0_scl1_wr8: SC0_SCL1_WR8
vdc5
only.0x1a8 - SC0_SCL1_WR8
sc0_scl1_wr9: SC0_SCL1_WR9
vdc5
only.0x1ac - SC0_SCL1_WR9
sc0_scl1_wr10: SC0_SCL1_WR10
vdc5
only.0x1b0 - SC0_SCL1_WR10
sc0_scl1_wr11: SC0_SCL1_WR11
vdc5
only.0x1b4 - SC0_SCL1_WR11
sc0_scl1_mon1: SC0_SCL1_MON1
vdc5
only.0x1b8 - SC0_SCL1_MON1
sc0_scl1_pbuf0: SC0_SCL1_PBUF0
vdc5
only.0x1bc - SC0_SCL1_PBUF0
sc0_scl1_pbuf1: SC0_SCL1_PBUF1
vdc5
only.0x1c0 - SC0_SCL1_PBUF1
sc0_scl1_pbuf2: SC0_SCL1_PBUF2
vdc5
only.0x1c4 - SC0_SCL1_PBUF2
sc0_scl1_pbuf3: SC0_SCL1_PBUF3
vdc5
only.0x1c8 - SC0_SCL1_PBUF3
sc0_scl1_pbuf_fld: SC0_SCL1_PBUF_FLD
vdc5
only.0x1cc - SC0_SCL1_PBUF_FLD
sc0_scl1_pbuf_cnt: SC0_SCL1_PBUF_CNT
vdc5
only.0x1d0 - SC0_SCL1_PBUF_CNT
gr0_update: GR0_UPDATE
vdc5
only.0x200 - GR0_UPDATE
gr0_flm_rd: GR0_FLM_RD
vdc5
only.0x204 - GR0_FLM_RD
gr0_flm1: GR0_FLM1
vdc5
only.0x208 - GR0_FLM1
gr0_flm2: GR0_FLM2
vdc5
only.0x20c - GR0_FLM2
gr0_flm3: GR0_FLM3
vdc5
only.0x210 - GR0_FLM3
gr0_flm4: GR0_FLM4
vdc5
only.0x214 - GR0_FLM4
gr0_flm5: GR0_FLM5
vdc5
only.0x218 - GR0_FLM5
gr0_flm6: GR0_FLM6
vdc5
only.0x21c - GR0_FLM6
gr0_ab1: GR0_AB1
vdc5
only.0x220 - GR0_AB1
gr0_ab2: GR0_AB2
vdc5
only.0x224 - GR0_AB2
gr0_ab3: GR0_AB3
vdc5
only.0x228 - GR0_AB3
gr0_ab7: GR0_AB7
vdc5
only.0x238 - GR0_AB7
gr0_ab8: GR0_AB8
vdc5
only.0x23c - GR0_AB8
gr0_ab9: GR0_AB9
vdc5
only.0x240 - GR0_AB9
gr0_ab10: GR0_AB10
vdc5
only.0x244 - GR0_AB10
gr0_ab11: GR0_AB11
vdc5
only.0x248 - GR0_AB11
gr0_base: GR0_BASE
vdc5
only.0x24c - GR0_BASE
gr0_clut: GR0_CLUT
vdc5
only.0x250 - GR0_CLUT
adj0_update: ADJ0_UPDATE
vdc5
only.0x280 - ADJ0_UPDATE
adj0_bkstr_set: ADJ0_BKSTR_SET
vdc5
only.0x284 - ADJ0_BKSTR_SET
adj0_enh_tim1: ADJ0_ENH_TIM1
vdc5
only.0x288 - ADJ0_ENH_TIM1
adj0_enh_tim2: ADJ0_ENH_TIM2
vdc5
only.0x28c - ADJ0_ENH_TIM2
adj0_enh_tim3: ADJ0_ENH_TIM3
vdc5
only.0x290 - ADJ0_ENH_TIM3
adj0_enh_shp1: ADJ0_ENH_SHP1
vdc5
only.0x294 - ADJ0_ENH_SHP1
adj0_enh_shp2: ADJ0_ENH_SHP2
vdc5
only.0x298 - ADJ0_ENH_SHP2
adj0_enh_shp3: ADJ0_ENH_SHP3
vdc5
only.0x29c - ADJ0_ENH_SHP3
adj0_enh_shp4: ADJ0_ENH_SHP4
vdc5
only.0x2a0 - ADJ0_ENH_SHP4
adj0_enh_shp5: ADJ0_ENH_SHP5
vdc5
only.0x2a4 - ADJ0_ENH_SHP5
adj0_enh_shp6: ADJ0_ENH_SHP6
vdc5
only.0x2a8 - ADJ0_ENH_SHP6
adj0_enh_lti1: ADJ0_ENH_LTI1
vdc5
only.0x2ac - ADJ0_ENH_LTI1
adj0_enh_lti2: ADJ0_ENH_LTI2
vdc5
only.0x2b0 - ADJ0_ENH_LTI2
adj0_mtx_mode: ADJ0_MTX_MODE
vdc5
only.0x2b4 - ADJ0_MTX_MODE
adj0_mtx_yg_adj0: ADJ0_MTX_YG_ADJ0
vdc5
only.0x2b8 - ADJ0_MTX_YG_ADJ0
adj0_mtx_yg_adj1: ADJ0_MTX_YG_ADJ1
vdc5
only.0x2bc - ADJ0_MTX_YG_ADJ1
adj0_mtx_cbb_adj0: ADJ0_MTX_CBB_ADJ0
vdc5
only.0x2c0 - ADJ0_MTX_CBB_ADJ0
adj0_mtx_cbb_adj1: ADJ0_MTX_CBB_ADJ1
vdc5
only.0x2c4 - ADJ0_MTX_CBB_ADJ1
adj0_mtx_crr_adj0: ADJ0_MTX_CRR_ADJ0
vdc5
only.0x2c8 - ADJ0_MTX_CRR_ADJ0
adj0_mtx_crr_adj1: ADJ0_MTX_CRR_ADJ1
vdc5
only.0x2cc - ADJ0_MTX_CRR_ADJ1
gr2_update: GR2_UPDATE
vdc5
only.0x300 - GR2_UPDATE
gr2_flm_rd: GR2_FLM_RD
vdc5
only.0x304 - GR2_FLM_RD
gr2_flm1: GR2_FLM1
vdc5
only.0x308 - GR2_FLM1
gr2_flm2: GR2_FLM2
vdc5
only.0x30c - GR2_FLM2
gr2_flm3: GR2_FLM3
vdc5
only.0x310 - GR2_FLM3
gr2_flm4: GR2_FLM4
vdc5
only.0x314 - GR2_FLM4
gr2_flm5: GR2_FLM5
vdc5
only.0x318 - GR2_FLM5
gr2_flm6: GR2_FLM6
vdc5
only.0x31c - GR2_FLM6
gr2_ab1: GR2_AB1
vdc5
only.0x320 - GR2_AB1
gr2_ab2: GR2_AB2
vdc5
only.0x324 - GR2_AB2
gr2_ab3: GR2_AB3
vdc5
only.0x328 - GR2_AB3
gr2_ab4: GR2_AB4
vdc5
only.0x32c - GR2_AB4
gr2_ab5: GR2_AB5
vdc5
only.0x330 - GR2_AB5
gr2_ab6: GR2_AB6
vdc5
only.0x334 - GR2_AB6
gr2_ab7: GR2_AB7
vdc5
only.0x338 - GR2_AB7
gr2_ab8: GR2_AB8
vdc5
only.0x33c - GR2_AB8
gr2_ab9: GR2_AB9
vdc5
only.0x340 - GR2_AB9
gr2_ab10: GR2_AB10
vdc5
only.0x344 - GR2_AB10
gr2_ab11: GR2_AB11
vdc5
only.0x348 - GR2_AB11
gr2_base: GR2_BASE
vdc5
only.0x34c - GR2_BASE
gr2_clut: GR2_CLUT
vdc5
only.0x350 - GR2_CLUT
gr2_mon: GR2_MON
vdc5
only.0x354 - GR2_MON
gr3_update: GR3_UPDATE
vdc5
only.0x380 - GR3_UPDATE
gr3_flm_rd: GR3_FLM_RD
vdc5
only.0x384 - GR3_FLM_RD
gr3_flm1: GR3_FLM1
vdc5
only.0x388 - GR3_FLM1
gr3_flm2: GR3_FLM2
vdc5
only.0x38c - GR3_FLM2
gr3_flm3: GR3_FLM3
vdc5
only.0x390 - GR3_FLM3
gr3_flm4: GR3_FLM4
vdc5
only.0x394 - GR3_FLM4
gr3_flm5: GR3_FLM5
vdc5
only.0x398 - GR3_FLM5
gr3_flm6: GR3_FLM6
vdc5
only.0x39c - GR3_FLM6
gr3_ab1: GR3_AB1
vdc5
only.0x3a0 - GR3_AB1
gr3_ab2: GR3_AB2
vdc5
only.0x3a4 - GR3_AB2
gr3_ab3: GR3_AB3
vdc5
only.0x3a8 - GR3_AB3
gr3_ab4: GR3_AB4
vdc5
only.0x3ac - GR3_AB4
gr3_ab5: GR3_AB5
vdc5
only.0x3b0 - GR3_AB5
gr3_ab6: GR3_AB6
vdc5
only.0x3b4 - GR3_AB6
gr3_ab7: GR3_AB7
vdc5
only.0x3b8 - GR3_AB7
gr3_ab8: GR3_AB8
vdc5
only.0x3bc - GR3_AB8
gr3_ab9: GR3_AB9
vdc5
only.0x3c0 - GR3_AB9
gr3_ab10: GR3_AB10
vdc5
only.0x3c4 - GR3_AB10
gr3_ab11: GR3_AB11
vdc5
only.0x3c8 - GR3_AB11
gr3_base: GR3_BASE
vdc5
only.0x3cc - GR3_BASE
gr3_clut_int: GR3_CLUT_INT
vdc5
only.0x3d0 - GR3_CLUT_INT
gr3_mon: GR3_MON
vdc5
only.0x3d4 - GR3_MON
gam_g_update: GAM_G_UPDATE
vdc5
only.0x400 - GAM_G_UPDATE
gam_sw: GAM_SW
vdc5
only.0x404 - GAM_SW
gam_g_lut1: GAM_G_LUT1
vdc5
only.0x408 - GAM_G_LUT1
gam_g_lut2: GAM_G_LUT2
vdc5
only.0x40c - GAM_G_LUT2
gam_g_lut3: GAM_G_LUT3
vdc5
only.0x410 - GAM_G_LUT3
gam_g_lut4: GAM_G_LUT4
vdc5
only.0x414 - GAM_G_LUT4
gam_g_lut5: GAM_G_LUT5
vdc5
only.0x418 - GAM_G_LUT5
gam_g_lut6: GAM_G_LUT6
vdc5
only.0x41c - GAM_G_LUT6
gam_g_lut7: GAM_G_LUT7
vdc5
only.0x420 - GAM_G_LUT7
gam_g_lut8: GAM_G_LUT8
vdc5
only.0x424 - GAM_G_LUT8
gam_g_lut9: GAM_G_LUT9
vdc5
only.0x428 - GAM_G_LUT9
gam_g_lut10: GAM_G_LUT10
vdc5
only.0x42c - GAM_G_LUT10
gam_g_lut11: GAM_G_LUT11
vdc5
only.0x430 - GAM_G_LUT11
gam_g_lut12: GAM_G_LUT12
vdc5
only.0x434 - GAM_G_LUT12
gam_g_lut13: GAM_G_LUT13
vdc5
only.0x438 - GAM_G_LUT13
gam_g_lut14: GAM_G_LUT14
vdc5
only.0x43c - GAM_G_LUT14
gam_g_lut15: GAM_G_LUT15
vdc5
only.0x440 - GAM_G_LUT15
gam_g_lut16: GAM_G_LUT16
vdc5
only.0x444 - GAM_G_LUT16
gam_g_area1: GAM_G_AREA1
vdc5
only.0x448 - GAM_G_AREA1
gam_g_area2: GAM_G_AREA2
vdc5
only.0x44c - GAM_G_AREA2
gam_g_area3: GAM_G_AREA3
vdc5
only.0x450 - GAM_G_AREA3
gam_g_area4: GAM_G_AREA4
vdc5
only.0x454 - GAM_G_AREA4
gam_g_area5: GAM_G_AREA5
vdc5
only.0x458 - GAM_G_AREA5
gam_g_area6: GAM_G_AREA6
vdc5
only.0x45c - GAM_G_AREA6
gam_g_area7: GAM_G_AREA7
vdc5
only.0x460 - GAM_G_AREA7
gam_g_area8: GAM_G_AREA8
vdc5
only.0x464 - GAM_G_AREA8
gam_b_update: GAM_B_UPDATE
vdc5
only.0x480 - GAM_B_UPDATE
gam_b_lut1: GAM_B_LUT1
vdc5
only.0x488 - GAM_B_LUT1
gam_b_lut2: GAM_B_LUT2
vdc5
only.0x48c - GAM_B_LUT2
gam_b_lut3: GAM_B_LUT3
vdc5
only.0x490 - GAM_B_LUT3
gam_b_lut4: GAM_B_LUT4
vdc5
only.0x494 - GAM_B_LUT4
gam_b_lut5: GAM_B_LUT5
vdc5
only.0x498 - GAM_B_LUT5
gam_b_lut6: GAM_B_LUT6
vdc5
only.0x49c - GAM_B_LUT6
gam_b_lut7: GAM_B_LUT7
vdc5
only.0x4a0 - GAM_B_LUT7
gam_b_lut8: GAM_B_LUT8
vdc5
only.0x4a4 - GAM_B_LUT8
gam_b_lut9: GAM_B_LUT9
vdc5
only.0x4a8 - GAM_B_LUT9
gam_b_lut10: GAM_B_LUT10
vdc5
only.0x4ac - GAM_B_LUT10
gam_b_lut11: GAM_B_LUT11
vdc5
only.0x4b0 - GAM_B_LUT11
gam_b_lut12: GAM_B_LUT12
vdc5
only.0x4b4 - GAM_B_LUT12
gam_b_lut13: GAM_B_LUT13
vdc5
only.0x4b8 - GAM_B_LUT13
gam_b_lut14: GAM_B_LUT14
vdc5
only.0x4bc - GAM_B_LUT14
gam_b_lut15: GAM_B_LUT15
vdc5
only.0x4c0 - GAM_B_LUT15
gam_b_lut16: GAM_B_LUT16
vdc5
only.0x4c4 - GAM_B_LUT16
gam_b_area1: GAM_B_AREA1
vdc5
only.0x4c8 - GAM_B_AREA1
gam_b_area2: GAM_B_AREA2
vdc5
only.0x4cc - GAM_B_AREA2
gam_b_area3: GAM_B_AREA3
vdc5
only.0x4d0 - GAM_B_AREA3
gam_b_area4: GAM_B_AREA4
vdc5
only.0x4d4 - GAM_B_AREA4
gam_b_area5: GAM_B_AREA5
vdc5
only.0x4d8 - GAM_B_AREA5
gam_b_area6: GAM_B_AREA6
vdc5
only.0x4dc - GAM_B_AREA6
gam_b_area7: GAM_B_AREA7
vdc5
only.0x4e0 - GAM_B_AREA7
gam_b_area8: GAM_B_AREA8
vdc5
only.0x4e4 - GAM_B_AREA8
gam_r_update: GAM_R_UPDATE
vdc5
only.0x500 - GAM_R_UPDATE
gam_r_lut1: GAM_R_LUT1
vdc5
only.0x508 - GAM_R_LUT1
gam_r_lut2: GAM_R_LUT2
vdc5
only.0x50c - GAM_R_LUT2
gam_r_lut3: GAM_R_LUT3
vdc5
only.0x510 - GAM_R_LUT3
gam_r_lut4: GAM_R_LUT4
vdc5
only.0x514 - GAM_R_LUT4
gam_r_lut5: GAM_R_LUT5
vdc5
only.0x518 - GAM_R_LUT5
gam_r_lut6: GAM_R_LUT6
vdc5
only.0x51c - GAM_R_LUT6
gam_r_lut7: GAM_R_LUT7
vdc5
only.0x520 - GAM_R_LUT7
gam_r_lut8: GAM_R_LUT8
vdc5
only.0x524 - GAM_R_LUT8
gam_r_lut9: GAM_R_LUT9
vdc5
only.0x528 - GAM_R_LUT9
gam_r_lut10: GAM_R_LUT10
vdc5
only.0x52c - GAM_R_LUT10
gam_r_lut11: GAM_R_LUT11
vdc5
only.0x530 - GAM_R_LUT11
gam_r_lut12: GAM_R_LUT12
vdc5
only.0x534 - GAM_R_LUT12
gam_r_lut13: GAM_R_LUT13
vdc5
only.0x538 - GAM_R_LUT13
gam_r_lut14: GAM_R_LUT14
vdc5
only.0x53c - GAM_R_LUT14
gam_r_lut15: GAM_R_LUT15
vdc5
only.0x540 - GAM_R_LUT15
gam_r_lut16: GAM_R_LUT16
vdc5
only.0x544 - GAM_R_LUT16
gam_r_area1: GAM_R_AREA1
vdc5
only.0x548 - GAM_R_AREA1
gam_r_area2: GAM_R_AREA2
vdc5
only.0x54c - GAM_R_AREA2
gam_r_area3: GAM_R_AREA3
vdc5
only.0x550 - GAM_R_AREA3
gam_r_area4: GAM_R_AREA4
vdc5
only.0x554 - GAM_R_AREA4
gam_r_area5: GAM_R_AREA5
vdc5
only.0x558 - GAM_R_AREA5
gam_r_area6: GAM_R_AREA6
vdc5
only.0x55c - GAM_R_AREA6
gam_r_area7: GAM_R_AREA7
vdc5
only.0x560 - GAM_R_AREA7
gam_r_area8: GAM_R_AREA8
vdc5
only.0x564 - GAM_R_AREA8
tcon_update: TCON_UPDATE
vdc5
only.0x580 - TCON_UPDATE
tcon_tim: TCON_TIM
vdc5
only.0x584 - TCON_TIM
tcon_tim_stva1: TCON_TIM_STVA1
vdc5
only.0x588 - TCON_TIM_STVA1
tcon_tim_stva2: TCON_TIM_STVA2
vdc5
only.0x58c - TCON_TIM_STVA2
tcon_tim_stvb1: TCON_TIM_STVB1
vdc5
only.0x590 - TCON_TIM_STVB1
tcon_tim_stvb2: TCON_TIM_STVB2
vdc5
only.0x594 - TCON_TIM_STVB2
tcon_tim_sth1: TCON_TIM_STH1
vdc5
only.0x598 - TCON_TIM_STH1
tcon_tim_sth2: TCON_TIM_STH2
vdc5
only.0x59c - TCON_TIM_STH2
tcon_tim_stb1: TCON_TIM_STB1
vdc5
only.0x5a0 - TCON_TIM_STB1
tcon_tim_stb2: TCON_TIM_STB2
vdc5
only.0x5a4 - TCON_TIM_STB2
tcon_tim_cpv1: TCON_TIM_CPV1
vdc5
only.0x5a8 - TCON_TIM_CPV1
tcon_tim_cpv2: TCON_TIM_CPV2
vdc5
only.0x5ac - TCON_TIM_CPV2
tcon_tim_pola1: TCON_TIM_POLA1
vdc5
only.0x5b0 - TCON_TIM_POLA1
tcon_tim_pola2: TCON_TIM_POLA2
vdc5
only.0x5b4 - TCON_TIM_POLA2
tcon_tim_polb1: TCON_TIM_POLB1
vdc5
only.0x5b8 - TCON_TIM_POLB1
tcon_tim_polb2: TCON_TIM_POLB2
vdc5
only.0x5bc - TCON_TIM_POLB2
tcon_tim_de: TCON_TIM_DE
vdc5
only.0x5c0 - TCON_TIM_DE
out_update: OUT_UPDATE
vdc5
only.0x600 - OUT_UPDATE
out_set: OUT_SET
vdc5
only.0x604 - OUT_SET
out_bright1: OUT_BRIGHT1
vdc5
only.0x608 - OUT_BRIGHT1
out_bright2: OUT_BRIGHT2
vdc5
only.0x60c - OUT_BRIGHT2
out_contrast: OUT_CONTRAST
vdc5
only.0x610 - OUT_CONTRAST
out_pdtha: OUT_PDTHA
vdc5
only.0x614 - OUT_PDTHA
out_clk_phase: OUT_CLK_PHASE
vdc5
only.0x624 - OUT_CLK_PHASE
syscnt_int1: SYSCNT_INT1
vdc5
only.0x680 - SYSCNT_INT1
syscnt_int2: SYSCNT_INT2
vdc5
only.0x684 - SYSCNT_INT2
syscnt_int3: SYSCNT_INT3
vdc5
only.0x688 - SYSCNT_INT3
syscnt_int4: SYSCNT_INT4
vdc5
only.0x68c - SYSCNT_INT4
syscnt_int5: SYSCNT_INT5
vdc5
only.0x690 - SYSCNT_INT5
syscnt_int6: SYSCNT_INT6
vdc5
only.0x694 - SYSCNT_INT6
syscnt_panel_clk: SYSCNT_PANEL_CLK
vdc5
only.0x698 - SYSCNT_PANEL_CLK
syscnt_clut: SYSCNT_CLUT
vdc5
only.0x69a - SYSCNT_CLUT
sc1_scl0_update: SC1_SCL0_UPDATE
vdc5
only.0x800 - SC1_SCL0_UPDATE
sc1_scl0_frc1: SC1_SCL0_FRC1
vdc5
only.0x804 - SC1_SCL0_FRC1
sc1_scl0_frc2: SC1_SCL0_FRC2
vdc5
only.0x808 - SC1_SCL0_FRC2
sc1_scl0_frc3: SC1_SCL0_FRC3
vdc5
only.0x80c - SC1_SCL0_FRC3
sc1_scl0_frc4: SC1_SCL0_FRC4
vdc5
only.0x810 - SC1_SCL0_FRC4
sc1_scl0_frc5: SC1_SCL0_FRC5
vdc5
only.0x814 - SC1_SCL0_FRC5
sc1_scl0_frc6: SC1_SCL0_FRC6
vdc5
only.0x818 - SC1_SCL0_FRC6
sc1_scl0_frc7: SC1_SCL0_FRC7
vdc5
only.0x81c - SC1_SCL0_FRC7
sc1_scl0_frc9: SC1_SCL0_FRC9
vdc5
only.0x824 - SC1_SCL0_FRC9
sc1_scl0_mon0: SC1_SCL0_MON0
vdc5
only.0x828 - SC1_SCL0_MON0
sc1_scl0_int: SC1_SCL0_INT
vdc5
only.0x82a - SC1_SCL0_INT
sc1_scl0_ds1: SC1_SCL0_DS1
vdc5
only.0x82c - SC1_SCL0_DS1
sc1_scl0_ds2: SC1_SCL0_DS2
vdc5
only.0x830 - SC1_SCL0_DS2
sc1_scl0_ds3: SC1_SCL0_DS3
vdc5
only.0x834 - SC1_SCL0_DS3
sc1_scl0_ds4: SC1_SCL0_DS4
vdc5
only.0x838 - SC1_SCL0_DS4
sc1_scl0_ds5: SC1_SCL0_DS5
vdc5
only.0x83c - SC1_SCL0_DS5
sc1_scl0_ds6: SC1_SCL0_DS6
vdc5
only.0x840 - SC1_SCL0_DS6
sc1_scl0_ds7: SC1_SCL0_DS7
vdc5
only.0x844 - SC1_SCL0_DS7
sc1_scl0_us1: SC1_SCL0_US1
vdc5
only.0x848 - SC1_SCL0_US1
sc1_scl0_us2: SC1_SCL0_US2
vdc5
only.0x84c - SC1_SCL0_US2
sc1_scl0_us3: SC1_SCL0_US3
vdc5
only.0x850 - SC1_SCL0_US3
sc1_scl0_us4: SC1_SCL0_US4
vdc5
only.0x854 - SC1_SCL0_US4
sc1_scl0_us5: SC1_SCL0_US5
vdc5
only.0x858 - SC1_SCL0_US5
sc1_scl0_us6: SC1_SCL0_US6
vdc5
only.0x85c - SC1_SCL0_US6
sc1_scl0_us7: SC1_SCL0_US7
vdc5
only.0x860 - SC1_SCL0_US7
sc1_scl0_us8: SC1_SCL0_US8
vdc5
only.0x864 - SC1_SCL0_US8
sc1_scl0_ovr1: SC1_SCL0_OVR1
vdc5
only.0x86c - SC1_SCL0_OVR1
sc1_scl1_update: SC1_SCL1_UPDATE
vdc5
only.0x880 - SC1_SCL1_UPDATE
sc1_scl1_wr1: SC1_SCL1_WR1
vdc5
only.0x888 - SC1_SCL1_WR1
sc1_scl1_wr2: SC1_SCL1_WR2
vdc5
only.0x88c - SC1_SCL1_WR2
sc1_scl1_wr3: SC1_SCL1_WR3
vdc5
only.0x890 - SC1_SCL1_WR3
sc1_scl1_wr4: SC1_SCL1_WR4
vdc5
only.0x894 - SC1_SCL1_WR4
sc1_scl1_wr5: SC1_SCL1_WR5
vdc5
only.0x89c - SC1_SCL1_WR5
sc1_scl1_wr6: SC1_SCL1_WR6
vdc5
only.0x8a0 - SC1_SCL1_WR6
sc1_scl1_wr7: SC1_SCL1_WR7
vdc5
only.0x8a4 - SC1_SCL1_WR7
sc1_scl1_wr8: SC1_SCL1_WR8
vdc5
only.0x8a8 - SC1_SCL1_WR8
sc1_scl1_wr9: SC1_SCL1_WR9
vdc5
only.0x8ac - SC1_SCL1_WR9
sc1_scl1_wr10: SC1_SCL1_WR10
vdc5
only.0x8b0 - SC1_SCL1_WR10
sc1_scl1_wr11: SC1_SCL1_WR11
vdc5
only.0x8b4 - SC1_SCL1_WR11
sc1_scl1_mon1: SC1_SCL1_MON1
vdc5
only.0x8b8 - SC1_SCL1_MON1
sc1_scl1_pbuf0: SC1_SCL1_PBUF0
vdc5
only.0x8bc - SC1_SCL1_PBUF0
sc1_scl1_pbuf1: SC1_SCL1_PBUF1
vdc5
only.0x8c0 - SC1_SCL1_PBUF1
sc1_scl1_pbuf2: SC1_SCL1_PBUF2
vdc5
only.0x8c4 - SC1_SCL1_PBUF2
sc1_scl1_pbuf3: SC1_SCL1_PBUF3
vdc5
only.0x8c8 - SC1_SCL1_PBUF3
sc1_scl1_pbuf_fld: SC1_SCL1_PBUF_FLD
vdc5
only.0x8cc - SC1_SCL1_PBUF_FLD
sc1_scl1_pbuf_cnt: SC1_SCL1_PBUF_CNT
vdc5
only.0x8d0 - SC1_SCL1_PBUF_CNT
gr1_update: GR1_UPDATE
vdc5
only.0x900 - GR1_UPDATE
gr1_flm_rd: GR1_FLM_RD
vdc5
only.0x904 - GR1_FLM_RD
gr1_flm1: GR1_FLM1
vdc5
only.0x908 - GR1_FLM1
gr1_flm2: GR1_FLM2
vdc5
only.0x90c - GR1_FLM2
gr1_flm3: GR1_FLM3
vdc5
only.0x910 - GR1_FLM3
gr1_flm4: GR1_FLM4
vdc5
only.0x914 - GR1_FLM4
gr1_flm5: GR1_FLM5
vdc5
only.0x918 - GR1_FLM5
gr1_flm6: GR1_FLM6
vdc5
only.0x91c - GR1_FLM6
gr1_ab1: GR1_AB1
vdc5
only.0x920 - GR1_AB1
gr1_ab2: GR1_AB2
vdc5
only.0x924 - GR1_AB2
gr1_ab3: GR1_AB3
vdc5
only.0x928 - GR1_AB3
gr1_ab4: GR1_AB4
vdc5
only.0x92c - GR1_AB4
gr1_ab5: GR1_AB5
vdc5
only.0x930 - GR1_AB5
gr1_ab6: GR1_AB6
vdc5
only.0x934 - GR1_AB6
gr1_ab7: GR1_AB7
vdc5
only.0x938 - GR1_AB7
gr1_ab8: GR1_AB8
vdc5
only.0x93c - GR1_AB8
gr1_ab9: GR1_AB9
vdc5
only.0x940 - GR1_AB9
gr1_ab10: GR1_AB10
vdc5
only.0x944 - GR1_AB10
gr1_ab11: GR1_AB11
vdc5
only.0x948 - GR1_AB11
gr1_base: GR1_BASE
vdc5
only.0x94c - GR1_BASE
gr1_clut: GR1_CLUT
vdc5
only.0x950 - GR1_CLUT
gr1_mon: GR1_MON
vdc5
only.0x954 - GR1_MON
adj1_update: ADJ1_UPDATE
vdc5
only.0x980 - ADJ1_UPDATE
adj1_bkstr_set: ADJ1_BKSTR_SET
vdc5
only.0x984 - ADJ1_BKSTR_SET
adj1_enh_tim1: ADJ1_ENH_TIM1
vdc5
only.0x988 - ADJ1_ENH_TIM1
adj1_enh_tim2: ADJ1_ENH_TIM2
vdc5
only.0x98c - ADJ1_ENH_TIM2
adj1_enh_tim3: ADJ1_ENH_TIM3
vdc5
only.0x990 - ADJ1_ENH_TIM3
adj1_enh_shp1: ADJ1_ENH_SHP1
vdc5
only.0x994 - ADJ1_ENH_SHP1
adj1_enh_shp2: ADJ1_ENH_SHP2
vdc5
only.0x998 - ADJ1_ENH_SHP2
adj1_enh_shp3: ADJ1_ENH_SHP3
vdc5
only.0x99c - ADJ1_ENH_SHP3
adj1_enh_shp4: ADJ1_ENH_SHP4
vdc5
only.0x9a0 - ADJ1_ENH_SHP4
adj1_enh_shp5: ADJ1_ENH_SHP5
vdc5
only.0x9a4 - ADJ1_ENH_SHP5
adj1_enh_shp6: ADJ1_ENH_SHP6
vdc5
only.0x9a8 - ADJ1_ENH_SHP6
adj1_enh_lti1: ADJ1_ENH_LTI1
vdc5
only.0x9ac - ADJ1_ENH_LTI1
adj1_enh_lti2: ADJ1_ENH_LTI2
vdc5
only.0x9b0 - ADJ1_ENH_LTI2
adj1_mtx_mode: ADJ1_MTX_MODE
vdc5
only.0x9b4 - ADJ1_MTX_MODE
adj1_mtx_yg_adj0: ADJ1_MTX_YG_ADJ0
vdc5
only.0x9b8 - ADJ1_MTX_YG_ADJ0
adj1_mtx_yg_adj1: ADJ1_MTX_YG_ADJ1
vdc5
only.0x9bc - ADJ1_MTX_YG_ADJ1
adj1_mtx_cbb_adj0: ADJ1_MTX_CBB_ADJ0
vdc5
only.0x9c0 - ADJ1_MTX_CBB_ADJ0
adj1_mtx_cbb_adj1: ADJ1_MTX_CBB_ADJ1
vdc5
only.0x9c4 - ADJ1_MTX_CBB_ADJ1
adj1_mtx_crr_adj0: ADJ1_MTX_CRR_ADJ0
vdc5
only.0x9c8 - ADJ1_MTX_CRR_ADJ0
adj1_mtx_crr_adj1: ADJ1_MTX_CRR_ADJ1
vdc5
only.0x9cc - ADJ1_MTX_CRR_ADJ1
gr_vin_update: GR_VIN_UPDATE
vdc5
only.0xa00 - GR_VIN_UPDATE
gr_vin_ab1: GR_VIN_AB1
vdc5
only.0xa20 - GR_VIN_AB1
gr_vin_ab2: GR_VIN_AB2
vdc5
only.0xa24 - GR_VIN_AB2
gr_vin_ab3: GR_VIN_AB3
vdc5
only.0xa28 - GR_VIN_AB3
gr_vin_ab4: GR_VIN_AB4
vdc5
only.0xa2c - GR_VIN_AB4
gr_vin_ab5: GR_VIN_AB5
vdc5
only.0xa30 - GR_VIN_AB5
gr_vin_ab6: GR_VIN_AB6
vdc5
only.0xa34 - GR_VIN_AB6
gr_vin_ab7: GR_VIN_AB7
vdc5
only.0xa38 - GR_VIN_AB7
gr_vin_base: GR_VIN_BASE
vdc5
only.0xa4c - GR_VIN_BASE
gr_vin_mon: GR_VIN_MON
vdc5
only.0xa54 - GR_VIN_MON
oir_scl0_update: OIR_SCL0_UPDATE
vdc5
only.0xa80 - OIR_SCL0_UPDATE
oir_scl0_frc1: OIR_SCL0_FRC1
vdc5
only.0xa84 - OIR_SCL0_FRC1
oir_scl0_frc2: OIR_SCL0_FRC2
vdc5
only.0xa88 - OIR_SCL0_FRC2
oir_scl0_frc3: OIR_SCL0_FRC3
vdc5
only.0xa8c - OIR_SCL0_FRC3
oir_scl0_frc4: OIR_SCL0_FRC4
vdc5
only.0xa90 - OIR_SCL0_FRC4
oir_scl0_frc5: OIR_SCL0_FRC5
vdc5
only.0xa94 - OIR_SCL0_FRC5
oir_scl0_frc6: OIR_SCL0_FRC6
vdc5
only.0xa98 - OIR_SCL0_FRC6
oir_scl0_frc7: OIR_SCL0_FRC7
vdc5
only.0xa9c - OIR_SCL0_FRC7
oir_scl0_ds1: OIR_SCL0_DS1
vdc5
only.0xaac - OIR_SCL0_DS1
oir_scl0_ds2: OIR_SCL0_DS2
vdc5
only.0xab0 - OIR_SCL0_DS2
oir_scl0_ds3: OIR_SCL0_DS3
vdc5
only.0xab4 - OIR_SCL0_DS3
oir_scl0_ds7: OIR_SCL0_DS7
vdc5
only.0xac4 - OIR_SCL0_DS7
oir_scl0_us1: OIR_SCL0_US1
vdc5
only.0xac8 - OIR_SCL0_US1
oir_scl0_us2: OIR_SCL0_US2
vdc5
only.0xacc - OIR_SCL0_US2
oir_scl0_us3: OIR_SCL0_US3
vdc5
only.0xad0 - OIR_SCL0_US3
oir_scl0_us8: OIR_SCL0_US8
vdc5
only.0xae4 - OIR_SCL0_US8
oir_scl0_ovr1: OIR_SCL0_OVR1
vdc5
only.0xaec - OIR_SCL0_OVR1
oir_scl1_update: OIR_SCL1_UPDATE
vdc5
only.0xb00 - OIR_SCL1_UPDATE
oir_scl1_wr1: OIR_SCL1_WR1
vdc5
only.0xb08 - OIR_SCL1_WR1
oir_scl1_wr2: OIR_SCL1_WR2
vdc5
only.0xb0c - OIR_SCL1_WR2
oir_scl1_wr3: OIR_SCL1_WR3
vdc5
only.0xb10 - OIR_SCL1_WR3
oir_scl1_wr4: OIR_SCL1_WR4
vdc5
only.0xb14 - OIR_SCL1_WR4
oir_scl1_wr5: OIR_SCL1_WR5
vdc5
only.0xb1c - OIR_SCL1_WR5
oir_scl1_wr6: OIR_SCL1_WR6
vdc5
only.0xb20 - OIR_SCL1_WR6
oir_scl1_wr7: OIR_SCL1_WR7
vdc5
only.0xb24 - OIR_SCL1_WR7
gr_oir_update: GR_OIR_UPDATE
vdc5
only.0xb80 - GR_OIR_UPDATE
gr_oir_flm_rd: GR_OIR_FLM_RD
vdc5
only.0xb84 - GR_OIR_FLM_RD
gr_oir_flm1: GR_OIR_FLM1
vdc5
only.0xb88 - GR_OIR_FLM1
gr_oir_flm2: GR_OIR_FLM2
vdc5
only.0xb8c - GR_OIR_FLM2
gr_oir_flm3: GR_OIR_FLM3
vdc5
only.0xb90 - GR_OIR_FLM3
gr_oir_flm4: GR_OIR_FLM4
vdc5
only.0xb94 - GR_OIR_FLM4
gr_oir_flm5: GR_OIR_FLM5
vdc5
only.0xb98 - GR_OIR_FLM5
gr_oir_flm6: GR_OIR_FLM6
vdc5
only.0xb9c - GR_OIR_FLM6
gr_oir_ab1: GR_OIR_AB1
vdc5
only.0xba0 - GR_OIR_AB1
gr_oir_ab2: GR_OIR_AB2
vdc5
only.0xba4 - GR_OIR_AB2
gr_oir_ab3: GR_OIR_AB3
vdc5
only.0xba8 - GR_OIR_AB3
gr_oir_ab7: GR_OIR_AB7
vdc5
only.0xbb8 - GR_OIR_AB7
gr_oir_ab8: GR_OIR_AB8
vdc5
only.0xbbc - GR_OIR_AB8
gr_oir_ab9: GR_OIR_AB9
vdc5
only.0xbc0 - GR_OIR_AB9
gr_oir_ab10: GR_OIR_AB10
vdc5
only.0xbc4 - GR_OIR_AB10
gr_oir_ab11: GR_OIR_AB11
vdc5
only.0xbc8 - GR_OIR_AB11
gr_oir_base: GR_OIR_BASE
vdc5
only.0xbcc - GR_OIR_BASE
gr_oir_clut: GR_OIR_CLUT
vdc5
only.0xbd0 - GR_OIR_CLUT
gr_oir_mon: GR_OIR_MON
vdc5
only.0xbd4 - GR_OIR_MON
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
[src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
[src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src]
T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
[src]
impl<T> From<T> for T
[src]
impl<T, U> Into<U> for T where
U: From<T>,
[src]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src]
U: TryFrom<T>,