Trait rvsim::Clock [−][src]
A trait used by the interpreter to implement the clock CSRs.
Required methods
fn read_cycle(&self) -> u64
[src]
Read the cycle
CSR, which counts the number of CPU cycles executed.
fn read_time(&self) -> u64
[src]
Read the time
CSR, which holds wall-clock time.
The epoch and granularity are arbitrary, but the spec requires that the period is constant.
fn read_instret(&self) -> u64
[src]
Read the instret
CSR, which counts the number of instructions executed.
fn progress(&mut self, op: &Op)
[src]
Progress clocks, after the given instruction was executed.
This typically increments instret
, adds some number to cycle
, and may also simulate
time
if it is not provided by the environment.
Note that, even though these values are 64-bit, it is recommended implementations use
wrapping_add
.
Provided methods
fn check_quota(&self) -> bool
[src]
Check execution quotas. Called at the very start of Interp::step
.
When this return false
, the virtual CPU is stopped with CpuError::QuotaExceeded
. This
allows the simulator to implement time slicing.
This method is optional, and always returns true
if not implemented.