rvemu/
lib.rs

1//! RISC-V emulator core implementation.
2//!
3//! # How to use
4//! Create an `Emulator` object, place a binary data in DRAM and set the program counter to
5//! `DRAM_BASE`. The binary data must contain no headers for now. The example is here:
6//! ```rust
7//! use rvemu::bus::DRAM_BASE;
8//! use rvemu::emulator::Emulator;
9//!
10//! fn main() {
11//!     // Create a dummy binary data.
12//!     let data = vec![
13//!         0x93, 0x0f, 0xa0, 0x02, // addi x31, x0, 42
14//!     ];
15//!
16//!     // Create an emulator object.
17//!     let mut emu = Emulator::new();
18//!     // Place the binary data in the beginning of DRAM.
19//!     emu.initialize_dram(data);
20//!     // Set the program counter to 0x8000_0000, which is the address DRAM starts.
21//!     emu.initialize_pc(DRAM_BASE);
22//!     // Start the emulator.
23//!     emu.start();
24//!
25//!     // `IllegalInstruction` is raised for now because of the termination condition of the emulator,
26//!     // but the register is successfully updated.
27//!     assert_eq!(42, emu.cpu.xregs.read(31));
28//! }
29//! ```
30//!
31//! See the example usage in
32//! [rvemu/lib/rvemu-cli/src/main.rs](https://github.com/d0iasm/rvemu/blob/master/lib/rvemu-cli/src/main.rs).
33
34pub mod bus;
35pub mod cpu;
36pub mod csr;
37pub mod devices;
38pub mod dram;
39pub mod emulator;
40pub mod exception;
41pub mod interrupt;
42pub mod rom;
rvemu/lib.rs

rvemu/
lib.rs
