rv32m1_ri5cy_pac/pcc0/
pcc_lpit0.rs1#[doc = "Reader of register PCC_LPIT0"]
2pub type R = crate::R<u32, super::PCC_LPIT0>;
3#[doc = "Writer for register PCC_LPIT0"]
4pub type W = crate::W<u32, super::PCC_LPIT0>;
5#[doc = "Register PCC_LPIT0 `reset()`'s with value 0x8000_0000"]
6impl crate::ResetValue for super::PCC_LPIT0 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x8000_0000
11 }
12}
13#[doc = "Peripheral Clock Source Select\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PCS_A {
16 #[doc = "0: Clock is off."]
17 PCS_0,
18 #[doc = "1: Clock option 1"]
19 PCS_1,
20 #[doc = "2: Clock option 2"]
21 PCS_2,
22 #[doc = "3: Clock option 3"]
23 PCS_3,
24 #[doc = "4: Clock option 4"]
25 PCS_4,
26 #[doc = "5: Clock option 5"]
27 PCS_5,
28 #[doc = "6: Clock option 6"]
29 PCS_6,
30 #[doc = "7: Clock option 7"]
31 PCS_7,
32}
33impl From<PCS_A> for u8 {
34 #[inline(always)]
35 fn from(variant: PCS_A) -> Self {
36 match variant {
37 PCS_A::PCS_0 => 0,
38 PCS_A::PCS_1 => 1,
39 PCS_A::PCS_2 => 2,
40 PCS_A::PCS_3 => 3,
41 PCS_A::PCS_4 => 4,
42 PCS_A::PCS_5 => 5,
43 PCS_A::PCS_6 => 6,
44 PCS_A::PCS_7 => 7,
45 }
46 }
47}
48#[doc = "Reader of field `PCS`"]
49pub type PCS_R = crate::R<u8, PCS_A>;
50impl PCS_R {
51 #[doc = r"Get enumerated values variant"]
52 #[inline(always)]
53 pub fn variant(&self) -> PCS_A {
54 match self.bits {
55 0 => PCS_A::PCS_0,
56 1 => PCS_A::PCS_1,
57 2 => PCS_A::PCS_2,
58 3 => PCS_A::PCS_3,
59 4 => PCS_A::PCS_4,
60 5 => PCS_A::PCS_5,
61 6 => PCS_A::PCS_6,
62 7 => PCS_A::PCS_7,
63 _ => unreachable!(),
64 }
65 }
66 #[doc = "Checks if the value of the field is `PCS_0`"]
67 #[inline(always)]
68 pub fn is_pcs_0(&self) -> bool {
69 *self == PCS_A::PCS_0
70 }
71 #[doc = "Checks if the value of the field is `PCS_1`"]
72 #[inline(always)]
73 pub fn is_pcs_1(&self) -> bool {
74 *self == PCS_A::PCS_1
75 }
76 #[doc = "Checks if the value of the field is `PCS_2`"]
77 #[inline(always)]
78 pub fn is_pcs_2(&self) -> bool {
79 *self == PCS_A::PCS_2
80 }
81 #[doc = "Checks if the value of the field is `PCS_3`"]
82 #[inline(always)]
83 pub fn is_pcs_3(&self) -> bool {
84 *self == PCS_A::PCS_3
85 }
86 #[doc = "Checks if the value of the field is `PCS_4`"]
87 #[inline(always)]
88 pub fn is_pcs_4(&self) -> bool {
89 *self == PCS_A::PCS_4
90 }
91 #[doc = "Checks if the value of the field is `PCS_5`"]
92 #[inline(always)]
93 pub fn is_pcs_5(&self) -> bool {
94 *self == PCS_A::PCS_5
95 }
96 #[doc = "Checks if the value of the field is `PCS_6`"]
97 #[inline(always)]
98 pub fn is_pcs_6(&self) -> bool {
99 *self == PCS_A::PCS_6
100 }
101 #[doc = "Checks if the value of the field is `PCS_7`"]
102 #[inline(always)]
103 pub fn is_pcs_7(&self) -> bool {
104 *self == PCS_A::PCS_7
105 }
106}
107#[doc = "Write proxy for field `PCS`"]
108pub struct PCS_W<'a> {
109 w: &'a mut W,
110}
111impl<'a> PCS_W<'a> {
112 #[doc = r"Writes `variant` to the field"]
113 #[inline(always)]
114 pub fn variant(self, variant: PCS_A) -> &'a mut W {
115 {
116 self.bits(variant.into())
117 }
118 }
119 #[doc = "Clock is off."]
120 #[inline(always)]
121 pub fn pcs_0(self) -> &'a mut W {
122 self.variant(PCS_A::PCS_0)
123 }
124 #[doc = "Clock option 1"]
125 #[inline(always)]
126 pub fn pcs_1(self) -> &'a mut W {
127 self.variant(PCS_A::PCS_1)
128 }
129 #[doc = "Clock option 2"]
130 #[inline(always)]
131 pub fn pcs_2(self) -> &'a mut W {
132 self.variant(PCS_A::PCS_2)
133 }
134 #[doc = "Clock option 3"]
135 #[inline(always)]
136 pub fn pcs_3(self) -> &'a mut W {
137 self.variant(PCS_A::PCS_3)
138 }
139 #[doc = "Clock option 4"]
140 #[inline(always)]
141 pub fn pcs_4(self) -> &'a mut W {
142 self.variant(PCS_A::PCS_4)
143 }
144 #[doc = "Clock option 5"]
145 #[inline(always)]
146 pub fn pcs_5(self) -> &'a mut W {
147 self.variant(PCS_A::PCS_5)
148 }
149 #[doc = "Clock option 6"]
150 #[inline(always)]
151 pub fn pcs_6(self) -> &'a mut W {
152 self.variant(PCS_A::PCS_6)
153 }
154 #[doc = "Clock option 7"]
155 #[inline(always)]
156 pub fn pcs_7(self) -> &'a mut W {
157 self.variant(PCS_A::PCS_7)
158 }
159 #[doc = r"Writes raw bits to the field"]
160 #[inline(always)]
161 pub fn bits(self, value: u8) -> &'a mut W {
162 self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
163 self.w
164 }
165}
166#[doc = "In use flag\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq)]
168pub enum INUSE_A {
169 #[doc = "0: Peripheral is not being used."]
170 INUSE_0,
171 #[doc = "1: Peripheral is being used. Software cannot modify the existing clocking configuration."]
172 INUSE_1,
173}
174impl From<INUSE_A> for bool {
175 #[inline(always)]
176 fn from(variant: INUSE_A) -> Self {
177 match variant {
178 INUSE_A::INUSE_0 => false,
179 INUSE_A::INUSE_1 => true,
180 }
181 }
182}
183#[doc = "Reader of field `INUSE`"]
184pub type INUSE_R = crate::R<bool, INUSE_A>;
185impl INUSE_R {
186 #[doc = r"Get enumerated values variant"]
187 #[inline(always)]
188 pub fn variant(&self) -> INUSE_A {
189 match self.bits {
190 false => INUSE_A::INUSE_0,
191 true => INUSE_A::INUSE_1,
192 }
193 }
194 #[doc = "Checks if the value of the field is `INUSE_0`"]
195 #[inline(always)]
196 pub fn is_inuse_0(&self) -> bool {
197 *self == INUSE_A::INUSE_0
198 }
199 #[doc = "Checks if the value of the field is `INUSE_1`"]
200 #[inline(always)]
201 pub fn is_inuse_1(&self) -> bool {
202 *self == INUSE_A::INUSE_1
203 }
204}
205#[doc = "Clock Gate Control\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum CGC_A {
208 #[doc = "0: Clock disabled"]
209 CGC_0,
210 #[doc = "1: Clock enabled. The current clock selection and divider options are locked."]
211 CGC_1,
212}
213impl From<CGC_A> for bool {
214 #[inline(always)]
215 fn from(variant: CGC_A) -> Self {
216 match variant {
217 CGC_A::CGC_0 => false,
218 CGC_A::CGC_1 => true,
219 }
220 }
221}
222#[doc = "Reader of field `CGC`"]
223pub type CGC_R = crate::R<bool, CGC_A>;
224impl CGC_R {
225 #[doc = r"Get enumerated values variant"]
226 #[inline(always)]
227 pub fn variant(&self) -> CGC_A {
228 match self.bits {
229 false => CGC_A::CGC_0,
230 true => CGC_A::CGC_1,
231 }
232 }
233 #[doc = "Checks if the value of the field is `CGC_0`"]
234 #[inline(always)]
235 pub fn is_cgc_0(&self) -> bool {
236 *self == CGC_A::CGC_0
237 }
238 #[doc = "Checks if the value of the field is `CGC_1`"]
239 #[inline(always)]
240 pub fn is_cgc_1(&self) -> bool {
241 *self == CGC_A::CGC_1
242 }
243}
244#[doc = "Write proxy for field `CGC`"]
245pub struct CGC_W<'a> {
246 w: &'a mut W,
247}
248impl<'a> CGC_W<'a> {
249 #[doc = r"Writes `variant` to the field"]
250 #[inline(always)]
251 pub fn variant(self, variant: CGC_A) -> &'a mut W {
252 {
253 self.bit(variant.into())
254 }
255 }
256 #[doc = "Clock disabled"]
257 #[inline(always)]
258 pub fn cgc_0(self) -> &'a mut W {
259 self.variant(CGC_A::CGC_0)
260 }
261 #[doc = "Clock enabled. The current clock selection and divider options are locked."]
262 #[inline(always)]
263 pub fn cgc_1(self) -> &'a mut W {
264 self.variant(CGC_A::CGC_1)
265 }
266 #[doc = r"Sets the field bit"]
267 #[inline(always)]
268 pub fn set_bit(self) -> &'a mut W {
269 self.bit(true)
270 }
271 #[doc = r"Clears the field bit"]
272 #[inline(always)]
273 pub fn clear_bit(self) -> &'a mut W {
274 self.bit(false)
275 }
276 #[doc = r"Writes raw bits to the field"]
277 #[inline(always)]
278 pub fn bit(self, value: bool) -> &'a mut W {
279 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
280 self.w
281 }
282}
283#[doc = "Present\n\nValue on reset: 1"]
284#[derive(Clone, Copy, Debug, PartialEq)]
285pub enum PR_A {
286 #[doc = "0: Peripheral is not present."]
287 PR_0,
288 #[doc = "1: Peripheral is present."]
289 PR_1,
290}
291impl From<PR_A> for bool {
292 #[inline(always)]
293 fn from(variant: PR_A) -> Self {
294 match variant {
295 PR_A::PR_0 => false,
296 PR_A::PR_1 => true,
297 }
298 }
299}
300#[doc = "Reader of field `PR`"]
301pub type PR_R = crate::R<bool, PR_A>;
302impl PR_R {
303 #[doc = r"Get enumerated values variant"]
304 #[inline(always)]
305 pub fn variant(&self) -> PR_A {
306 match self.bits {
307 false => PR_A::PR_0,
308 true => PR_A::PR_1,
309 }
310 }
311 #[doc = "Checks if the value of the field is `PR_0`"]
312 #[inline(always)]
313 pub fn is_pr_0(&self) -> bool {
314 *self == PR_A::PR_0
315 }
316 #[doc = "Checks if the value of the field is `PR_1`"]
317 #[inline(always)]
318 pub fn is_pr_1(&self) -> bool {
319 *self == PR_A::PR_1
320 }
321}
322impl R {
323 #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
324 #[inline(always)]
325 pub fn pcs(&self) -> PCS_R {
326 PCS_R::new(((self.bits >> 24) & 0x07) as u8)
327 }
328 #[doc = "Bit 29 - In use flag"]
329 #[inline(always)]
330 pub fn inuse(&self) -> INUSE_R {
331 INUSE_R::new(((self.bits >> 29) & 0x01) != 0)
332 }
333 #[doc = "Bit 30 - Clock Gate Control"]
334 #[inline(always)]
335 pub fn cgc(&self) -> CGC_R {
336 CGC_R::new(((self.bits >> 30) & 0x01) != 0)
337 }
338 #[doc = "Bit 31 - Present"]
339 #[inline(always)]
340 pub fn pr(&self) -> PR_R {
341 PR_R::new(((self.bits >> 31) & 0x01) != 0)
342 }
343}
344impl W {
345 #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
346 #[inline(always)]
347 pub fn pcs(&mut self) -> PCS_W {
348 PCS_W { w: self }
349 }
350 #[doc = "Bit 30 - Clock Gate Control"]
351 #[inline(always)]
352 pub fn cgc(&mut self) -> CGC_W {
353 CGC_W { w: self }
354 }
355}