Crate rusty_erasure_core 

rusty_erasure-core — GF(2^8) arithmetic, coding matrices, and the scalar erasure-coding kernels that serve as the permanent correctness oracles.

This crate is no_std + alloc, has zero dependencies, and forbids unsafe. Everything here must be usable by a developer who has never heard of MATA: bytes in, bytes out. SIMD twins live in rusty_erasure-accel; the typed public API and kernel dispatch live in the rusty_erasure facade.

Conformance target: byte identity with Intel ISA-L’s erasure_code module, proven against checked-in golden vectors generated from real ISA-L on the bench rig. Mission plan: docs/plans/erasure_mission.md (§7 for the gates).

Milestone map for this crate: M1 lands gf, matrix, and tables; M2 lands the scalar kernels and encode/update/recover.

Re-exports

pub use encode::Coder;

pub use encode::DecodePlan;

pub use error::CodeError;

pub use error::MatrixError;

pub use error::RecoverError;

pub use matrix::Matrix;

Modules

encode

The Coder: encode, incremental update, verify, and recover — ISA-L’s ec_encode_data / ec_encode_data_update semantics plus the recovery flow ISA-L leaves as an exercise, all behind validated, panic-free APIs.

error

Typed errors for every public operation.

gf

GF(2^8) arithmetic over the field ISA-L uses: the polynomial x^8 + x^4 + x^3 + x^2 + 1 (0x11d), generator 2.

kernel

Scalar erasure-coding kernels — the permanent oracles every SIMD twin (M4) is gated against, and the fallback on every CPU.

matrix

Coding matrices: generation (Vandermonde / Cauchy), inversion, and row selection for recovery.

raid

RAID parity: XOR (P-only) and P+Q (RAID-6) generation and checking — ISA-L’s raid module semantics with validated, panic-free APIs.

tables

Expanded multiplication tables — ISA-L’s ec_init_tables layout, bit-identical: 32 bytes per coefficient c, being the two PSHUFB nibble tables {c*0, c*1, ..., c*15} then {c*0x00, c*0x10, ..., c*0xf0}.