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Module gf_simd

Module gf_simd 

Source
Expand description

SIMD-accelerated GF(2^16) buffer operations.

Dispatch hierarchy: AVX2 (256-bit) → SSSE3 (128-bit) → scalar.

The PSHUFB technique: decompose 16-bit GF multiply into four 4-bit lookups. VPSHUFB (AVX2) processes 32 bytes per instruction, PSHUFB (SSSE3) 16 bytes.

Additionally provides mul_add_multi which accumulates multiple source buffers × coefficients into dst in a single pass, reducing memory bandwidth by loading each dst cache line once instead of once per source.

Structs§

GfMulTables
Precomputed PSHUFB tables for multiplying by a GF(2^16) constant.

Functions§

mul_add_buffer
dst[i] ^= constant * src[i] for each u16 position.
mul_add_multi
Accumulate multiple source buffers into dst.
xor_buffers
XOR src into dst.